Positive Edge-Triggered Flip-Flop
November 1988 Revised August 2000
74AC109 * 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop
The AC/ACT109 consists of two high-speed completely independent transition clocked ...
Dual JK Positive Edge-Triggered Flip-Flop From old datasheet system
...ht (Q0 Q1 Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the Q7 ...edge-triggered) ground (0 V) serial data input parallel data inputs clock enable input (active LOW) ...
...1 Chip Select Input, Active Low Positive Power Supply
Table I. Truth Table
CS L L H
CLK t t X
U/D H L X
Operation Wiper Incre...edge sensitive CLK input requires clean transitions to avoid clocking multiple pulses into the inter...
Increment/Decrement Digital Potentiometer 2-Channel/ 256-Position Digital Potentiometer TRIM POT ST-32TG 20 OHMS Toggle Switch; Circuitry:DPDT; Switch Operation:On-Off-On; Contact Current Max:6A; Actuator Style:Bat; Switch Terminals:Through Hole; Current Rating:3A; Leaded Process Compatible:Yes; Mounting Type:PCB; Features:Standard Actuator RoHS Compliant: Yes
...y Range Power Dual-Supply Range Positive Supply Current Negative Supply Current Power Dissipation 7 Power Supply Sensitivity DYNAMIC CHARACT...Edge Triggered. CS Chip Select Input, Active Low. When CS is high, the UP/DOWN counter is disabled. ...
Increment/Decrement Dual Digital Potentiometer Dual, Increment/Decrement Digital Potentiometer
...Logic Loading "0" Start Convert Positive Pulse Width STATIC PERFORMANCE Resolution Integral Nonlinearity (fin = 10kHz) Differential Nonline...edge of the start convert pulse is required for the device to operate (edge-triggered). Effective b...
web experience and assist with our advertising efforts. By continuing to use