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  positive-edge-triggered Datasheet PDF File

For positive-edge-triggered Found Datasheets File :: 5465    Search Time::4.016ms    
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    74VHC374 74VHC374M 74VHC374T 6174

STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHC374 74VHC374M 74VHC374T 6174
OCR Text ...utput enable input (OE). On the positive transition of the clock, the Q outputs will be set to the logic state that were PIN CONNECTION A...edge triggered) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OE H L L L X:Don't care ...
Description From old datasheet system
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

File Size 74.39K  /  10 Page

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    AT91M40400

ATMEL[ATMEL Corporation]
Part No. AT91M40400
OCR Text ...sources can be programmed to be positive or negative edge triggered or high or low level sensitive. 6 AT91M40400 AT91M40400 TC: Timer Counter The AT91M40400 features a Timer Counter block which includes three identical 16-bit tim...
Description 16/32-Bit Microcontroller

File Size 50.44K  /  7 Page

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    CY7C1484V33 CY7C1484V33-167AC CY7C1484V33-167BGC CY7C1484V33-167BZC CY7C1484V33-200AC CY7C1484V33-200BGC CY7C1484V33-200

CYPRESS[Cypress Semiconductor]
Part No. CY7C1484V33 CY7C1484V33-167AC CY7C1484V33-167BGC CY7C1484V33-167BZC CY7C1484V33-200AC CY7C1484V33-200BGC CY7C1484V33-200BZC CY7C1484V33-250AC CY7C1484V33-250BGC CY7C1484V33-250BZC CY7C1485V33 CY7C1485V33-167AC CY7C1485V33-167BGC CY7C1485V33-167BZC CY7C1485V33-200AC CY7C1485V33-200BGC CY7C1485V33-200BZC CY7C1485V33-250AC CY7C1485V33-250BGC CY7C1485V33-250BZC
OCR Text ...ed by registers controlled by a positive-edge-triggered Clock Input (CLK). The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE), burst control inputs (ADSC, ADSP, and ADV), write enables (BWa, B...
Description 2M x 36/4M x 18 Pipelined DCD SRAM

File Size 505.55K  /  29 Page

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    DM74LS221 DM74LS221M DM74LS221N DM74LS221SJ 74LS221

FAIRCHILD[Fairchild Semiconductor]
Part No. DM74LS221 DM74LS221M DM74LS221N DM74LS221SJ 74LS221
OCR Text ... = Can Be Either LOW or HIGH = Positive Going Transition = Negative Going Transition = A Positive Pulse = A Negative Pulse L H Note 2: This mode of triggering requires first the B input be set from a LOW-to-H...
Description    Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs

File Size 107.69K  /  8 Page

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    EM658160 EM658160TS-33 EM658160TS-35 EM658160TS-4 EM658160TS-5 EM658160TS-6 EM658160TS-7 EM658160TS-8

ETRON[Etron Technology, Inc.]
ETRON[Etron Technology Inc.]
Part No. EM658160 EM658160TS-33 EM658160TS-35 EM658160TS-4 EM658160TS-5 EM658160TS-6 EM658160TS-7 EM658160TS-8
OCR Text ...l signals are registered on the positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK and /CK. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a...
Description 4M x 16 DDR Synchronous DRAM (SDRAM)

File Size 154.94K  /  26 Page

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    HD74AC175

HITACHI[Hitachi Semiconductor]
Part No. HD74AC175
OCR Text ...riggered D-Type Inputs Buffered Positive Edge-Triggered Clock Asynchronous Common Reset True and Complement Output Outputs Source/Sink 24 mA HD74AC175 Pin Arrangement MR 1 Q0 2 Q0 3 D0 4 D1 5 Q1 6 Q1 7 GND 8 (Top view) 16 VCC 15 Q...
Description Quad D-Type Flip-Flop

File Size 57.72K  /  10 Page

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