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DM134BDM135B
Version : A.006 Issue Date : 2007/08/27 File Name : SP-DM134B,135B-A.006.doc Total Pages: 20
16-Bit Constant Current LED Drivers with 3.3v ~ 5v Supply Voltage
9 7 1
SILICON TOUCH TECHNOLOGY INC.
9-7F-1, Prosperity Road I, Science Based Industrial Park, Hsin-Chu, Taiwan 300, R.O.C. Tel886-3-5645656 Fax886-3-5645626

SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
DM134BDM135B
16-Bit Constant Current LED Drivers with 3.3v ~ 5v Supply Voltage
General Description
The DM134BDM135B are constant current drivers specifically designed for LED display applications. The value of constant current can be varied using an external resistor. The devices include a 16-bit shift register, latches, and constant current drivers on a single Silicon CMOS chip.
Features
3.3V~5V CMOS Compatible Input Maximum Clock Frequency: 25MHz (Cascade Operation) Maximum Output Voltage: 17V Package: DIP24, SOP24, SSOP24, QFN32 Package and Pin Layout: Pin layout and functionality are similar to those of the ST2221C. (Each characteristic value is different.) Constant Current Matching: (Ta = 25CVDD = 5.0V) Chip-to-Chip: 10.0% Bit-to-Bit: DM134B: 4.0% @ IOUT = 30 ~ 90mA 6.0% @ IOUT = 20 ~ 30mA DM135B: 4.0% @ IOUT = 20 ~ 60mA 6.0% @ IOUT = 5 ~ 20mA
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Pin Connection (Top view)
DIP24SOP24SSOP24
GND SERIAL-IN CLOCK LATCH OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VDD R-EXT SERIAL-OUT ENABLE OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8
Pin Connection (Bottom view)
QFN32
ENABLE OUT15 OUT13 26 OUT14 OUT12 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 Thermal PAD 25 GND SERIAL_OUT
REXT
27
28
29
30
31
32
OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4
1 2 3 4 5 6 7 8
GND GND VDD VDD GND GND GND GND
9
16-Bit Constant Current LED Drivers
OUT3
OUT2
OUT1
OUT0
GND
LATCH
CLOCK
SERIAL_IN
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Block Diagram
OUT0 R-EXT
I-REG.
OUT1
OUT15
ENABLE
Q ST D Q ST D Q ST D
LATCH SERIAL-IN CLOCK
D CK Q D CK Q D CK Q
SERIAL-OUT
Timing Diagram
16 Clocks CLOCK SERIAL_IN LATCH ENABLE SERIAL_OUT OUT0 OUT1 OUT2 OUT3
5V 0V 5V 0V 5V 0V 5V 0V
Previous Data
5V 0V ON OFF ON OFF ON OFF ON OFF
OUT13 OUT14 OUT15
ON OFF ON OFF ON OFF
(Note) Latches are level sensitive (not edge triggered). LATCH-terminal = H level, latches become transparent; LATCH-terminal = L level, latches hold data. ENABLE-terminal = H level, all outputs (OUT0~15) are off. An external resistor is connected between R-EXT and GND for setting up the value of constant current. SERIAL-OUT changes state on the rising edges of clock.
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DM134BDM135B
Pin Description
PIN No. 1 2 3 4 5~20 21 22 23 24 PIN NAME GND SERIAL-IN CLOCK LATCH OUT0~15 ENABLE SERIAL-OUT R-EXT VDD FUNCTION Ground terminal Input terminal of a data shift register Input terminal of a clock for shift register Input terminal of data strobe Output terminals Input terminal of output enable (active low) Output terminal of a data shift register Input terminal of an external resistor 5V Supply voltage terminal
Equivalent Circuit of Inputs and Outputs
1. ENABLE terminal
VDD
RIN (up)
2. LATCH terminal
VDD
ENABLE
LATCH
RIN
GND
GND
3. CLOCK, SERIAL-IN terminal
VDD
4. SERIAL-OUT terminal
VDD
CLOCK, SERIAL-IN
SERIAL-OUT
GND
GND
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DM134BDM135B
Maximum Ratings (Ta = 25C, Tj(max) = 150C)
CHARACTERISTIC Supply Voltage Input Voltage Output Current Output Voltage Clock Frequency GND Terminal Current SYMBOL VDD VIN IOUT VOUT fCLK IGND RATING 0 ~ 7.0 -0.4 ~ VDD+0.4 90 ( DM134B ) 60 ( DM135B ) -0.3 ~ 17 25 1440 ( DM134B ) 960 ( DM135B ) 2.5 (DIP-24 : Ta=25C) 1.58 (SOP-24 : Ta=25C) 1.39 (SSOP-24 : Ta=25C) 3.08 (QFN-32 : Ta=25C) 50.0 (DIP-24) 79.2 (SOP-24) 90.2 (SSOP-24) 40.6 (QFN-32) Operating Temperature Storage Temperature Topr Tstg -40 ~ 85 -55 ~ 150 C C UNIT V V mA V MHz mA
Power Dissipation (On 4-layer PCB)
PD
W
Thermal Resistance (On 4-layer PCB)
Rth(j-a)
C/W
Recommended Operating Condition
CHARACTERISTIC Supply Voltage Output Voltage Operating temperature Output Current Input Voltage LATCH Pulse Width CLOCK Pulse Width Set-up Time for DATA Hold Time for DATA Set-up Time for LATCH Clock Frequency SYMBOL VDD VOUT TOPR IOH IOL VIH VIL tw LAT tw CLK tsetup(D) thold(D) tsetup(L) fCLK CONDITION

SERIAL-OUT SERIAL-OUT
MIN. 3.0
TYP. 5.0
-40

0.7VDD -0.3 15 15 10 5 15

VDD = 3.0 ~ 5.5 V
Cascade operation

MAX. 5.5 17 85 1.0 -1.0 VDD+0.3 0.3VDD
UNIT V V mA V ns ns ns ns ns MHz

25
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DM134BDM135B
Electrical Characteristics (VDD = 5.0 V, Ta = 25C unless otherwise noted)
CHARACTERISTIC Input Voltage "H" Level Input Voltage "L" Level Output Leakage Current Output Voltage ( S - OUT) SYMBOL VIH VIL IOH VOL VOH
DM134B
CONDITION VOH = 17 V IOL = 1.0 mA IOH = -1.0 mA VOUT = 1.2V (1 channel on) REXT = 377
MIN. 0.7VDD GND 4.6
TYP.
MAX. VDD 0.3VDD 1.0 0.4
UNIT V uA V
Output Current (Bit-Bit)
Iout
DM135B
1.5
4
%
REXT = 900 REXT = 377 REXT = 900 36.0 18.0 40.0 20.0 44.0 mA 22.0
DM134B
Output Current (Chip-Chip) Iout
DM135B
VOUT = 1.2V (1 channel on)
IDM134B Output Voltage Regulation IDM135B Supply Voltage Regulation
Reference Voltage Regulation
Vout = 1.2V ~ 5.0V REXT = 377 (% / Vout) Vdd = 3.0V ~ 5.5V Rext = 300 ~ 3K REXT = OPEN, all outputs off REXT = 210, all outputs off REXT = OPEN, all outputs off REXT = 300, all outputs off REXT = 630, all outputs off REXT = 210, all outputs on REXT = 300, all outputs on REXT = 630, all outputs on REXT =900
150 100
0.1 1 300 200 2 14 2 14 5.5 14 14 5.5
0.5 3 1 600 400 4 28 4 28 11 28 28 11
%/V %/V % / K K K
% / VDD
Vrext
Pull-Up Resistor Pull-Down Resistor
RIN(up) RIN(down)
DM134B
Supply Current "OFF"
Idd
(off) DM135B
mA
DM134B
Supply Current "ON"
Idd
(on) DM135B
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DM134BDM135B
Switching Characteristics (Ta = 25 C unless otherwise noted)
DM134B
CHARACTERISTIC Propagation ENABLE-OUTn Delay Time ("L" to "H") CLK-SOUT Propagation ENABLE-OUTn Delay Time ("H" to "L") CLK-SOUT Output Current Rise Time Output Current Fall Time SYMBOL
tpLH tpHL tor tof
CONDITION VDD=5.0V VIH=VDD VIL=GND REXT=420 VL=5.0V RL=107.5 CL=15pF
MIN.
TYP. 110 20 95 20 600 45
MAX. 150 25 170 25 800 60
UNIT ns ns ns ns
DM135B
CHARACTERISTIC Propagation ENABLE-OUTn Delay Time ("L" to "H") CLK-SOUT Propagation ENABLE-OUTn Delay Time ("H" to "L") CLK-SOUT Output Current Rise Time Output Current Fall Time SYMBOL
tpLH tpHL tor tof
CONDITION VDD=5.0V VIH=VDD VIL=GND REXT=630 VL=5.0V RL=150 CL=13pF
MIN. 25 15
TYP. 20 20 30 20 50 30
MAX. 40 25 60 25 100 60
UNIT ns ns ns ns
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DM134BDM135B
Test Circuit
DC characteristic
IDD
VDD ENABLE IIL ,IIH CLOCK LATCH VIL ,VIH SERIAL-IN R-EXT GND
OUT0 IOL
OUT15 SERIAL-OUT
I ref
AC characteristic
VIL ,VIH ENABLE SWMATRIX CLOCK LATCH SERIAL-IN
VDD
RL OUT0 CL RL OUT15 SERIAL-OUT CL
R-EXT GND
CL
VL
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Timing Diagram
1. CLOCK-SERIAL-IN, SERIAL-OUT, OUTn (current)
tr twCLK
90% 50% 10% 90% 50% 10%
tf
twCLK
50%
CLOCK
tsetup
thold
50%
SERIAL-IN
50%
tor OUTn (current) tpLH
50% 90% 50% 10%
tof
90% 50% 10%
tpHL
50%
SERIAL-OUT tpLH tpHL
2. CLOCK-LATCH
50%
CLOCK
SERIAL-IN
"L" level = DATA HOLD thold(L) LATCH tsetup(L)
50% 50%
3. ENABLE-OUTn (current)
ENABLE
50% 50%
tpLH
tpHL
50%
OUTn(current)
50%
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DM134BDM135B
Output Current vs. External Resistor
DM134B
100 90 80 70 60 50 40 30 20 0 200 400 Rext (Ohm) 600 800
DM135B
70.00
Iout (mA)
Iout (mA)
60.00
50.00
40.00
30.00
20.00
10.00
0.00 0 500 1000 1500 Rext (Ohm) 2000 2500 3000 3500
Note:
Conditions: Vref=1.28V DM134B:Iout Vref / Rext * 13.1, DM135B:Iout Vref / Rext * 13.7. The resistor should be placed as close to the Rext terminal as possible to avoid the noise influence.
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Output Current Performance vs. Output Voltage
DM134B
Io u t - V o u t 100 90 80 70 Iout(mA) 60 50 40 30 20 10 0 0 0 .2 0 .4 0 .6 0 .8 1 V o u t(V ) 1 .2 1 .4 1 .6 1 .8 2
DM135B
Io u t - V o u t 70 60 50 Iout (mA) 40 30 20 10 0 0 0 .2 0 .4 0 .6 0 .8 1 V o u t (V ) 1 .2 1 .4 1 .6 1 .8 2
Note: In order to obtain a good constant current output, a suitable output voltage is necessary. Users can get related information about the minimum output voltage from the above graphs. Even under the same output current condition, the minimum output voltage required for each part is different.
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Imax - Ta ( DM134 ) 100.00 90.00 80.00 70.00 Imax (mA) 60.00 50.00 40.00 30.00 20.00 10.00 0.00
Vdd = 5V Vout = 1.5V 16bit Active SSOP DIP QFN
Pd - Ta 3.50 3.00
DIP QFN
2.50 Pd (W) 2.00 1.50 1.00 0.50 0.00 0 20 40 60 80 Ta 100 120 140 160
SSOP SOP
SOP
0
20
40
60
80 Ta
100 120 140 160
Imax - Ta ( DM135 ) 60.00 50.00 40.00 Imax (mA)
SSOP
DIP SOP
QFN
30.00 20.00 10.00 0.00 0
Vdd = 5V Vout = 1.5V 16bit Active
20
40
60
80 Ta
100 120 140 160
Note As the power dissipation of a semiconductor chip is limited by its package and ambient temperature, this device requires a maximum output current given by an operating condition. The maximum allowable power consumption (Pd (max)) of this device is calculated as follows: (Tj (junction temperature) (max) - Ta (ambient temperature) )(C ) Pd (max)(Watt ) = Rth (C / Watt ) Based on the Pd (max), the maximum allowable current can be calculated as follows: Iout = ( Pd - VDDIDD) / ( # outputsVoDuty )
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
System Configuration Example
[1] Output current (IOUT) Sink current is set by the external resistor as shown in the figure of Iout vs. Rext. [2] LED supply voltage (VLED) setup VLED = VCE ( Tr Vsat ) + Vf ( LED forward voltage ) + VO ( IC output voltage) To prevent too much power from dissipating by the higher VLED of the device, an additional R can be used to reduce the Vout when the outputs consume current is as follows:
VLED - VCE - V f - VO (min) I O (max) * Bit (max)
VLED = 3~4 (V)
R=
SCAN OUT0 ENABLE CLOCK LATCH SERIAL-IN R-EXT GND OUT15 SERIAL-OUT
Vf -- Vo
VCE --
R
CPU
OUT0 ENABLE CLOCK LATCH SERIAL-IN R-EXT GND OUT15 SERIAL-OUT
Note
This device has only one ground pin shared by signal, output sink current, and power ground. It is advisable to pattern the ground layout with minimized inductance so that the switching noise induced by the input signals and the output sink current would not cause chip malfunction. To prevent drivers' outputs from damaging by overshoot stresses, it is also advisable not to turn off the drivers and scan transistors simultaneously. For the QFN package, the IC's thermal pad, which is internally connected to the bottom side of chip, should be connected to GND. In addition, a good PCB layout pattern of the thermal pad is required in order to have a better performance in thermal effect.
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Package Outline P-DIP 24
UNITINCH
1.250 0.03 =7 ~15 0.258 0.005
0.130 0.05 0.130 0.02 SEATING PLANE 0.210
0.100typ 0.018typ
0.060typ
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0.355 0.02
0.300

SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Package Outline DIP(Shr)
D
24
13
E1
1
12
A2
A
SEATING PLANE
b1 b
e
DIMENSIONS IN INCH SYMBOLS A A1 A2 b b1 D E E1 E2 e L 0 MIN. 0.015 0.125 0.040TYP. 0.018TYP. 0.880 0.300TYP. 0.245 0.335 0.070TYP. 0.115 0.150 15 0.255 0.3750.920 MAX. 0.210 0.135
A1
L
DIMENSIONS IN MM MIN. 0.381 3.175 1.016TYP. 0.457TYP. 22.352 6.223 8.509 2.921 0 23.368 7.620TYP. 6.477 9.525 1.778TYP. 3.810 15 MAX. 5.334 3.429
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E

SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Package Outline SOP24
UNITINCH
0.295 0.004
0.406 0.013
0.016typ
0.050typ
0.600 0.014 0.099 0.006
0.020*45
0.0350.015
0.010
0.004max
16-Bit Constant Current LED Drivers
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0.012max
=0~8
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Package Outline SSOP24
UNITINCH
0.154 0.004
0.236 0.008
0.012typ
0.025typ
0.020*45
0.341 0.004 0.064 0.011
0.025+0.025 -0.009
0.010
0.004max
16-Bit Constant Current LED Drivers
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0.01max
=0~8
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SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
Package Outline QFN32
TOP VIEW
0.25 C
BOTTOM VIEW
D2
25 24 24 25 32 1
D
32 1
e
8 0.25 C 9 16
17
17
8 16 9
L
e
0.10 C
b
0.10
M
CAB
SEATING PLANE A3 A1
A
yC
SYMBOL A A1 A3 b D D2 E E2 e L y MIN. 0.70 0 0.18 1.25 1.25 0.30
DIMENSION (mm) NOM. 0.75 0.02 0.25 REF 0.23 5.00 BSC 2.70 5.00 BSC 2.70 0.50 BSC 0.40 0.10
MAX. 0.80 0.05 0.30 3.25 3.25 0.50
MIN. 27.6 0 7.09 49.21 49.21 11.81
DIMENSION (MIL) NOM. 29.5 0.79 9.84 REF 9.06 196.85 BSC 106.30 196.85 BSC 106.30 19.69 BSC 15.75 3.94
MAX. 31.5 1.97 11.81 127.95 127.95 19.69
Note: 1.DIMENSIONING AND TOLERANCING CONFORM TO ASME Y145.5M-1994. 2. REFER TO JEDEC STD. MO-220 WHHD-2 ISSUE A
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E

SILICON TOUCH TECHNOLOGY INC.
DM134BDM135B
The products listed herein are designed for ordinary electronic applications, such as electrical appliances, audio-visual equipment, communications devices and so on. Hence, it is advisable that the devices should not be used in medical instruments, surgical implants, aerospace machinery, nuclear power control systems, disaster/crime-prevention equipment and the like. Misusing those products may directly or indirectly endanger human life, or cause injury and property loss. Silicon Touch Technology, Inc. will not take any responsibilities regarding the misusage of the products mentioned above. Anyone who purchases any products described herein with the above-mentioned intention or with such misused applications should accept full responsibility and indemnify. Silicon Touch Technology, Inc. and its distributors and all their officers and employees shall defend jointly and severally against any and all claims and litigation and all damages, cost and expenses associated with such intention and manipulation.
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