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zdb fanout Datasheet PDF File

For zdb fanout Found Datasheets File :: 33 Search Time::1.266ms
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					Silicon Laboratories, Inc.
Part No.	SL2309ZI-1HT
OCR Text	...d low power zero delay buffer (zdb) designed to produce up to nine (9) clock outputs from one (1) reference input clock, for high speed c...fanout buffer (nzdb). the high - drive (- 1h) versio n operates up to 140 mhz and low drive...
Description	2309 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 4.40 MM, ROHS COMPLIANT, TSSOP-16
File Size	133.19K / 12 Page	View it Online	Download Datasheet

					Integrated Device Technology
Part No.	9DB1904BKLF 9DB1904BKLFT
OCR Text	...perates as a zero-delay buffer (zdb) with the pll operating. 0 = fanout mode (pll bypassed), 1 = zdb mode (pll used) idt ? 19 output differential buffer for pcie gen2 and qpi 1607c ?04/19/11 9db1904b 19 output differential buffer for p...
Description	19 Output Differential Buffer for PCIe Gen2 and QPI
File Size	180.96K / 18 Page	View it Online	Download Datasheet

					Integrated Device Technology
Part No.	9DB1933AKLF 9DB1933AKLFT
OCR Text	...erates as a zer o-delay buffer (zdb) with the pll operating. 0 = fanout mode (pll bypassed), 1 = zdb mode (pll u sed) idt ? nineteen output differential buffer for pcie gen3 9db1933 nineteen output differential buffer for pcie gen3 5 1...
Description	Nineteen Output Differential Buffer for PCIe Gen3
File Size	183.51K / 17 Page	View it Online	Download Datasheet

					Silicon Laboratories, Inc. HIROSE ELECTRIC Co., Ltd.
Part No.	SL23EP08SC-2T SL23EP08SC-2H
OCR Text	... 220 mhz zero dela y buffer ( zdb ) key features ? 10 to 220 mhz operating frequency range ? low output clock skew: 70ps-typ ? l...fanout buffer. high and low-drive product options the sl23ep08 is offered with high drive ?-1...
Description	23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 0.150 INCH, ROHS COMPLIANT,SOIC-16
File Size	239.03K / 18 Page	View it Online	Download Datasheet

					Silicon Laboratories, Inc. ETC List of Unclassifed Manufacturers
Part No.	SL2309ZC-1 SL2309SC-1 SL2309SC-1H SL2309SC-1HT SL2309SC-1T SL2309SI-1 SL2309SI-1H SL2309SI-1HT SL2309SI-1T SL2309ZI-1HT SL2309ZI-1T SL2309ZC-1H SL2309ZC-1HT SL2309ZC-1T
OCR Text	zdb) designed to produce up to nine (9) clock outputs from one (1) reference input clock, for high speed clock distribution applications. Th...fanout buffer. In this operation mode the input power-down detection circuit is disabled and outputs...
Description	2309 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 4.40 MM, ROHS COMPLIANT, TSSOP-16 Low Jitter and Skew 10 to 140 MHz Zero Delay Buffer (zdb)
File Size	176.84K / 12 Page	View it Online	Download Datasheet

					SpectraLinear Inc
Part No.	SL23EP09ZC-1 SL23EP09SC-1 SL23EP09SC-1H SL23EP09SC-1HT SL23EP09SC-1T SL23EP09SI-1 SL23EP09SI-1H SL23EP09SI-1HT SL23EP09SI-1T SL23EP09ZI-1HT SL23EP09ZI-1T SL23EP09ZC-1H SL23EP09ZC-1T SL23EP09ZC-1HT
OCR Text	zdb) Key Features 10 to 220 MHz operating frequency range Low output clock skew: 45ps-typ Low output clock jitter: 25 ps-typ cycle-to-cycl...fanout buffer. High and Low-Drive Product Options The SL23EP09 is offered with High-Drive "-1H" and ...
Description	Low Jitter and Skew 10 to 220MHz Zero Delay Buffer (zdb)
File Size	153.82K / 13 Page	View it Online	Download Datasheet

					SpectraLinear Inc
Part No.	SL2309ZC-1 SL2309SC-1 SL2309SC-1H SL2309SC-1HT SL2309SC-1T SL2309SI-1 SL2309SI-1H SL2309SI-1HT SL2309SI-1T SL2309ZI-1HT SL2309ZI-1T SL2309ZC-1H SL2309ZC-1HT SL2309ZC-1T
OCR Text	zdb) Key Features 10 to 140 MHz operating frequency range Low output clock skew: 50ps-typ Low output clock jitter: 50 ps-typ cycle-to-cycl...fanout buffer. In this operation mode the input power-down detection circuit is disabled and outputs...
Description	Low Jitter and Skew 10 to 140MHz Zero Delay Buffer (zdb)
File Size	139.81K / 12 Page	View it Online	Download Datasheet

					Integrated Circuit Systems
Part No.	ICS9FG1904B-1 ICS9FG1904BK-1LFT
OCR Text	...perates as a zero-delay buffer (zdb) with the PLL operating. 0 = fanout mode (PLL bypassed), 1 = zdb mode (PLL used) 1255B--08/03/07 3 Integrated Circuit Systems, Inc. ICS9FG1904B-1 General Description ThThe ICS9FG1904-1 fol...
Description	Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD
File Size	218.71K / 22 Page	View it Online	Download Datasheet

					Integrated Device Technology
Part No.	ICS9FG1201HFLF-T ICS9FG1201HGLF-T ICS9FG1201H
OCR Text	...perates as a zero-delay buffer (zdb) with the PLL operating. 0 = fanout mode (PLL bypassed), 1 = zdb mode (PLL used) Active low input for enabling DIF pair 6. 1 = tri-state outputs, 0 = enable outputs 0.7V differential complement clock outp...
Description	Frequency Generator for CPU, PCIe Gen1 & Fully Buffered DIMM Clocks
File Size	261.89K / 21 Page	View it Online	Download Datasheet

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