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Cypress Semiconductor, Corp.
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| Part No. |
CY2308AZC-1H CY2308AZC-2T CY2308AZC-1T CY2308AZI-1H
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| OCR Text |
... 650-ps total timing budget ? (ttb ? ) window multiple configurations (see table 2 ) eight low-skew outputs ? output-output skew < 200 ps ? device-device skew < 500 ps input-output skew < 250 ps three-stateable outputs < 50- a... |
| Description |
2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 4.40 MM, TSSOP-16
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| File Size |
68.67K /
8 Page |
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it Online |
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Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY2309AZC-1HT CY2309AZI-1HT CY2309AZC-1T
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| OCR Text |
...0-ps max. total timing budget? (ttb?) window nine low-skew outputs, grouped as 4 + 4 + 1 ? output-output skew < 200 ps ? device-device skew < 500 ps input-output skew < 250 ps cycle-cycle jitter < 100 ps three-stateable outputs < ... |
| Description |
2309 SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 4.40 MM, TSSOP-16
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| File Size |
69.46K /
9 Page |
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it Online |
Download Datasheet |
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pmc
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| Part No. |
1990996
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| OCR Text |
...TDFR Receive
Transmit
1/2 ttb Transmit
IEEE P1149.1 DTCA TRAN J2, E3 OR DS3 SPLT Transmit ATM and PLCP Framer TDAT [15:0] TPRTY TXCP_50 Transmit PRGD BER TXFF Transmit TSOC TCA TADR [2:0] TENB TFCLK System RXFF Receive 4-Cell PHY_A... |
| Description |
From old datasheet system
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| File Size |
92.58K /
2 Page |
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it Online |
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Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
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| Part No. |
CY23020LFI-3T
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| OCR Text |
...-ps max total timing budget ? (ttb ? ) window 10 lvpecl outputs 1 lvpecl differential input selectable output frequency range from 100 to 400 mhz multiply by 2 option 15-ps rms cycle-cycle jitter power-down mode lock indicato... |
| Description |
10-output, 400-MHz LVPECL Zero Delay Buffer 23020 SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC48
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| File Size |
109.87K /
9 Page |
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it Online |
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