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Silicon Laboratories Inc.
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| Part No. |
CP2112-F01-GM
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| OCR Text |
...ad/write requests ?? read/write timeouts ?? scl low timeout ?? retry counter timeout gpio interface features ?? 8 gpio pins with configurable options ?? usable as inputs, open-drain or push-pull outputs ?? configurable clock output for exte... |
| Description |
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| File Size |
190.73K /
20 Page |
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it Online |
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Alliance Semiconductor
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| Part No. |
ASM1232LPS
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| OCR Text |
...that is "hung-up". The watchdog timeouts periods are selectable: 150ms, 610ms and 1200ms. If the ST input is not strobed LOW before the time-out period expires, a reset is generated. Devices are available in 8-pin DIP, 16-pin SO and compact... |
| Description |
5V uP Power Supply Monitor and Reset Circuit
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| File Size |
293.67K /
10 Page |
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it Online |
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Maxim Integrated Products, Inc.
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| Part No. |
MAX16058ATA26T
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| OCR Text |
...- adjustable reset and watchdog timeouts ________________________________________________________________ maxim integrated products 1 1 12 3 65 4 34 865 v cc wdi srt max16056 max16058 max16057 max16059 2 7 wds v cc srt n.c. reset swt ep ep ... |
| Description |
125nA Supervisory Circuits with Capacitor-Adjustable Reset and Watchdog timeouts; Package: Land Pattern: Not Available; Temperature: -40°C to 125°C 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC8
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| File Size |
706.62K /
17 Page |
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Micrel Semiconductor, Inc.
Micrel Semiconductor,Inc.
MICREL[Micrel Semiconductor]
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| Part No. |
MIC2772 MIC2772-T3T3YML MIC6315-29D2 MIC6315-29D3 MIC6315-31D2 MIC6315-31D3 MIC6315-44D2 MIC6315-44D3 MIC6315-46D2 MIC6315-46D3 MIC811S MIC2772-L2L3YML MIC2772-L3L3BML MIC2772-L3L3YML MIC2772-L3T3YML MIC2772-M2M3YML MIC2772-M3M3BML MIC2772-M3M3YML MIC2772-M3S3YML MIC2772-S2S3YML MIC2772-S3S3BML MIC2772-S3S3YML MIC2772-T2T3YML MIC2772-T3T3BML MIC811L MIC811M MIC811T MIC2772-M2M3YMLTR MIC2772-S3S3YMLTR MIC2772-L3L3YMLTR MIC2772-M3M3YMLTR MIC2772-L3T3YMLTR MIC2772-S2S3YMLTR MIC2772-T2T3YMLTR MIC2772-M3S3YMLTR MIC2772-L2L3YMLTR
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| OCR Text |
...back above the threshold. Reset timeouts of 20, 140, and 1100ms (minimum) are available. A reset can be generated at any time by asserting the manual reset input, /MR. This input is internally de-bounced, and the reset output will remain ac... |
| Description |
FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN 双电压监
Dual Voltage Supervisor 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 2 X 2 MM, LEAD FREE, MLF-8
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| File Size |
142.16K /
9 Page |
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it Online |
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Price and Availability
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