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XILINX
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| Part No. |
XCF01 XCF16PFS48
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| OCR Text |
...lso be programmed by the Xilinx multipro Desktop Tool or a third-party device
4
www.xilinx.com 1-800-255-7778
DS123 (v2.1) November 18, 2003 Preliminary Product Specification
R
Platform Flash In-System Programmable Configurat... |
| Description |
Configuration Proms
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| File Size |
306.03K /
37 Page |
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Xilinx
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| Part No. |
XCF32S
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| OCR Text |
...lso be programmed by the Xilinx multipro Desktop Tool or a third-party device programmer. This provides the added flexibility of using pre-programmed devices with an in-system programmable option for future enhancements and design changes.
... |
| Description |
Platform Flash In-System Programmable Configuration PROMS
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| File Size |
351.69K /
42 Page |
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it Online |
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CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY7C0241E-15AXI CY7C0241E-25AXC CY7C0241E-15AXC CY7C024E-55AXC CY7C024E-15AXC CY7C024E-25AXC CY7C024E-25AXI CY7C0251E-15AXC
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...on areas include interprocessor/multipro cessor designs, communications status buffering, and dual-port video/graphics memory. each port has independent control pins: chip enable (ce ), read or write enable (r/w ), and output enable (oe ).... |
| Description |
4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
4K X 18 DUAL-PORT SRAM, 15 ns, PQFP100
8K X 18 DUAL-PORT SRAM, 15 ns, PQFP100
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| File Size |
272.97K /
22 Page |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C457 CY7C455 CY7C456
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...ng high-speed data acquisition, multipro- cessor interfaces, and communications buffering. these fifos have 18-bit input and output ports that are con- trolled by separate clock and enable signals. the input port is controlled by a free-run... |
| Description |
2K x 18 Cascadable Clocked FIFOs with Programmable Flags(带可编程标记Kx18可级联定时的先进先出)
512 x 18 Cascadable Clocked FIFOs with Programmable Flags(带可编程标记12x18可级联定时的先进先出)
1K x 18 Cascadable Clocked FIFOs with Programmable Flags(带可编程标记Kx18可级联定时的先进先出)
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| File Size |
440.38K /
22 Page |
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it Online |
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