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Part No. |
M366S0824CT0-C1L M366S0824CT0-C1H
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OCR Text |
...unction a0 ~ a11 address input (multiplexed) ba0 ~ ba1 select bank dq0 ~ dq63 data input/output clk0 ~ clk3 clock input cke0 ~ cke1 clock enable input cs0 ~ cs3 chip select input ras row address strobe cas column address strobe we write e... |
Description |
8M X 64 SYNCHRONOUS DRAM MODULE, 6 ns, DMA168
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File Size |
137.24K /
9 Page |
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TERIDIAN SEMICONDUCTOR CORP
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Part No. |
73K224BL-IGT
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OCR Text |
...dem functions through its 8-bit multiplexed address/data bus or via an optional serial control bus. an ale control simplifies address demultiplexing. data communications normally occur through a separate serial port. ( continued) features ... |
Description |
2.4 kbps DATA, MODEM, PQFP44
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File Size |
159.72K /
33 Page |
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it Online |
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INTEL[Intel Corporation]
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Part No. |
88CO196EC
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OCR Text |
...t pins -- Dynamic demultiplexed/multiplexed address/data bus for each chip-select -- Programmable wait states (0, 1, 2, or 3) for each chip-select -- Programmable bus width (8- or 16-bit) for each chip-select -- Programmable address range f... |
Description |
CHMOS 16-Bit Microcontroller
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File Size |
376.02K /
44 Page |
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it Online |
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Part No. |
EM6521VVVSW11B
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OCR Text |
... lcd 20 segments, 3 or 4 times multiplexed 3 wire serial port , 8 bit, master and slave mode 5 external interrupts (port a, serial interface) 8 internal interrupts (3x prescaler, bcd counter 2x10-bit counter, melody timer, serial ... |
Description |
4-BIT, EEPROM, 0.032768 MHz, RISC MICROCONTROLLER, UUC52
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File Size |
776.55K /
70 Page |
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it Online |
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Philips
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Part No. |
SAA716WP5
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OCR Text |
... mhz 8-bit luminance and 8-bit multiplexed colour-difference formats (7-bit formats optional) mc input to support various clock and pixel rates formatting yuv input data; 4 :2:2 format, 4:1:1 format and filter characteristics selectable ... |
Description |
Video enhancement and digital-to-analog processor (VEDA2).
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File Size |
204.14K /
28 Page |
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it Online |
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AMICC[AMIC Technology]
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Part No. |
A43L0632G-7UF A43L0632 A43L0632G-6UF A43L0632G-7F
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OCR Text |
...DQ : 3.3V LVTTL compatible with multiplexed address Two banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2 & 3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) Clock Frequency (max) : 167MHz @... |
Description |
512K X 32 Bit X 2 Banks Synchronous DRAM
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File Size |
1,302.73K /
44 Page |
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it Online |
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Price and Availability
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