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ICS
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| Part No. |
ICS813001I
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| OCR Text |
femtoclocktm PLL
FEATURES
* One 3.3V or 2.5V LVPECL output pair * Two selectable crystal oscillator interfaces for the VCXO, one differential clock or one LVCMOS/LVTTL clock inputs * CLK1 and nCLK1 supports the following input types: LVPE... |
| Description |
Dual VCXO FemtoClock? PLL
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| File Size |
214.58K /
16 Page |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS840002-32 ICS840002BG-32T ICS840002BG-32
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| OCR Text |
...IN ASSIGNMENT
Q0
XTAL_IN
femtoclocktm
XTAL_OUT Q1
VDD XTAL_OUT XTAL_IN GND
1 2 3 4
8 7 6 5
SEL Q0 VDDO Q1
ICS840002-32
SEL
8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View
The Preliminary I... |
| Description |
FEMTOCLOCKS CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
2 Output LVCMOS/LVTTL Frequency Synthesizer
FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
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| File Size |
131.11K /
8 Page |
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ICS
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| Part No. |
ICS843002-31
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| OCR Text |
...ncy translation ratio options * femtoclocktm frequency multiplier supports rate of: 560MHz - 700MHz * `Lock Detect' output reports lock status of VCXO PLL * VCXO PLL circuit provides jitter attenuation with loop bandwidth of 250Hz and below... |
| Description |
700MHz, FemtoClock? VCXO Based Frequency Translator and Jitter Attenuator
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| File Size |
276.08K /
24 Page |
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it Online |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS843002I-40 ICS43002A40 ICS843002AKI-40 ICS843002AKI-40T
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| OCR Text |
...bypass VCXO PLL bypass VCXO and femtoclocktm PLL's
TABLE 3C. OUTPUT DIVIDER SELECTION FUNCTION TABLE
Inputs Qx_SEL1:0 00 01 10 11 Output Divider Value or State Output Q and nQ Hi-Z /32 /8 /4
843002AKI-40
www.icst.com/products/hipe... |
| Description |
175MHZ, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR
175MHz, FemtoClock? VCXO Based SONET/SDH Jitter Attenuator
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| File Size |
262.31K /
21 Page |
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it Online |
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ICS
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| Part No. |
ICS843002I-41
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| OCR Text |
...tter by using a low phase noise femtoclocktm VCO. PLL multiplication ratios are selected from internal lookup tables using device input selection pins. The device performance and the PLL multiplication ratios are optimized to support non-FE... |
| Description |
700MHz, FemtoClock? VCXO Based SONET/SDH Jitter Attenuator
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| File Size |
274.06K /
21 Page |
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it Online |
Download Datasheet |
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