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CY7C1351 A25F40 SG12864 MSU2031 HD74S174 MAX687 B0515 TXV1N
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    ISPLSI5512VA-100LB272 ISPLSI5512VA-70LQ208 5512VA ISPLSI5512VA-100LB388 ISPLSI5512VA-100LQ208 ISPLSI5512VA-125LB272 ISPL

LATTICE[Lattice Semiconductor]
Part No. ISPLSI5512VA-100LB272 ISPLSI5512VA-70LQ208 5512VA ISPLSI5512VA-100LB388 ISPLSI5512VA-100LQ208 ISPLSI5512VA-125LB272 ISPLSI5512VA-125LB388 ISPLSI5512VA-125LQ208 ISPLSI5512VA-70LB272 ISPLSI5512VA-70LB388 ISPLSI5512VA-70LB388I ISPLSI5512VA-110LB388 ISPLSI5512VA-110LQ208
OCR Text ...fficient use of this feature to construct high-speed input registers. Macrocell registers can be clocked from one of several global or product term clocks available on the device. A global and product term clock enable is also provided, eli...
Description 70 MHz in-system prommable 3.3V superWIDE high density PLD
In-System Programmable 3.3V SuperWIDE⑩ High Density PLD
In-System Programmable 3.3V SuperWIDE High Density PLD
110 MHz in-system prommable 3.3V superWIDE high density PLD

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    VSC9182

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Vitesse Semiconductor Corporation
Part No. VSC9182
OCR Text ...hree layer Clos architecture to construct larger switches, up to 1024 OC-48 ports. The VSC9182 is designed to interface directly with the VSC9186 10Gb/s Pointer Processor & Frame Aligner and VSC9180 2.5Gb/s Backplane Transceiver. TXD[63....
Description VSC9182 - 40G STS-1 Time Slot Interchange
VSC9182 - 40G STS-1 Time Slot Interchange

File Size 107.87K  /  2 Page

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    LODEV[LOGIC Devices Incorporated]
Part No. LF2301 LF2301JC55 LF2301JC25
OCR Text ... a pair of LF2301s in tandem to construct an ITS. One LF2301 is the row coordinate generator (x to u) and the other is the column generator (y to v). External RAM is needed for storage of the interpolation coefficient lookup table, as well ...
Description Image Resampling Sequencer

File Size 332.80K  /  18 Page

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    ISPLSI5128VE-180LT128 ISPLSI5128VE-180LT128I ISPLSI5128VE

LATTICE[Lattice Semiconductor]
Part No. ISPLSI5128VE-180LT128 ISPLSI5128VE-180LT128I ISPLSI5128VE
OCR Text ...fficient use of this feature to construct high-speed input registers. Macrocell registers can be clocked from one of several global or product term clocks available on the device. A global and product term clock enable is also available to ...
Description In-System Programmable 3.3V SuperWIDE High Density PLD

File Size 206.47K  /  21 Page

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    UTC3563 3563

UTC[Unisonic Technologies]
Part No. UTC3563 3563
OCR Text ...ice is specifically designed to construct a constant current source for battery chargers with a minimum number of external components. Bootstrapped driver can drive the NPN output switch to saturation for higher efficiency and less heat dis...
Description LINEAR INTEGRATED CIRCUIT

File Size 159.55K  /  10 Page

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    AD642S AD642K AD642 AD642J AD642L

Analog Devices
Part No. AD642S AD642K AD642 AD642J AD642L
OCR Text ...in Figure 26 uses two AD642s to construct an instrumentation amplifier with low input current (35 pA max), high linearity and low offset voltage and offset voltage drift. The AD644 may be substituted for increased speed, but the higher open...
Description Precision, Low Cost Dual BiFET Op Amp

File Size 387.13K  /  6 Page

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    PVN012APBF

List of Unclassifed Manufacturers
Part No. PVN012APBF
OCR Text ... all of the functions needed to construct an ITU V.32 bis automodem, or a V.32, V.22 bis, V.22, V.21 and Bell 202/Bell 103 compatible modem operating under the control of external host timing. The CMX869B boasts a fully-integrated HDLC fram...
Description Microchip Unveils Unique Features on 1.5 Amp LDO Regulator

File Size 327.29K  /  4 Page

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