Description |
CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9 or='#FF0000'>4096 or='#FF0000'>x 9 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 RES,SMD,100,1%,0.063W,0603 High-speed double diode - Cd maor='#FF0000'>x.: 1.5 pF; Configuration: dual c.c. ; IF maor='#FF0000'>x: 215 mA; IFSM maor='#FF0000'>x: or='#FF0000'>4 A; IR maor='#FF0000'>x: 500@VR=80V nA; IFRM: 500 mA; trr maor='#FF0000'>x: or='#FF0000'>4 ns; VFmaor='#FF0000'>x: 1@IF=50mA mV; VR maor='#FF0000'>x: 80 V Schottky barrier diode - Cd maor='#FF0000'>x.: 100@VR=or='#FF0000'>4V pF; Configuration: single ; IF: 1 A; IFSM maor='#FF0000'>x: 25 A; IR maor='#FF0000'>x: 1@VR=25V mA; VFmaor='#FF0000'>x: or='#FF0000'>450@IF=1A mV; VR: 25 V CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9/ or='#FF0000'>4096 or='#FF0000'>x 9/ 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 Trenchmos (tm) logic level FET - Configuration: Single N-channel ; I<sub>D</sub> DC: 0.3or='#FF0000'>4 A; R<sub>DS(on)</sub>: 3900@10V5300@or='#FF0000'>4.5V mOhm; V<sub>DS</sub>maor='#FF0000'>x: 60 V 异步fifo的CMOS 20or='#FF0000'>48 × 9096 × 9192 × 9638or='#FF0000'>4 × 9 InsERT, COAor='#FF0000'>x FEMALE STRAIGHTInsERT, COAor='#FF0000'>x FEMALE STRAIGHT; Impedance:50R; Coaor='#FF0000'>xial cable type:RG17or='#FF0000'>4AU/RG188AU/RG3or='#FF0000'>16AU or='#FF0000'>16K or='#FF0000'>x 9 OTHER fifo, 50 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 30 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 异步fifo的CMOS 20or='#FF0000'>48 × 9096 × 9192 × 9638or='#FF0000'>4 × 9 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>16K or='#FF0000'>x 9 OTHER fifo, 50 ns, CQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>16K or='#FF0000'>x 9 OTHER fifo, 50 ns, PDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>16K or='#FF0000'>x 9 OTHER fifo, 50 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 20 ns, PQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 8K or='#FF0000'>x 9 OTHER fifo, 50 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 80 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 80 ns, PDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 25 ns, CQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 8K or='#FF0000'>x 9 OTHER fifo, 20 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 20 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 8K or='#FF0000'>x 9 OTHER fifo, 50 ns, CQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 20 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 20 ns, PDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 65 ns, PDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 65 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 50 ns, CDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 50 ns, PQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 25 ns, PDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 50 ns, PQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 or='#FF0000'>4K or='#FF0000'>x 9 OTHER fifo, 65 ns, CQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 65 ns, CQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 65 ns, PDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 80 ns, PDIP28 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 80 ns, CQCC32 CMOS ASYNCHRONOUS fifo 20or='#FF0000'>48 or='#FF0000'>x 9, or='#FF0000'>4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and or='#FF0000'>1638or='#FF0000'>4 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 80 ns, CDIP28
|