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  zdb fanout Datasheet PDF File

For zdb fanout Found Datasheets File :: 44    Search Time::3.484ms    
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    ICS9DB401 ICS9DB401YFLFT

Integrated Circuit Systems
Part No. ICS9DB401 ICS9DB401YFLFT
OCR Text ... select Bypass(fan-out) or PLL (zdb) mode 0 = Bypass mode, 1= PLL mode Clock pin of SMBus circuitry, 5V tolerant. Data pin for SMBus circuitry, 5V tolerant. Asynchronous active low input pin used to power down the device. The internal clock...
Description Four Output Differential Buffer for PCI Express

File Size 160.49K  /  16 Page

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    NB3N1200KMNTXG NB3W1200LMNTXG NB3W1200LMNG

ON Semiconductor
Part No. NB3N1200KMNTXG NB3W1200LMNTXG NB3W1200LMNG
OCR Text ...al 1:12 hcsl or push-pull clock zdb/fanout buffer for pcle description the nb3n1200k and nb3w1200l differential clock buffers are db1200z and db1200zl compliant and are designed to work in conjunction with a pcie compliant source clock syn...
Description Differential 1:12 HCSL or Push-Pull Clock zdb/fanout Buffer for PCle

File Size 249.63K  /  26 Page

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    NB3W1200L

ON Semiconductor
Part No. NB3W1200L
OCR Text ...al 1:12 hcsl or push-pull clock zdb/fanout buf fer for pcle description the nb3n1200k and nb3w1200l dif ferential clock buf fers are db1200z and db1200zl compliant and are designed to work in conjunction with a pcie compliant source cloc...
Description 3.3V 100MHz - 133MHz Differential 1:12 HCSL or Push-Pull Clock zdb - fanout Buffer

File Size 358.04K  /  26 Page

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    Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Part No. ICS9DB108 ICS9DB108YFLFT
OCR Text ... select Bypass(fan-out) or PLL (zdb) mode 0 = Bypass mode, 1= PLL mode Clock pin of SMBus circuitry, 5V tolerant. Data pin for SMBus circuitry, 5V tolerant. 0723D--01/08/04 2 Integrated Circuit Systems, Inc. ICS9DB108 Pin Des...
Description From old datasheet system
Clock Buffer
Eight Output Differential Buffer for PCI-Express 8个输出差分缓冲器支持PCI - Express

File Size 106.12K  /  15 Page

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    ICS9DB401CGLFT ICS9DB401CFLFT

Integrated Device Technology
Part No. ICS9DB401CGLFT ICS9DB401CFLFT
OCR Text ... select bypass(fan-out) or pll (zdb) mode 0 = bypass mode, 1= pll mode 13 sclk in clock pin of smbus circuitry, 5v tolerant. 14 sdata i/o data pin for smbus circuitry, 5v tolerant. 15 pd# in asynchronous active low input pin used to powe...
Description Four Output Differential Buffer for PCI Express

File Size 239.76K  /  17 Page

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    ICS9DB104 ICS9DB104YFLFT

Integrated Device Technology, Inc.
ICST[Integrated Circuit Systems]
Part No. ICS9DB104 ICS9DB104YFLFT
OCR Text ... select Bypass(fan-out) or PLL (zdb) mode 0 = Bypass mode, 1= PLL mode Clock pin of SMBus circuitry, 5V tolerant. Data pin for SMBus circuitry, 5V tolerant. Asynchronous active low input pin used to power down the device. The internal clock...
Description Four Output Differential Buffer for PCI-Express 四差分缓冲器,用于输出的PCI - Express

File Size 102.38K  /  13 Page

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    9DB1233 9DB1233AGLFT

Integrated Device Technology
Integrated Circuit Syst...
Part No. 9DB1233 9DB1233AGLFT
OCR Text ... select bypass(fan-out) or pll (zdb) mode 0 = bypass mode, 1= pll mode 36 vttpwrgd#/pd in vttpwrgd# is an active low input used to sample lat ched inputs and allow the device to power up. pd is an asynchronous active high input pin used...
Description Twelve Output Differential Buffer for PCIe Gen3
SMBus Interface/unused outputs can be disabled

File Size 183.95K  /  15 Page

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    9DB1200CGLF 9DB1200CGLFT

Integrated Device Technology
Part No. 9DB1200CGLF 9DB1200CGLFT
OCR Text ... select bypass(fan-out) or pll (zdb) mode 0 = bypass mode, 1= pll mode 36 vttpwrgd#/pd in vttpwrgd# is an active low input used to sample latched inputs and allow the device to power up. pd is an asynchronous active high input pin used t...
Description Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM

File Size 155.36K  /  14 Page

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For zdb fanout Found Datasheets File :: 44    Search Time::3.484ms    
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