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For transfers Found Datasheets File :: 8825 Search Time::2.094ms
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				MICROCHIP[Microchip Technology]
Part No.	TCN75-3.3MOA TCN75-5.0MOA TCN75-5.0MUA TCN75-3.3MUA TCN75
OCR Text	...ch controls the bus: initiating transfers (Start), generating the clock, and terminating transfers (Stop). The device addressed by the master. A unique condition signaling the beginning of a transfer indicated by SDA falling (High - Low) wh...
Description	2-Wire Serial Temperature Sensor and Thermal Monitor
File Size	392.97K / 20 Page	View it Online	Download Datasheet

				EXAR[Exar Corporation]
Part No.	ST16C55005 ST16C550IQ48 ST16C550 ST16C550CJ44 ST16C550CP40 ST16C550CQ48 ST16C550IJ44 ST16C550IP40
OCR Text	... strobe). A logic 0 on this pin transfers the contents of the ST16C550 data bus to the CPU. Connect to logic 1 when using IOR. Write data strobe (active low strobe). A logic 0 on this pin transfers the contents of the CPU data bus to the ad...
Description	UART WITH 16-BYTE FIFO’s
File Size	237.98K / 35 Page	View it Online	Download Datasheet

				GSI[GSI Technology]
Part No.	GS8180QV18D-200 GS8180QV18D-200I GS8180QV18D-167 GS8180QV18D-167I GS8180QV18D-133 GS8180QV18D-133I GS8180QV36D-133I GS8180QV18D GS8180QV18D-100 GS8180QV18D-100I GS8180QV36D-100 GS8180QV36D-100I GS8180QV36D-133 8180QV18 8180QV36
OCR Text	...ded because burst read or write transfers from Separate I/O SRAMs can cut the RAM's bandwidth in half. A SigmaQuad SRAM can begin an alternating sequence of reads and writes with either a read or a write. In order for any separate I/O SRAM ...
Description	Separate I/O SigmaQuads 18Mb Burst of 2 SigmaQuad SRAM
File Size	595.15K / 32 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	89HPES32NT8BG2
OCR Text	...bit and 64-bit memory-to-memory transfers ? fly-by translation provides reduced latency and increased performance over buffered approach ? supports arbitrary source a nd destination address alignment ? supports intra- as well as in ter-par...
Description	Low latency cut-through architecture
File Size	301.75K / 35 Page	View it Online	Download Datasheet

				GSI[GSI Technology]
Part No.	GS8182Q18D-200 GS8182Q18D-200I GS8182Q18D-167 GS8182Q18D-167I GS8182Q18D-133 GS8182Q18D-133I GS8182Q18D
OCR Text	...ded because burst read or write transfers from Separate I/O SRAMs can cut the RAM's bandwidth in half. A SigmaQuad-II SRAM can begin an alternating sequence of reads and writes with either a read or a write. In order for any separate I/O SR...
Description	18Mb Burst of 2 SigmaQuad-II SRAM
File Size	646.19K / 28 Page	View it Online	Download Datasheet

				STMicroelectronics
Part No.	AN2966
OCR Text	...oltage (v trip ). the number of transfers required to reach the threshold depends on the size of the electrode capacitance and represents its value. to ensure stable operation of the solution , the number of transfers needed to reach the ...
Description	Capacitor selection guide for STM8T141 capacitive sensor
File Size	154.27K / 8 Page	View it Online	Download Datasheet

				STMicroelectronics
Part No.	AN4104
OCR Text	...operations. the dma allows data transfers to take place in the background, without the intervention of the cortex-m0 processor. during this operation, the main processor can execute other tasks and it is only interrupted when a whole data...
Description	Using the STM32F0xx DMA controller
File Size	76.77K / 13 Page	View it Online	Download Datasheet

				Freescale Semiconductor...
Part No.	MPC8306S MPC8306SEC
OCR Text	...viders ? up to eight-beat burst transfers ? 16- and 8-bit ports, separate lwe for each 8 bit ? three protocol engines availabl e on a per chip select basis: ? general-purpose chip select machine (gpcm) ? three user programmable machines (u...
Description	PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
File Size	448.03K / 70 Page	View it Online	Download Datasheet

				GSI[GSI Technology]
Part No.	GS8342D08E-250 GS8342D08E-250I GS8342D08E-333 GS8342D08E-333I GS8342D08E-300 GS8342D08E-300I GS8342D36GE-333I GS8342D08E GS8342D08E-167 GS8342D08E-167I GS8342D08E-200 GS8342D08E-200I GS8342D08GE-167 GS8342D08GE-167I GS8342D08GE-200 GS8342D08GE-200I GS8342D08GE-250 GS8342D08GE-250I GS8342D08GE-300 GS8342D08GE-300I GS8342D08GE-333 GS8342D08GE-333I GS8342D09E-167 GS8342D09E-167I GS8342D09E-200 GS8342D09E-200I GS8342D09E-250 GS8342D09E-250I GS8342D09E-300 GS8342D09E-300I GS8342D09E-333 GS8342D09E-333I GS8342D09GE-167 GS8342D09GE-167I GS8342D09GE-200 GS8342D09GE-200I GS8342D09GE-250 GS8342D09GE-250I GS8342D09GE-300 GS8342D09GE-300I GS8342D09GE-333 GS8342D09GE-333I GS8342D18E-167 GS8342D18E-200 GS8342D18E-200I GS8342D18E-250 GS8342D18E-300 GS8342D18E-300I GS8342D18E-333 GS8342D18E-333I GS8342D18GE-167 GS8342D18GE-167I GS8342D18GE-200 GS8342D18GE-200I GS8342D18GE-250 GS8342D18GE-250I GS8342D18GE-300 GS8342D18GE-300I GS8342D18GE-333 GS8342D18GE-333I GS8342D36E-167 GS8342D36E-167I GS8342D36E-200 GS8342D36E-200I GS8342D36E-250 GS8342D36E-250I GS8342D36E-300 GS8342D36E-300I GS8342D36E-333 GS8342D36E-333I GS8342D36GE-167 GS8342D36GE-167I GS8342D36GE-200 GS8342D36GE-200I GS8342D36GE-250 GS8342D
OCR Text	...y incremented by 1 for the next transfers. Because the LSBs are tied off internally, the address field of a SigmaQuad-II B4 RAM is always two address pins less than the advertised index depth (e.g., the 2M x 18 has a 512K addressable index)...
Description	36Mb SigmaQuad-II Burst of 4 SRAM
File Size	859.15K / 37 Page	View it Online	Download Datasheet

For transfers Found Datasheets File :: 8825 Search Time::2.094ms
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