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max9879 stereo class d audio subsystem with directdrive headphone amplifier evaluation kit available 19-4436; rev 1; 4/13 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maximintegrated.com. general description the max9879 combines a high-efficiency stereo class daudio power amplifier with a stereo capacitor-less directdrive headphone amplifier. maxim? filterless class d amplifiers with active emissions limiting technology pro-vide class ab performance with class d efficiency. the class d power amplifier delivers up to 715mw from a 3.7v supply into an 8 load with 88% efficiency to extend battery life. the filterless modulation schemecombined with active emission limiting circuitry and spread-spectrum modulation greatly reduces emi while eliminating the need for output filtering used in tradition- al class d devices. the headphone amplifier delivers up to 58mw from a 3.7v supply into a 16 load. maxim? directdrive architecture produces a ground-referenced output froma single supply, eliminating the need for large dc- blocking capacitors, saving cost, space and compo- nent height. the device utilizes a user-defined input architecture, three preamplifier gain settings, an input mixer, volume control, comprehensive click-and-pop suppression, and i 2 c control. a bypass mode feature disables the integrat- ed class d amplifier and utilizes an internal dpst switchto allow an external amplifier to drive the speaker that is connected at the outputs of the max9879. the max9879 is available in a thermally efficient, space-saving 30-bump ucsp package. applications features ? better than 9db margin under en 55022 class blimits with no filter components ? low rf susceptibility design rejects tdmanoise from gsm radios ? input mixer with user defined input mode ? stereo 715mw speaker output (r l = 8 , v dd = 3.7v) ? stereo 58mw headphone output (16 , v dd = 3.7v) ? low 0.04% thd+n at 1khz (class d poweramplifier) ? low 0.018% thd+n at 1khz (headphoneamplifier) ? 88% efficiency (r l = 8 , p out = 750mw) ? 1.6 analog switch for speaker amplifier bypass ? high speaker amplifier psrr (72db at 217hz) ? high headphone amplifier psrr (84db at 217hz) ? i 2 c control ? hardware and software shutdown mode ? ultra-low click and pop ? robust design with current and thermalprotection ? available in space-saving package 5x6 ucsp (2.5mm x 3mm) mixer preamplifier single supply 2.7v to 5.5v i 2 c interface volume control volume control bypass max9879 simplified block diagram outl- pvddl outl+ c1p 1 ab c d e 2 3 4 pgndr rxin- pgndl rxin+ c1n pgndr gnd gnd gnd v ss gnd bias inb1 ina1 hpl scl 56 top view (bump side down) outr- pvddr outr+ sda v dd inb2 ina2 hpr shdn v ccio pin configuration ordering information part temp range pin - pa c k a g e MAX9879ERV+ -40? to +85? 30 ucsp (5x6) + denotes a lead(pb)-free/rohs-compliant package. cell phones portable multimedia players directdrive is a registered trademark of maxim integrated products, inc. ucsp is a trademark of maxim integrated products, inc. downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 2 maxim integrated absolute maximum ratings v dd , pvddl, pvddr to gnd ..................................-0.3v to +6v v dd , pvddl to pvddr .........................................-0.3v to +0.3v v dd to pvddl .......................................................-0.3v to +0.3v v ccio to gnd...........................................................-0.3v to +4v pgndl, pgndr, to gnd......................................-0.3v to +0.3v pgndl to pgndr.................................................-0.3v to +0.3v v ss to gnd...............................................................-6v to +0.3v c1n to gnd ................................................(v ss - 0.3v) to +0.3v c1p to gnd ...........................................-0.3v to (pvdd_ + 0.3v) hpl, hpr to v ss (note 1).............................-0.3v to the lower of (v dd - v ss + 0.3v) or +9v hpl, hpr to v dd (note 2) .........................+0.3v to the higher of (v ss - pvdd_ - 0.3v) or -9v ina1, ina2, inb1, inb2, bias..................................-0.3v to +4v sda, scl, shdn ......................................................-0.3v to +4v all other pins to gnd ............................-0.3v to (pvdd_ + 0.3v) continuous current in/out of pvdd_, pgnd_, out_ ....?00ma continuous current in/out of hpr and hpl .....................140ma continuous current in/out of rxin+ and rxin- ...............150ma continuous input current v ss ...........................................100ma continuous input current (all other pins) ........................?0ma duration of out_ short circuit to pgnd_ or pvdd_...............................................continuous duration of short circuit between out_+ and out_- ..................................continuous duration of hp_ short circuit to gnd or pvddl........continuous continuous power dissipation (t a = +70?) 5x6 ucsp multilayer board (derate 16.5mw/? above +70?) .............................1250mw junction temperature ......................................................+150? operating temperature range ...........................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units analog supply voltage range v dd , pvddr pvddl guaranteed by psrr test 2.7 5.5 v digital supply voltage range v ccio 1.7 3.6 v hp mode, r hp = 5.6 9.0 stereo spk mode, r spk = 9.8 18 mono spk mode, r spk = 6.6 10 quiescent current i dd stereo spk + hp mode, r hp = r spk = 13.2 24 ma software shutdown 5 10 shutdown current i shdn i shdn = i dd + i pvddr + i pvddl + i cc ; t a = +25? hardware shutdown 0.1 1 ? turn-on time t on time from shutdown or power-on to fulloperation 10 ms t a = +25?, preamp = 0db or +5.5db 11 21 31 input resistance r in t a = +25c, preamp = +20db 3 5.5 8 k preamp = 0db 2.3 preamp = +5.5db 1.2 headphone a mplifier p ath preamp = +20db 0.23 preamp = 0db 1.2 preamp = +5.5db 0.64 maximum input signal swing speaker a mplifier p ath preamp = +20db 0.12 v p-p electrical characteristics(v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0, volume controls = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (notes 3, 4) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: hpr and hpl should be limited to no more than 9v above v ss , or above pv dd + 0.3v, whichever limits first. note 2: hpr and hpl should be limited to no more than 9v below pv dd , or below v ss - 0.3v, whichever limits first. downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 3 maxim integrated parameter symbol conditions min typ max units preamp = 0 58 preamp = 5.5db 55 common-mode rejection ratio cmrr f in = 1khz (differential input mode) preamp = 20db 43 db input dc voltage in__ inputs 1.22 1.3 1.38 v bias voltage v bias 1.13 1.2 1.272 v speaker amplifier t a = +25? (volume at mute) ?.5 4 mv output offset voltage v os t a = + 25 c ( vol um e at 0d b, e n a = 1 and e n b = 0 or e n b = 1 and e n a = 0, ? in _ = 0) ?.5 mv into shutdown -70 click-and-pop level k cp peak voltage,t a = +25? a-weighted, 32 samplesper second, volume at mute (note 5) out of shutdown -70 dbv pvdd_ = v dd = 2.7v to 5.5v 50 76 f = 217hz,100mv p-p ripple 72 f = 1khz,100mv p-p ripple 68 power-supply rejection ratio(note 5) psrr t a = +25? f = 20khz,100mv p-p ripple 55 db v dd = 3.7v 715 v dd = 3.3v 565 output power p out thd+n 1%, r spk = 8 v dd = 3.0v 470 mw total harmonic distortion + noise thd+n f = 1khz, p out = 350mw, t a = +25?, r spk = 8 0.04 0.2 % ? in_ = 0 (single-ended) 92 a-weighted, ena = 1and enb = 0 or enb = 1 and ena = 0 ? in_ = 1 (differential) 94 ? in_ = 0 (single-ended) 88 signal-to-noise ratio snr a-weighted ena =enb = 1 ? in_ = 1 (differential) 92 db output frequency 700 ?0 khz electrical characteristics (continued)(v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0, volume controls = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (notes 3, 4) downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 4 maxim integrated electrical characteristics (continued)(v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0, volume controls = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (notes 3, 4) parameter symbol conditions min typ max units current limit 1.5 a efficiency p out = 600mw, f = 1khz 88 % speaker gain a v 17.4 18 18.4 db output noise a-weighted, (ena = 1 and enb = 0or ena = 0 and enb = 1), ? in_ = 0 63 ? rms crosstalk outl to outr, outr to outl,f = 20hz to 20khz 75 db headphone amplifiers t a = +25? (volume at mute) ?.22 ?.85 mv output offset voltage v os t a = + 25 c ( v ol um e at 0d b, e n a = 1 and e n b = 0 or e n a = 0 and e n b = 1, ? in _ = 0) ?.5 mv into shutdown -75 click-and-pop level k cp peak voltage, t a = 25? a-weighted, 32 samplesper second, volume at mute (note 5) out of shutdown -75 dbv pvdd_ = v dd = 2.7v to 5.5v 70 85 f = 217hz,v ripple = 100mv p-p 84 f = 1khz,v ripple = 100mv p-p 80 power-supply rejection ratio(note 5) psrr t a = +25? f = 20khz,v ripple = 100mv p-p 62 db r hp = 16 58 output power p out thd+n = 1% r hp = 32 54 mw headphone gain a v 2.6 3 3.4 db channel-to-channel gaintracking t a = +25?, hpl to hpr, volume at 0db, ena=1 and enb = 0 or ena = 1 and enb= 0, ? in_ = 0 ?.3 ?.5 % r hp = 32 (p out = 10mw, f = 1khz) 0.018 total harmonic distortion + noise thd+n r hp = 16 (p out = 10mw, f = 1khz) 0.037 0.08 % downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 5 maxim integrated electrical characteristics (continued)(v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0, volume controls = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (notes 3, 4) parameter symbol conditions min typ max units ? in_ = 0 98 ena = 1 andenb = 0 or ena = 1 and enb = 0 ? in_ = 1 98 ? in_ = 0 96 signal-to-noise ratio snr a-weighted,r hp = 16 ena = 1 andenb = 1 ? in_ = 1 96 db slew rate sr 0.35 v/? capacitive drive c l 100 pf crosstalk hpl to hpr, hpr to hpl, f = 20hz to 20khz 67 db charge-pump frequency 350 ?0 khz volume control minimum setting _vol = 1 -75 db maximum setting _vol = 31 0 db pgain_ = 00 0 pgain_ = 01 5.5 input gain input a or b pgain_ = 10 20 db speaker 100 mute attenuation f = 1khz, _vol = 0 headphone 110 db zero-crossing detection timeout zcd = 1 60 ms analog switch t a = +25? 2.4 4 on-resistance r on i rxin__ = 20ma, rxin_ = 0 and v dd, bypass = 1 t a = t min to t max 5.2 series resistance is10 per switch 0.3 0.25 % total harmonic distortion + noise v difrxin = 2v p-p , v cmrxin = v dd /2, f = 1khz, bypass = 1 no series resistors 0.3 off-isolation bypass = 0, rxin+ and rxin- to gnd =50 , r spk = 8 , f = 10khz, referred to speaker output signal 88 db digital inputs (sda, scl, shdn ) input voltage high (sda, scl) v ih 0.7 x v ccio v input voltage low (sda, scl) v il 0.3 x v ccio v input hysteresis (sda, scl) v hys 200 mv downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 6 maxim integrated electrical characteristics (continued)(v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0, volume controls = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (notes 3, 4) parameter symbol conditions min typ max units input voltage high ( shdn) v ih 1.4 v input voltage low ( shdn) v il 0.4 v input hysteresis ( shdn) v hys 100 mv sda, scl, shdn input capacitance c in 10 pf input leakage current i in sda, scl, shdn, t a = +25? ?.0 a input leakage current i in v ccio = 0, t a = +25? ?.0 a digital outputs (sda open drain) output low-voltage sda v ol i sink = 3ma 0.4 v output high-voltage sda v oh i sink = 3ma v ccio - 0.4 v output fall time sda t of v h(min) to v l(max) bus capacitance = 10pf to 400pf, i sink = 3ma 250 ns 2-wire interface timing external pullup voltage range(sda and scl) 1.7 3.6 v serial-clock frequency f scl dc 400 khz bus free time between stopand start conditions t buf 1.3 ? start condition hold t hd:sta 0.6 ? start condition setup time t su:sta 0.6 ? clock low period t low 1.3 ? clock high period t high 0.6 ? data setup time t su:dat 100 ns data hold time t hd:dat 0 900 ns scl/sda receiving rise time t r (note 6) 20 + 0.1 x c b 300 ns scl/sda receiving fall time t f 20 + 0.1 x c b 300 ns v ccio =1.8v (note 6) 20 + 0.1 x c b 250 sda transmitting fall time t f v ccio = 3.6v (note 6) 20 + 0.05 x c b 250 ns downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 7 maxim integrated note 3: all devices are 100% production tested at t a = +25?. all temperature limits are guaranteed by design. note 4: class d amplifier testing performed with a resistive load in series with an inductor to simulate an actual speaker load. forr spkr = 8 , l = 68mh. note 5: amplifier inputs are ac-coupled to gnd. note 6: c b is in pf. electrical characteristics (continued)(v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume controls = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (notes 3, 4) parameter symbol conditions min typ max units set-up time for stop condition t su:sto 0.6 ? pulse width of spike suppressed t sp 05 0 n s capacitive load for each busline c b 400 pf downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 8 maxim integrated typical operating characteristics (v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume con- trols = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = +25?, unless otherwise noted.) general supply current vs. supply voltage max9879 toc01 supply voltage (v) supply current (ma) 3.9 3.5 3.1 4.3 4.7 5.1 2 4 6 8 10 0 2.7 5.5 headphone mode supply current vs. supply voltage max9879 toc02 supply voltage (v) supply current (ma) 3.9 3.5 3.1 4.3 4.7 5.1 8 10 12 2 4 6 14 16 0 2.7 5.5 stereo-speaker mode supply current vs. supply voltage max9879 toc03 supply voltage (v) supply current (ma) 3.9 3.5 3.1 4.3 4.7 5.1 12 14 16 6 8 10 18 20 4 2.7 5.5 headphone + stereo-speaker mode supply current vs. supply voltage max9879 toc04 supply voltage (v) supply current ( a) 3.9 3.5 3.1 4.3 4.7 5.1 8 10 12 2 4 6 14 16 0 2.7 5.5 software-shutdown mode supply current vs. supply voltage max9879 toc05 supply voltage (v) supply current (na) 3.9 3.5 3.1 4.3 4.7 5.1 10 20 30 40 50 0 2.7 5.5 hardware-shutdown mode volume level vs. volume step max9879 toc06 volume step attenuation (db) 20 28 12 16 48 24 50 70 8020 6010 30 40 90 100 0 03 2 f in = 1khz downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 9 maxim integrated typical operating characteristics (continued) (v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume con- trols = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = +25?, unless otherwise noted.) speaker amplifiers (headphone disabled) thd+n vs. frequency speaker max9879 toc07 frequency (khz) thd+n (%) 1 0.1 10 1 0.1 10 0.01 0.01 100 pvdd_= 3.7vr l = 8 output power = 200mw output power = 600mw thd+n vs. frequency speaker max9879 toc08 frequency (khz) thd+n (%) 1 0.1 10 1 0.1 10 0.01 0.01 100 pvdd_= 3.0vr l = 8 output power = 100mw output power = 400mw thd+n vs. output power max9879 toc09 output power (mw) thd+n (%) 800 200 400 1 0.1 10 0.01 0 1000 600 pvdd_ = 3.7vr l = 8 f in = 6khz f in = 1khz f in = 20hz thd+n vs. output power max9879 toc10 output power (mw) thd+n (%) 200 500 600 1 0.1 10 0.01 07 0 0 300 400 100 pvdd_ = 3.0vr l = 8 f in = 6khz f in = 1khz f in = 20hz efficiency vs. output power max9879 toc12 output power (mw) efficiency (%) 700 400 800 600 200 100 300 500 50 70 8020 6010 30 40 90 100 0 0 900 f in = 1khz, r l = 8 thd+n vs. output power max9879 toc11 output power (mw) thd+n (%) 600 1 0.1 10 0.01 0 1000 800 200 400 pvdd_ = 3.7vr l = 8 left speaker only f in = 6khz f in = 1khz f in = 20hz output power vs. supply voltage max9879 toc13 supply votage (v) ouput power (mw) 3.5 4.3 3.9 3.1 4.7 5.1 1000 1400 1600 400 1200 200 600 800 1800 2000 0 2.7 5.5 r l = 8 f in = 1khz thd+n = 10% thd+n = 1% downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 10 maxim integrated output frequency spectrum speaker mode max9879 toc17 frequency (khz) output magnitude (dbv) 5 -20-80 -60 -120 -100 -40 0 -140 02 0 10 15 v out = -60dbv f = 1khzr l = 8 unweighted typical operating characteristics (continued) (v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume con- trols = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = +25?, unless otherwise noted.) output power vs. load max9879 toc14 load ( ) ouput power (mw) 10 800200 600400 1000 0 1 100 f = 1khz thd+n = 10% thd+n = 1% power-supply rejection ratio vs. frequency (speaker mode) max9879 toc15 frequency (khz) psrr (db) 0.1 -60-90 -50-80 -40-70 -30 -20 -10 0 -100 0.01 100 11 0 r l = 8 v ripple = 100mv p-p inputs ac grounded right left crosstalk vs. frequency max9879 toc16 frequency (khz) crosstalk (db) 10 1 0.1 -100 -80 -60 -40 -20 0 -120 0.01 100 right to left left to right r l = 8 v in = 1 vp-p wideband frequency spectrum (speaker mode) max9879 toc18 frequency (mhz) output magnitude (dbv) -10-60 -70 -50 -100 -80 -30 -20 -110 -90 -40 0 -120 01 0 0 11 0 rbw = 1khzinput ac grounded max9879 toc19 400 s/div out+ - out-1v/div shdn1v/div speaker amplifiers (headphone disabled) max9879 toc20 2ms/div scl2v/div sda2v/div downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 11 maxim integrated typical operating characteristics (continued) (v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume con- trols = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = +25?, unless otherwise noted.) max9879 toc21 2ms/div scl2v/div out+ - out- 1v/div sda2v/div headphone amplifiers (speaker disabled) total harmonic distortion + noise vs. output power (headphone mode) max9879 toc27 output power (mw) thd+n (%) 20 80 40 0.1 1 0.01 10 0.001 06 0 1 0 0 v dd = 3.7v r l = 16 f in = 100hz f in = 1khz f in = 6khz total harmonic distortion + noise vs. output power (headphone mode) max9879 toc28 output power (mw) thd+n (%) 40 30 50 0.1 10 0.01 100 0.001 02 0 7 0 10 60 v dd = 3.0v r l = 32 f in = 1khz f in = 6khz f in = 100hz total harmonic distortion + noise vs. output power (headphone mode) max9879 toc29 output power (mw) thd+n (%) 40 30 50 0.1 10 0.01 100 0.001 02 0 6 0 10 v dd = 3.0v r l = 16 f in = 1khz f in = 6khz f in = 100hz total harmonic distortion + noise vs. frequency (headphone mode) max9879 toc24 frequency (khz) thd+n (%) 1 0.1 10 0.1 1 0.01 10 0.001 0.01 100 v dd = 3.0v r l = 32 output power = 30mw output power = 10mw total harmonic distortion + noise vs. frequency (headphone mode) max9879 toc25 frequency (khz) thd+n (%) 1 0.1 10 0.1 1 0.01 10 0.001 0.01 100 v dd = 3.0v r l = 16 output power = 7mw output power = 22mw total harmonic distortion + noise vs. frequency (headphone mode) max9879 toc26 frequency (khz) thd+n (%) 1 0.1 10 0.1 1 0.01 10 0.001 0.01 100 v dd = 3.7v r l = 32 f in = 1khz f in = 6khz f in = 100hz total harmonic distortion + noise vs. frequency (headphone mode) max9879 toc22 frequency (khz) thd+n (%) 10 1 0.1 0.01 0.1 1 10 0.001 0.01 100 v dd = 3.7v r l = 32 output power = 20mw output power = 45mw total harmonic distortion + noise vs. frequency (headphone noise) max9879 toc23 frequency (khz) thd+n (%) 1 0.1 10 0.1 1 0.01 10 0.001 0.01 100 v dd = 3.7v r l = 16 output power = 10mw output power = 40mw downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 12 maxim integrated typical operating characteristics (continued) (v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume con- trols = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = +25?, unless otherwise noted.) headphone amplifiers (speaker disabled) total harmonic distortion + noise vs. output power (headphone mode) max9879 toc30 output power (mw) thd+n (%) 10 0.1 10 0.01 100 0.001 0.1 1 100 v dd = 3.7v r l = 32 r l = 16 power dissipation vs. output power (headphone mode) max9879 toc31 total output power (mw) power dissipation (mw) 10 200 225175 250100 125 7550 25 150 0 0 1 100 v dd = 3.0v r l = 16 r l = 32 output power vs. supply voltage max9879 toc32 supply voltage (v) output power (mw) 3.5 3.9 4.3 4.7 5.1 60 7550 8020 3010 40 0 2.7 3.1 5.5 thd+n = 10% thd+n = 10% r l = 32 f in = 1khz output power vs. supply voltage max9879 toc33 supply votage (v) ouput power (mw) 3.1 140120 160 8060 40 20 100 0 2.7 3.5 4.3 3.9 5.1 4.7 5.5 thd+n = 10% thd+n = 1% r l = 16 f in = 1khz output power vs. load resistance (headphone mode) max9879 toc34 load resistance ( ) ouput power (mw) 9080 100 6050 40 30 20 10 70 0 10 100 thd+n = 10% thd+n = 1% v dd = 3.3v f = 1khz output power vs. load resistance (headphone mode) max9879 toc35 load resistance ( ) output power (mw) 9080 100 5030 20 10 70 0 10 100 c1 = c2 = 0.47 f f = 1khzthd+n = 1% c1 = c2 = 1 f c1 = c2 = 2.2 f power supply rejection ratio vs. frequency (headphone mode) max9879 toc36 frequency (khz) psrr (db) -10-20 0 -40-50 -60 -70 -80 -90 -30 -100 0.01 0.1 1 10 100 right left v ripple = 100mv p-p inputs ac grounded power-supply rejection ratio vs. frequency (headphone mode) max9879 toc37 frequency (khz) output frequency spectrum (db) -20-40 0 -80 -100-120 -60 -140 01 5 2 0 51 0 v out = -60db f =1khzr l = 32 crosstalk vs. frequency (headphone mode) max9879 toc38 frequency (hz) crosstalk (db) -10-20 0 -40-50 -60 -70 -30-80 0.01 10 100 0.1 1 r l = 16 f = 1khzv in = 1v p-p left to right right to left downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 13 maxim integrated typical operating characteristics (continued) (v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume con- trols = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = +25?, unless otherwise noted.) common-mode rejection ratio vs. frequency (headphone mode) max9879 toc39 frequency (khz) gain (db) 10 1 0.1 -70 -60 -50 -40 -30 -20 -10 0 -80 0.01 100 a v = +5.5db a v = +20db a v = 0db max9879 toc40 20 s/div shdn1v/div hp_ 1v/div headphone amplifiers (speaker disabled) downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 14 maxim integrated typical operating characteristics (continued) (v dd = v pvddl = v pvddr = 3.7v, v ccio = 1.8v, v gnd = v pgndl = v pgndr = 0. single-ended inputs, preamp = 0db, volume con- trols = 0db, bypass = 0, shdn = 1. speaker loads connected between out_+ and out_-. headphone loads connected from hpl or hpr to gnd. r spk = , r hp = . c1 = c2 = c bias = 1?. t a = +25?, unless otherwise noted.) max9879 toc41 2ms/div sda2v/div scl 2v/div hp_ 1v/div thd+n vs. output power bypass switch max9879 toc43 output power (mw) thd+n (%) 800 600 400 200 0.1 1 10 100 0.01 0 1000 f in = 100hz pvdd_ = 3.7vr l = 8 no series resistors f in = 1khz f in = 6khz thd+n vs. output power bypass switch max9879 toc44 output power (mw) thd+n (%) 10 1 0.1 0.01 06 0 1 5 0 120 30 90 f in = 100hz f in = 1khz f in = 6khz pvdd_ = 3.7vr l = 8 no series resistors max9879 toc42 2ms/div sda2v/div scl 2v/div hp_ 1v/div analog switch downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 15 maxim integrated pin description bump name function a1 c1p charge-pump flying capacitor positive terminal. connect a 1? capacitor between c1p and c1n. a2 outl- left-speaker negative output a3 pvddl left-channel class d power supply. bypass with a 1? capacitor to pgndl. a4 outl+ left-speaker positive output a5, b5 pgndr right-channel class d power ground a6 outr- right-speaker negative output b1 c1n charge-pump flying capacitor negative terminal. connect a 1? capacitor between c1p and c1n. b2 rxin- receiver bypass negative input b3 pgndl left-channel class d power ground b4 rxin+ receiver bypass positive input b6 pvddr right-channel class d power supply. bypass with a 1? capacitor to pgndl. c1 v ss headphone amplifier negative power supply. bypass with a 1? capacitor to pgnd. c2, c3, c4, c5 gnd analog ground c6 outr+ right-speaker positive output d1 hpl headphone amplifier right output d2 bias common-mode bias. bypass to gnd with a 1? capacitor. d3 inb1 input b1. left input or negative input. d4 ina1 input a1. left input or negative input. d5 scl serial-clock input. connect a pullup resistor from sda to v ccio . d6 sda serial-data input/output. connect a pullup resistor from sda to v ccio . e1 hpr headphone amplifier left output e2 v dd analog supply. connect to pvddl and pvddr. bypass with a 1? capacitor to gnd. e3 inb2 input b2. right input or positive input. e4 ina2 input a2. right input or positive input. e5 shdn active-low shutdown input signal e6 v ccio i 2 c power supply detailed description signal path the max9879 signal path consists of flexible inputs,signal mixing, volume control, and output amplifiers (figures 1a, 1b, 1c). the inputs can be configured for single-ended or differ- ential signals (figure 2). the internal preamplifiers fea- ture three programmable gain settings of 0db, +5.5db, and +20db. following preamplification, the input sig- nals are mixed, volume adjusted, and routed to the headphone and speaker amplifiers based on the out- put mode configuration (see table 6). the volume con- trol stages provide up to 75db attenuation. the headphone amplifiers provide +3db of gain while the speaker amplifier provides +18db of additional gain. when an input is configured as mono differential, it canbe routed to both speakers or to both headphones. when an input is stereo, it is routed to either the stereo headphones or the stereo speakers. simultaneous oper- ation is also possible. if the right speaker amplifier is dis- abled then the left and right audio signals are summed into the left speaker amplifier and vice-versa. when the application does not require the use of both ina_ and inb_, the snr of the max9879 is improved by deselecting the unused input through the i 2 c output mode register and ac-coupling the unused inputs toground with a 330pf capacitor. the 330pf capacitor and the input resistance to the max9879 form a high- pass filter preventing audible noise from coupling into the outputs. downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 16 maxim integrated class abclass ab + + + ina1 ina2 inb1 inb2 outr+ outr- hpl hpr outl+ outl- input b input a class d class d l r l l r r l r l r stereo mode note: stereo speaker outputs may be summed for mono output. 1 f 1 f 1 f 1 f figure 1a. stereo-mode signal path class abclass ab + ina1 ina2 inb1 inb2 outr+ outr- hpl hpr outl+ outl- input b input a class d class d + - + - mono mode 1 f 1 f 1 f 1 f figure 1b. mono-mode signal path downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 17 maxim integrated class abclass ab + + + ina1 ina2 inb1 inb2 outr+ outr- hpl hpr outl+ outl- input b input a class d class d l r l r l r + - mono in, stereo in, output in stereo mode note: stereo speaker outputs may be summed for mono output. 1 f 1 f 1 f 1 f figure 1c. mono inb, stereo ina, output in stereo-mode signal path downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 18 maxim integrated in_2 (r) rl in_1 (l) stereo single-ended to mixer in_2 (+) in_1 (-) differential to mixer figure 2. differential and stereo single-ended input configurations downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 19 maxim integrated volume control and mute the max9879 features three volume control registers(see table 4), allowing independent volume control of speaker and headphone amplifier outputs. there is one speaker volume control register that evenly controls both speaker outputs. two headphone volume control regis- ters provide independent control of each headphone out- put. each volume control register provides 31 attenuation steps providing 0db to -75db (typ) of total attenuation and a mute function. class d speaker amplifier the max9879 integrates a filterless class d amplifierthat offers much higher efficiency than class ab with- out the typical disadvantages. the high efficiency of a class d amplifier is due to the switching operation of the output stage transistors. in a class d amplifier, the output transistors act as current- steering switches and consume negligible additional power. any power loss associated with the class d out- put stage is mostly due to the i 2 r loss of the mosfet on-resistance, and quiescent current overhead.the theoretical best efficiency of a linear amplifier is 78%, however, that efficiency is only exhibited at peak output power. under normal operating levels (typical music reproduction levels), efficiency falls below 30%, whereas the max9879 still exhibits 88% efficiency under the same conditions (figure 3). ultra-low emi filterless output stage in traditional class d amplifiers, the high dv/dt of therising and falling edge transitions results in increased emi emissions, which requires the use of external lc filters or shielding to meet en55022 electromagnetic- interference (emi) regulation standards. limiting thedv/dt normally results in decreased efficiency. maxim? active emissions limiting circuitry actively limits the dv/dt of the rising and falling edge transitions, provid- ing reduced emi emissions, while maintaining up to 88% efficiency. in addition to active emission limiting, the max9879 fea- tures a spread-spectrum modulation mode that flattens the wideband spectral components. proprietary tech- niques ensure that the cycle-to-cycle variation of the switching period does not degrade audio reproduction or efficiency (see the typical operating characteristics ). with spread-spectrum modulation, the switching fre-quency varies randomly by ?0khz around the center frequency (700khz). the effect is to reduce the peak energy at harmonics of the switching frequency. above 10mhz, the wideband spectrum looks like white noise for emi purposes (see figure 4). speaker current limit most applications do not enter current limit unless theoutput is short circuited or connected incorrectly. when the output current of the speaker amplifier exceeds the current limit (1.5a, typ) the max9879 dis- ables the outputs for approximately 250?. at the end of 250?, the outputs are re-enabled, and if the fault condi- tion still exists, the max9879 continues to disable and re- enable the outputs until the fault condition is removed. bypass mode the integrated dpst analog audio switch allows themax9879? class d amplifier to be bypassed. in bypass mode, the class d amplifier is automatically disabled allowing an external amplifier to drive the speaker con- nected between outl+ and outl- through rxin+ and rxin- (see the typical application circuit ). the bypass switch is enabled at startup. the switch canbe opened or closed even when the max9879 is in soft- ware shutdown (see the i 2 c register description section). unlike discrete solutions, the switch design reducescoupling of class d switching noise to the rxin_ inputs. this eliminates the need for a costly t-switch. the bypass switch is typically used with two 10 resis- tors connected to each input. these resistors, in combi-nation with the switch on-resistance and an 8 load, approximate the 32 load expected by the external amplifier. although not required, using the resistorsoptimizes thd+n. drive rxin+ and rxin- with a low-impedance source to minimize noise on the pins. in applications that do not require the bypass mode, leave rxin+ and rxin- unconnected. max9877 efficiency vs. ideal class efficiency max9877 fig03 output power (w) efficiency (%) 0.75 0.50 0.25 10 20 30 40 50 60 70 80 90 100 0 0 1.00 max9879 ideal class ab v dd = pvdd_ = 3.7v (max9879) v supply = 3.7v (ideal class ab) figure 3. max9879 efficiency vs. class ab efficiency downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 20 maxim integrated directdrive headphone amplifier traditional single-supply headphone amplifiers haveoutputs biased at a nominal dc voltage (typically half the supply). large coupling capacitors are needed to block this dc bias from the headphone. without these capacitors, a significant amount of dc current flows to the headphone, resulting in unnecessary power dissi- pation and possible damage to both the headphone and headphone amplifier. maxim? directdrive architecture uses a charge pump to create an internal negative supply voltage. thisallows the headphone outputs of the max9879 to be biased at gnd while operating from a single supply (figure 5). without a dc component, there is no need for the large dc-blocking capacitors. instead of two large (220?, typ) capacitors, the max9879 charge pump requires two small ceramic capacitors, conserv- ing board space, reducing cost, and improving the fre-quency response of the headphone amplifier. see the output power vs. load resistance graph in the typical operating characteristics for details of the possible capacitor sizes. there is a low dc voltage on the ampli-fier outputs due to amplifier offset. however, the offset of the max9879 is typically ?.5mv, which, when com- bined with a 32 load, results in less than 47? of dc current flow to the headphones.in addition to the cost and size disadvantages of the dc-blocking capacitors required by conventional head- phone amplifiers, these capacitors limit the amplifier? low-frequency response and can distort the audio sig- nal. previous attempts at eliminating the output-cou- pling capacitors involved biasing the headphone return (sleeve) to the dc bias voltage of the headphone amplifiers. this method raises some issues: frequency (mhz) amplitude (db v/m) 160 140 120 100 80 60 10 15 20 25 30 35 40 test limit max9879 outputmax9879 output test limit 5 30 180 200 240 260 280 300 220 frequency (mhz) amplitude (db v/m) 600 550 500 450 400 350 15 20 25 35 40 10 300 650 700 800 850 900 1000 950 750 figure 4. emi with 152mm of speaker cable directdrive is a registered trademark of maxim integrated products, inc. downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 21 maxim integrated 1) the sleeve is typically grounded to the chassis. using the midrail biasing approach, the sleevemust be isolated from system ground, complicating product design. 2) during an esd strike, the amplifier? esd structures are the only path to system ground. thus, theamplifier must be able to withstand the full energy from an esd strike. 3) when using the headphone jack as a line out to other equipment, the bias voltage on the sleevemay conflict with the ground potential from other equipment, resulting in possible damage to the amplifiers. the max9879 features a low-noise charge pump. theswitching frequency of the charge pump is 1 / 2 of the class d switching frequency, regardless of the operatingmode. since the class d amplifiers are operated in spread-spectrum mode, the charge pump also switches with a spread-spectrum pattern. the nominal switching frequency is well beyond the audio range, and thus does not interfere with audio signals. the switch drivers fea- ture a controlled switching speed that minimizes noise generated by turn-on and turn-off transients. by limiting the switching speed of the charge pump, the di/dt noise caused by the parasitic trace inductance is minimized.although not typically required, additional high-frequen- cy noise attenuation can be achieved by increasing the size of c2 (see the typical application circuit ). the charge pump is active only in headphone modes. headphone current limit the headphone amplifier current is limited to 140ma (typ).the current limit clamps the output current, which appears as clipping when the maximum current is exceeded. shutdown mode the max9879 features two ways of entering low-powershutdown: the device can be placed in shutdown mode by writ- ing to the shdn bit in the output control register. the device can be placed in an ultra-low power shut- down mode by setting the shdn pin to 0v. this com- pletely disables the max9879 including the i 2 c interface. click-and-pop suppression the max9879 features click-and-pop suppression thateliminates audible transients from occurring at startup and shutdown. use the following procedure to start up the max9879: 1) configure the desired output mode and pream- plifier gain. 2) set the shdn bit to 1 to start up the amplifier. 3) wait 10ms for the startup time to pass. 4) increase the output volume to the desired level. to disable the device simply set shdn to 0. during the startup period, the max9879 precharges theinput capacitors to prevent clicks and pops. if the output amplifiers have been programmed to be active they are held in shutdown until the precharge period is complete. when power is initially applied to the max9879, the power-on-reset state of all three volume control registers is mute. for most applications, the volume can be set to the desired level once the device is active. if the click- and-pop is too high, step through intermediate volume settings with zero-crossing detection disabled. stepping through higher volume settings has a greater impact on click-and-pop than lower volume settings. for the lowest possible click and pop, start up the device at minimum volume and then step through each volume setting until the desired setting is reached. disable zero- crossing detection if no input signal is expected. v dd v dd /2 gnd conventional driver biasing scheme directdrive biasing scheme +v dd gnd -v dd v out v out figure 5. traditional amplifier output vs. max9879 directdrive output downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 22 maxim integrated i 2 c register description zero-crossing detection (zcd) zero-crossing detection limits distortion in the outputsignal during volume transitions by delaying the transi- tion until the mixer output crosses the internal bias volt- age. a timeout period (typically 60ms) forces the volume transition if the mixer output signal does not cross the bias voltage. 1 = zero-crossing detection is enabled. 0 = zero-crossing detection is disabled. differential input configuration ( in_) the inputs ina_ and inb_ can be configured for monodifferential or stereo single-ended operation. 1 = in_ is configured as a mono differential input within_2 as the positive and in_1 as the negative input. 0 = in_ is configured as a stereo single-ended input with in_2 as the right and in_1 as the left input. preamplifier gain (pgain_) the preamplifier gain of ina_ and inb_ can be pro-grammed by writing to pgain_. 00 = 0db 01 = +5.5db 10 = +20db 11 = reserved i 2 c address the slave address of the max9879 is 1001101r/( w ) (write: 0x9a, read: 0x9b). table 1. register map register register address por state b7 b6 b5 b4 b3 b2 b1 b0 input modecontrol 0x00 0x40 0 zcd ? ina ? inb pgaina pgainb speakervolume control 0x01 0x00 0 0 0 spkvol leftheadphone volume control 0x02 0x00 0 0 0 hplvol rightheadphone volume control 0x03 0x00 0 0 0 hprvol output modecontrol 0x04 0x49 shdn bypass 0 enb ena lspk en rspk en hpen table 2. input mode control register register b7 b6 b5 b4 b3 b2 b1 b0 0x00 0 zcd ? ina ? inb pgaina pgainb i 2 c interface downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 23 maxim integrated shutdown ( s s h h d d n n ) 1 = max9879 operational.0 = max9879 in low-power shutdown mode. shdn is an active-low shutdown bit that overrides all settings and places the entire device in low-power shut-down mode. the i 2 c interface is fully active in this shut- down mode and bypass mode remains operational. volume control the device has a separate volume control for left head-phone, right headphone, and speaker amplifiers. the total system gain is a combination of the input gain, thevolume control, and the output amplifier gain. table 4 shows the volume settings for each volume control. table 4. volume control settings _vol code b4 b3 b2 b1 b0 gain (db) 0 0 0 0 0 0 mute 1 0 0 0 0 1 -75 2 0 0 0 1 0 -71 3 0 0 0 1 1 -67 4 0 0 1 0 0 -63 5 0 0 1 0 1 -59 6 0 0 1 1 0 -55 7 0 0 1 1 1 -51 8 0 1 0 0 0 -47 9 0 1 0 0 1 -44 10 0 1 0 1 0 -41 11 0 1 0 1 1 -38 12 0 1 1 0 0 -35 13 0 1 1 0 1 -32 14 0 1 1 1 0 -29 15 0 1 1 1 1 -26 _vol code b4 b3 b2 b1 b0 gain (db) 16 1 0 0 0 0 -23 17 1 0 0 0 1 -21 18 1 0 0 1 0 -19 19 1 0 0 1 1 -17 20 1 0 1 0 0 -15 21 1 0 1 0 1 -13 22 1 0 1 1 0 -11 23 1 0 1 1 1 -9 24 1 1 0 0 0 -7 25 1 1 0 0 1 -6 26 1 1 0 1 0 -5 27 1 1 0 1 1 -4 28 1 1 1 0 0 -3 29 1 1 1 0 1 -2 30 1 1 1 1 0 -1 31 1 1 1 1 1 0 table 5. output mode control register b7 b6 b5 b4 b3 b2 b1 b0 0x04 shdn bypass 0 enb ena lspk en rspk en hpen table 3. speaker/left headphone/right headphone volume control register b7 b6 b5 b4 b3 b2 b1 b0 0x01 0 0 0 svol (table 4) 0x02 0 0 0 hplvol (table 4) 0x03 0 0 0 hprvol (table 4) downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 24 maxim integrated bypass mode (bypass) 1 = max9879 bypass switches are closed and the class d amplifier is disabled. 0 = bypass mode disabled.this mode does not control headphone operation. output mode control register speaker/headphone output mode (_spken/hpen) the max9879 features independent enables and inputselection for each speaker amplifier and the headphone amplifier. see table 6 for a detailed description of the available modes. if the right speaker amplifier is disabled, the stereo signals are automatically summed to mono for the left output and vice-versa. i 2 c interface specification the max9879 features an i 2 c/smbus-compatible, 2-wire serial interface consisting of a serial-data line(sda) and a serial-clock line (scl). sda and scl facil- itate communication between the max9879 and the master at clock rates up to 400khz. figure 6 shows the 2-wire interface timing diagram. the master generates scl and initiates data transfer on the bus. the master device writes data to the max9879 by transmitting the proper slave address followed by the register addressand then the data word. each transmit sequence is framed by a start (s) or repeated start (sr) con- dition and a stop (p) condition. each word transmitted to the max9879 is 8 bits long and is followed by an acknowledge clock pulse. a master reading data from the max9879 transmits the proper slave address fol- lowed by a series of nine scl pulses. the max9879 transmits data on sda in sync with the master-generat- ed scl pulses. the master acknowledges receipt of each byte of data. each read sequence is framed by a start (s) or repeated start (sr) condition, a not acknowledge, and a stop (p) condition. sda operates as both an input and an open-drain output. a pullup resistor, typically greater than 500 , is required on sda. scl operates only as an input. a pullup resistor,typically greater than 500 , is required on scl if there are multiple masters on the bus, or if the single masterhas an open-drain scl output. series resistors in line with sda and scl are optional. series resistors protect the digital inputs of the max9879 from high voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals. bit transfer one data bit is transferred during each scl cycle. thedata on sda must remain stable during the high period of the scl pulse. changes in sda while scl is high are control signals (see the start and stop conditions section). start and stop conditions sda and scl idle high when the bus is not in use. amaster initiates communication by issuing a start con- dition. a start (s) condition is a high-to-low transition on sda with scl high. a stop (p) condition is a low-to- high transition on sda while scl is high (figure 7). table 6. speaker/headphone modes bit description lspken enable bit for left speaker rspken enable bit for right speaker hpen enable bit for headphone amplifier ena enable bit for input a enb enable bit for input b scl sda start condition stop condition repeated start condition start condition t hd:sta t su:sta t su:sta t buf t su:sto t low t su:dat t hd:dat t high t r t f figure 6. 2-wire interface timing diagram smbus is a trademark of intel corp. downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 25 maxim integrated 1 scl start condition sda 28 9 clock pulse for acknowledgment acknowledge not acknowledge figure 8. acknowledge a start (s) condition from the master signals thebeginning of a transmission to the max9879. the mas- ter terminates transmission, and frees the bus, by issu- ing a stop condition. the bus remains active if a repeated start (sr) condition is generated instead of a stop condition. early stop conditions the max9879 recognizes a stop (p) condition at any point during data transmission except if the stop (p) condition occurs in the same high pulse as a start (s) condition. for proper operation, do not send a stop (p) condition during the same scl high pulse as the start (s) condition. slave address the max9879 is preprogrammed with a slave addressof 1001101r/( w ). the address is defined as the seven most significant bits (msbs) followed by the read/writebit. setting the read/write bit to 1 configures the max9879 for read mode. setting the read/write bit to 0 configures the max9879 for write mode. the address is the first byte of information sent to the max9879 after the start (s) condition. acknowledge the acknowledge bit (ack) is a clocked 9th bit that themax9879 uses to handshake receipt each byte of data when in write mode (see figure 8). the max9879 pulls down sda during the entire master-generated 9th clock pulse if the previous byte is successfully received. monitoring ack allows for detection of unsuc- cessful data transfers. an unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. in the event of an unsuccessful data transfer, the bus master may retry communication. the master pulls down sda during the ninth clock cycle to acknowledge receipt of data when the max9879 is in read mode. an acknowledge is sent by the master after each read byte to allow data transfer to continue. a not acknowledge is sent when the master reads the final byte of data from the max9879, followed by a stop (p) condition. write data format a write to the max9879 includes transmission of a start (s) condition, the slave address with the r/ w bit set to 0, one byte of data to configure the internal regis-ter address pointer, one or more bytes of data, and a stop (p) condition. figure 9 illustrates the proper frame format for writing one byte of data to the scl sda ss rp figure 7. start (s), stop (p), and repeated start (sr) conditions downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 26 maxim integrated acknowledge from max9879 1 byte autoincrement internal register address pointer acknowledge from max9879 not acknowledge from master a a p a 0 acknowledge from max9879 r/w sa r/w repeated start sr 1 slave address register address slave address data byte figure 11. reading one indexed byte of data from the max9879 1 byte autoincrement internal register address pointer acknowledge from max9879 acknowledge from max9879 b1 b0 b3 b2 b5 b4 b7 b6 a a 0 acknowledge from max9879 r/w s a 1 byte acknowledge from max9879 b1 b0 b3 b2 b5 b4 b7 b6 p a slave address register address data byte 1 data byte n figure 10. writing n bytes of data to the max9879 max9879. figure 10 illustrates the frame format for writ-ing n bytes of data to the max9879. the slave address with the r/ w bit set to 0 indicates that the master intends to write data to the max9879.the max9879 acknowledges receipt of the address byte during the master-generated 9th scl pulse. the second byte transmitted from the master config- ures the max9879? internal register address pointer. the pointer tells the max9879 where to write the next byte of data. an acknowledge pulse is sent by the max9879 upon receipt of the address pointer data. the third byte sent to the max9879 contains the datathat is written to the chosen register. an acknowledge pulse from the max9879 signals receipt of the data byte. the address pointer autoincrements to the next register address after each received data byte. this autoincrement feature allows a master to write to sequential registers within one continuous frame. figure 10 illustrates how to write to multiple registers with one frame. the master signals the end of transmission by issuing a stop (p) condition. register addresses greater than 0x04 are reserved. do not write to these addresses. a 0 slave address register address data byte acknowledge from max9877 r/w 1 byte autoincrement internal register address pointer acknowledge from max9877 acknowledge from max9879 b1 b0 b3 b2 b5 b4 b7 b6 s a a p figure 9. writing one byte of data to the max9879 downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 27 maxim integrated read data format send the slave address with the r/ w bit set to 1 to initi- ate a read operation. the max9879 acknowledgesreceipt of its slave address by pulling sda low during the 9th scl clock pulse. a start (s) command fol- lowed by a read command resets the address pointer to register 0x00. the first byte transmitted from the max9879 is the contents of register 0x00. transmitted data is valid on the rising edge of scl. the address pointer autoincrements after each read data byte. this autoincrement feature allows all registers to be read sequentially within one continuous frame. a stop (p) condition can be issued after any number of read data bytes. if a stop (p) condition is issued followed by another read operation, the first data byte to be read will be from register 0x00. the address pointer can be preset to a specific register before a read command is issued. the master presets the address pointer by first sending the max9879? slave address with the r/ w bit set to 0 followed by the register address. a repeated start (sr) condition isthen sent followed by the slave address with the r/ w bit set to 1. the max9879 then transmits the contentsof the specified register. the address pointer autoincre- ments after transmitting the first byte. the master acknowledges receipt of each read byte during the acknowledge clock pulse. the master must acknowl- edge all correctly received bytes except the last byte. the final byte must be followed by a not acknowledge from the master and then a stop (p) condition. figure 11 illustrates the frame format for reading one byte from the max9879. figure 12 illustrates the frame format for reading multiple bytes from the max9879. applications information filterless class d operation traditional class d amplifiers require an output filter torecover the audio signal from the amplifier? output. the filters add cost, increase the solution size of the amplifier,and can decrease efficiency and thd+n performance. the traditional pwm scheme uses large differential out- put swings (2 x v dd(p-p) ) and causes large ripple cur- rents. any parasitic resistance in the filter componentsresults in a loss of power, lowering the efficiency. the max9879 does not require an output filter. the device relies on the inherent inductance of the speaker coil and the natural filtering of both the speaker and the human ear to recover the audio component of the square-wave output. eliminating the output filter results in a smaller, less costly, more efficient solution. because the frequency of the max9879 output is well beyond the bandwidth of most speakers, voice coil movement due to the square-wave frequency is very small. although this movement is small, a speaker not designed to handle the additional power can be dam- aged. for optimum results, use a speaker with a series inductance > 10?. typical 8 speakers exhibit series inductances in the 20? to 100? range. component selection optional ferrite bead filter in applications where speaker leads exceed 20mm,additional emi suppression can be achieved by using a filter constructed from a ferrite bead and a capacitor to ground. a ferrite bead with low dc resistance, high- frequency (> 1.176mhz) impedance of 100 to 600 , and rated for at least 1a should be used. the capacitorvalue varies based on the ferrite bead chosen and the acknowledge from max9879 1 byte autoincrement internal register address pointer acknowledge from max9879 a a ap 0 acknowledge from max9879 r/w sa r/w repeated start sr 1 slave address register address slave address data byte figure 12. reading n bytes of indexed data from the max9879 max9879 out+ out- figure 13. optional ferrite bead filter downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 28 maxim integrated actual speaker lead length. select a capacitor less than1nf based on emi performance. input capacitor an input capacitor, c in , in conjunction with the input impedance of the max9879 forms a highpass filter thatremoves the dc bias from an incoming signal. the ac- coupling capacitor allows the amplifier to automatically bias the signal to an optimum dc level. assuming zero source impedance, the -3db point of the highpass filter is given by: choose c in so that f -3db is well below the lowest fre- quency of interest. use capacitors whose dielectricshave low-voltage coefficients, such as tantalum or alu- minum electrolytic. capacitors with high-voltage coeffi- cients, such as ceramics, may result in increased distortion at low frequencies. bias capacitor bias is the output of the internally generated dc bias volt-age. the bias bypass capacitor, c bias , reduces power supply and other noise sources at the common-mode bias node. bypass bias with a 1? capacitor to gnd. charge-pump capacitor selection use capacitors with an esr less than 100m for optimum performance. low-esr ceramic capacitors minimize theoutput resistance of the charge pump. most surface- mount ceramic capacitors satisfy the esr requirement. for best performance over the extended temperature range, select capacitors with an x7r dielectric. flying capacitor (c1) the value of the flying capacitor (c1) affects the outputresistance of the charge pump. a c1 value that is too small degrades the device? ability to provide sufficient current drive, which leads to a loss of output voltage. increasing the value of c1 reduces the charge-pump out- put resistance to an extent. above 1?, the on-resistance of the switches and the esr of c1 and c2 dominate. output holding capacitor (c2) the output capacitor value and esr directly affect theripple at v ss . increasing the value of c2 reduces output ripple. likewise, decreasing the esr of c2 reduces both ripple and output resistance. lower capacitance values can be used in systems with low maximum output power levels. see the output power vs. load resistance graph in the typical operating characteristics . pvdd bulk capacitor (c3) in addition to the recommended pvdd bypass capaci-tance, bulk capacitance equal to c3 should be used. place the bulk capacitor as close as possible to the device. supply bypassing, layout, and grounding proper layout and grounding are essential for optimumperformance. use wide traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. wide traces also aid in mov- ing heat away from the package. proper grounding improves audio performance, minimizes crosstalk between channels, and prevents any switching noise from coupling into the audio signal. connect pgnd and gnd together at a single point on the pcb. route all traces that carry switching transients away from gnd and the traces/components in the audio signal path. connect the pvdd_ pins to a 2.7v to 5.5v source. bypass pvdd_ to pgnd pin with a 1? ceramic capac- itor. additional bulk capacitance should be used to pre- vent power supply pumping. bypass pvdd_ to the pgnd pin with a 1? ceramic capacitor. additional bulk capacitance should be used to prevent power- supply pumping. place the bypass capacitors as close as possible to the max9879. connect v dd to pvdd_. bypass v dd to gnd with a 1? capacitor. place the bypass capacitors as close aspossible to the max9879. f rc db in in = 3 1 2 rf susceptibility max9877 fig14 frequency (hz) efficiency (db ) 10k 1k 100 -130 -110 -90 -70 -50 -30 -10 -150 10 100k threshold of hearing max9879 noise floor figure 14. max9879 susceptibility to a gsm cell phone radio downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 29 maxim integrated rf susceptibility gsm radios transmit using time-division multiple access(tdma) with 217hz intervals. the result is an rf signal with strong amplitude modulation at 217hz that is easily demodulated by audio amplifiers. figure 14 shows the susceptibility of the max9879 to a transmitting gsm radio placed in close proximity. although there is mea- surable noise at 217hz and its harmonics, the noise is well below the threshold of hearing using typical head- phones. in rf applications, improvements to both layout and component selection decreases the max9879? sus- ceptibility to rf noise and prevent rf signals from being demodulated into audible noise. trace lengths should be kept below 1 / 4 the wavelength of the rf fre- quency of interest. minimizing the trace lengths pre-vents them from functioning as antennas and coupling rf signals into the max9879. the wavelength in meters is given by: = c/f where c = 3 x 10 8 m/s, and f = the rf frequency of interest.route audio signals on middle layers of the pcb to allow ground planes above and below shield them from rf interference. ideally the top and bottom layers of the pcb should primarily be ground planes to create effec- tive shielding. additional rf immunity can also be obtained from rely- ing on the self-resonant frequency of capacitors as it exhibits the frequency response similar to a notch filter. depending on the manufacturer, 10pf to 20pf capaci- tors typically exhibit self resonance at rf frequencies. these capacitors, when placed at the input pins, can effectively shunt the rf noise at the inputs of the max9879. for these capacitors to be effective, they must have a low-impedance, low-inductance path to the ground plane. do not use microvias to connect to the ground plane as these vias do not conduct well at rf frequencies. ucsp applications information for the latest application details on ucsp construction,dimensions, tape carrier information, pcb techniques, bump-pad layout, and recommended reflow tempera- ture profile, as well as the latest information on reliability testing results, refer to the application note 1891: understanding the basics of the wafer-level chip- scale package (wl-csp) on maxim? website at www.maxim-ic.com/ucsp . see figure 15 for the rec- ommended pcb footprint for the max9879. 250 m 45 5 m figure 15. pcb footprint recommendation diagram downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 30 maxim integrated typical application circuit charge pump class d modulator +12db input a 0db/+5.5db/+20db ina2ina1 e4d4 c1n c1p b1 a1 bias d2 c6 a6 outr+ e1 hpr d1 hpl outr- i 2 c control sda scl d6d5 baseband receiver amplifier rxin+ rxin- b4b2 -75db to 0db +3db+3db +6db -75db to 0db -75db to 0db c 1 1 f 1 f 1 f input b 0db/+5.5db/+20db inb2inb1 e3d3 e5 1 f 1 f 1 f connect to v ccio for normal operation 10 10 c2, c3, c4, c5 gnd a5, b5 pgndr class d modulator +12db a4a2 outl+outl- -75db to 0db max9879 c1 v ss c 2 1 f e6 v ccio 0.1 f 1.7v to 3.6v e2 a3 b6 v dd pvddl pvddr 1 f c 3 1 f c 3 1 f shdn bypass b3 pgndl 2.7v to 5.5v chip information process: bicmos downloaded from: http:///
max9879 stereo class d audio subsystem with directdrive headphone amplifier 31 maxim integrated ucsp.eps package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 30 ncsp r302a3+1 21-0058 downloaded from: http:///
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. 32 ________________________________ maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 2013 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max9879 stereo class d audio subsystem with directdrive headphone amplifier revision history revision number revision date description pages changed 0 2/09 initial release 1 4/13 updated maximum input signal swing and typical application circuit 2, 30 downloaded from: http:///

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