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54act16657, 74act16657 16-bit transceivers with parity generators/checkers and 3-state outputs scas164a january 1991 revised april 1996 1 post office box 655303 ? dallas, texas 75265 members of the texas instruments widebus ? family inputs are ttl-voltage compatible flow-through architecture optimizes pcb layout distributed v cc and gnd pin configuration minimizes high-speed switching noise epic ? (enhanced-performance implanted cmos) 1- m m process 500-ma typical latch-up immunity at 125 c package options include plastic 300-mil shrink small-outline (dl) packages using 25-mil center-to-center pin spacings and 380-mil fine-pitch ceramic flat (wd) packages using 25-mil center-to-center pin spacings description the 'act16657 contain two noninverting octal transceiver sections with separate parity generator/checker circuits and control signals. for either section, the transmit/receive (1t/r or 2t/r ) input determines the direction of data flow. when 1t/r (or 2t/r ) is high, data flows from the 1a (or 2a) port to the 1b (or 2b) port (transmit mode); when 1t/r (or 2t/r ) is low, data flows from the 1b (or 2b) port to the 1a (or 2a) port (receive mode). when the output-enable (1oe or 2oe ) input is high, both the 1a (or 2a) and 1b (or 2b) ports are in the high-impedance state. odd or even parity is selected by a logic high or low level, respectively, on the 1odd/even (or 2odd/even ) input. 1parity (or 2parity) carries the parity bit value; it is an output from the parity generator/checker in the transmit mode and an input to the parity generator/checker in the receive mode. in the transmit mode, after the 1a (or 2a) bus is polled to determine the number of high bits, 1parity (or 2parity) is set to the logic level that maintains the parity sense selected by the level at the 1odd/even (or 2odd/even ) input. for example, if 1odd/even is low (even parity selected) and there are five high bits on the 1a bus, then 1parity is set to the logic high level so that an even number of the nine total bits (eight 1a-bus bits plus parity bit) are high. copyright ? 1996, texas instruments incorporated unless otherwise noted this document contains production data information current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. epic and widebus are trademarks of texas instruments incorporated. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1oe nc 1err gnd 1a1 1a2 v cc 1a3 1a4 1a5 gnd 1a6 1a7 1a8 2a1 2a2 2a3 gnd 2a4 2a5 2a6 v cc 2a7 2a8 gnd 2err nc 2oe 1t/r 1odd/even 1parity gnd 1b1 1b2 v cc 1b3 1b4 1b5 gnd 1b6 1b7 1b8 2b1 2b2 2b3 gnd 2b4 2b5 2b6 v cc 2b7 2b8 gnd 2parity 2odd/even 2t/r 54act16657 . . . wd package 74act16657 . . . dl package (top view) nc no internal connection
54act16657, 74act16657 16-bit transceivers with parity generators/checkers and 3-state outputs scas164a january 1991 revised april 1996 2 post office box 655303 ? dallas, texas 75265 description (continued) in the receive mode, after the 1b (or 2b) bus is polled to determine the number of high bits, the 1err (or 2err ) output logic level indicates whether or not the data to be received exhibits the correct parity sense. for example, if 1odd/even is high (odd parity selected), 1parity is high, and there are three high bits on the 1b bus, then 1err is low, indicating a parity error. the 74act16657 is packaged in ti's shrink small-outline package, which provides twice the i/o pin count and functionality of standard small-outline packages in the same printed-circuit-board area. the 54act16657 is characterized for operation over the full military temperature range of 55 c to 125 c. the 74act16657 is characterized for operation from 40 c to 85 c. function table number of a or b inputs input/output outputs number of a or b inputs that are high oe t/r odd/even input/output parity err output mode l h h h z transmit l hl l z transmit 02468 l lh h h receive 0 , 2 , 4 , 6 , 8 l lh l l receive l ll h l receive l ll l h receive l h h l z transmit l hl h z transmit 1357 l lh h l receive 1 , 3 , 5 , 7 l lh l h receive l ll h h receive l ll l l receive don't care h x x z z z
54act16657, 74act16657 16-bit transceivers with parity generators/checkers and 3-state outputs scas164a january 1991 revised april 1996 3 post office box 655303 ? dallas, texas 75265 logic symbol 2 1a2 6 1a3 8 1a4 9 1a5 10 1a6 12 1a7 13 1a8 14 2a2 16 2a3 17 2a4 19 2a5 20 2a6 21 2a7 23 2a8 24 1oe 1a1 5 z11 g3 1 3 en1/3g5 [rec] 56 3 en2 [xmit] n4 55 g8 28 8 en6/8g10 [rec] 29 8 en7 [xmit] n9 30 1b1 52 1b2 51 1b3 49 1b4 48 1b5 47 1b6 45 1b7 44 1b8 43 1parity 54 5 3 1t/r 1odd/even 2oe 2t/r 2odd/even 1err 1 2 11 18 2k 4 , 2 4 , 1 2a1 15 z21 2b1 42 2b2 41 2b3 40 2b4 38 2b5 37 2b6 36 2b7 34 2b8 33 2parity 31 10 26 21 ? ? ? 28 2err 6 7 2k 9 , 7 9 , 6 1 1 1 1 ? ? ? 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12.
54act16657, 74act16657 16-bit transceivers with parity generators/checkers and 3-state outputs scas164a january 1991 revised april 1996 4 post office box 655303 ? dallas, texas 75265 logic diagram, each transceiver (positive logic) t/r oe err a1 a2 a3 a4 a5 a6 a7 a8 odd/even parit y b2 b3 b4 b5 b6 b7 b8 b1
54act16657, 74act16657 16-bit transceivers with parity generators/checkers and 3-state outputs scas164a january 1991 revised april 1996 5 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o (see note 1) 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0 or v i > v cc ) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 500 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum package power dissipation at t a = 55 c (in still air) (see note 2): dl package 1.4 w . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the maximum package power dissipation is calculated using a junction temperature of 150 c and a board trace length of 750 mils. recommended operating conditions (see note 3) 54act16657 74act16657 unit min nom max min nom max unit v cc supply voltage 4.5 5 5.5 4.5 5 5.5 v v ih high-level input voltage 2 2 v v il low-level input voltage 0.8 0.8 v v i input voltage 0 v cc 0 v cc v v o output voltage 0 v cc 0 v cc v i oh high-level output current 24 24 ma i ol low-level output current 24 24 ma d t/ d v input transition rise or fall rate 0 10 0 10 ns/v t a operating free-air temperature 55 125 40 85 c note 3: unused inputs must be held high or low to prevent them from floating. product preview information concerns products in the formative or design phase of development. characteristic data and other specifications are design goals. texas instruments reserves the right to change or discontinue these products without notice.
54act16657, 74act16657 16-bit transceivers with parity generators/checkers and 3-state outputs scas164a january 1991 revised april 1996 6 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc t a = 25 c 54act16657 74act16657 unit parameter test conditions v cc min typ max min max min max unit i oh =50 m a 4.5 v 4.4 4.4 4.4 i oh = 50 m a 5.5 v 5.4 5.4 5.4 v oh i oh =24ma 4.5 v 3.94 3.8 3.8 v i oh = 24 ma 5.5 v 4.94 4.8 4.8 i oh = 75 ma 2 5.5 v 3.85 3.85 i ol =50 m a 4.5 v 0.1 0.1 0.1 i ol = 50 m a 5.5 v 0.1 0.1 0.1 v ol i ol =24ma 4.5 v 0.36 0.44 0.44 v i ol = 24 ma 5.5 v 0.36 0.44 0.44 i ol = 75 ma 2 5.5 v 1.65 1.65 i i a or b ports v i = v cc or gnd 5.5 v 0.1 1 1 m a i oz 3 control inputs v o = v cc or gnd 5.5 v 0.5 5 5 m a i cc v i = v cc or gnd, i o = 0 5.5 v 8 80 80 m a d i cc one input at 3.4 v, other inputs at v cc or gnd 5.5 v 0.9 1 1 ma c i control inputs v i = v cc or gnd 5 v 4.5 pf c o err v o = v cc or gnd 5 v 11 pf c io a or b ports v o = v cc or gnd 5 v 12 pf 2 not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. 3 for i/o ports, the parameter i oz includes the input leakage current. this is the increase in supply current for each input that is at one of the specified ttl voltage levels rather than 0 v or v cc . switching characteristics over recommended operating free-air temperature range, v cc = 5 v 0.5 v (unless otherwise noted) (see figure 1) parameter from to t a = 25 c 54act16657 74act16657 unit parameter (input) (output) min typ max min max min max unit t plh aorb bora 4.1 7.3 9.6 4.1 10.7 4.1 10.7 ns t phl a or b b or a 3.2 6.8 9.8 3.2 10.6 3.2 10.6 ns t plh a parity 4 8.6 12.9 4 14.3 4 14.3 ns t phl a parity 4.3 9 13.1 4.3 14.3 4.3 14.3 ns t plh odd/even parity err 3.7 8.3 12.3 3.7 13.7 3.7 13.7 ns t phl odd/even parity , err 4.1 8.8 12.8 4.1 14.1 4.1 14.1 ns t plh b err 3.9 8.6 13 3.9 14.6 3.9 14.6 ns t phl b err 4.3 9 13.3 4.3 14.7 4.3 14.7 ns t plh parity err 3.8 8.4 12.2 3.8 13.8 3.8 13.8 ns t phl parity err 4.1 8 12.8 4.1 14.2 4.1 14.2 ns t pzh oe a b parity or err 2.6 6.1 10.1 2.6 11.3 2.6 11.3 ns t pzl oe a , b , parity , or err 3.2 7.2 11.7 3.2 13 3.2 13 ns t phz oe a b parity or err 5.9 8.6 10.5 5.9 11.2 5.9 11.2 ns t plz oe a , b , parity , or err 5.3 8 9.8 5.3 10.5 5.3 10.5 ns product preview information concerns products in the formative or design phase of development. characteristic data and other specifications are design goals. texas instruments reserves the right to change or discontinue these products without notice.
54act16657, 74act16657 16-bit transceivers with parity generators/checkers and 3-state outputs scas164a january 1991 revised april 1996 7 post office box 655303 ? dallas, texas 75265 operating characteristics, v cc = 5 v, t a = 25 c parameter test conditions typ unit c d power dissi p ation ca p acitance p er transceiver outputs enabled c l =50 p f f=1mhz 76 p f c pd po w er dissipation capacitance per transcei v er outputs disabled c l = 50 pf , f = 1 mh z 35 pf parameter measurement information from output under test c l = 50 pf (see note a) load circuit s1 2 v cc 500 w 500 w t plh /t phl t plz /t pzl t phz /t pzh open 2 v cc gnd t phl t plh output control (low-level enabling) output waveform 1 s1 at 2 v cc (see note b) output waveform 2 s1 at gnd (see note b) v ol v oh t pzl t pzh t plz t phz 1.5 v 1.5 v 1.5 v 1.5 v v cc 3 v 0 v 50% v cc 50% v cc v oh v ol 0 v 50% v cc 20% v cc 50% v cc 80% v cc 0 v 3 v gnd open input output voltage waveforms voltage waveforms test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 1 mhz, z o = 50 w , t r = 3 ns, t f = 3 ns. d. the outputs are measured one at a time with one input transition per measurement. figure 1. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 74act16657dl active ssop dl 56 20 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 74act16657dlg4 active ssop dl 56 20 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 74act16657dlr active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 74ACT16657DLRG4 active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 24-feb-2006 addendum-page 1
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant 74act16657dlr ssop dl 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 q1 package materials information www.ti.com 11-mar-2008 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) 74act16657dlr ssop dl 56 1000 346.0 346.0 49.0 package materials information www.ti.com 11-mar-2008 pack materials-page 2
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of ti information in ti data books or data sheets is permissible only if reproduction is without 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in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of ti products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by ti. further, buyers must fully indemnify ti and its representatives against any damages arising out of the use of ti products in such safety-critical applications. ti products are neither designed nor intended for use in military/aerospace applications or environments unless the ti products are specifically designated by ti as military-grade or "enhanced plastic." only products designated by ti as military-grade meet military specifications. buyers acknowledge and agree that any such use of ti products which ti has not designated as military-grade is solely at the buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti products are neither designed nor intended for use in automotive applications or environments unless the specific ti products are designated by ti as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, ti will not be responsible for any failure to meet such requirements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband clocks and timers www.ti.com/clocks digital control www.ti.com/digitalcontrol interface interface.ti.com medical www.ti.com/medical logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security rfid www.ti-rfid.com telephony www.ti.com/telephony rf/if and zigbee? solutions www.ti.com/lprf video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2008, texas instruments incorporated

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