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1 features applications typical application description/ordering information tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 17 v, 1.5 a, synchronous step-down converter 2 controlled baseline 20 m a quiescent current (typical) ? one assembly overtemperature and overcurrent protected ? one test site available in 16 pin qfn package ? one fabrication site extended temperature performance of ? 55 c to 125 c point-of-load regulation from 12 v bus enhanced diminishing manufacturing sources organizers, pdas, and handheld pcs (dms) support handheld scanners enhanced product-change notification qualification pedigree high-efficiency synchronous step-down converter with up to 95% efficiency 3.1 v to 17 v operating input voltage range adjustable output voltage range from 1.2 v to 16 v fixed output voltage options available in 3.3 v and 5 v synchronizable to external clock signal up to 1.4 mhz up to 1.5 a output current high efficiency over a wide load current range due to pfm/pwm operation mode 100% maximum duty cycle for lowest dropout component qualification in accordance with jedec and industry standards to ensure reliable operation over an extended temperature range. this includes, but is not limited to, highly accelerated stress test (hast) or biased 85/85, temperature cycle, autoclave or unbiased hast, electromigration, bond intermetallic life, and mold compound life. such qualification testing should not be viewed as justifying use of this component beyond specifiedperformance and environmental limits. the tps6211x devices are a family of low-noise synchronous step-down dc-dc converters that are ideally suited for systems powered from a 2-cell li-ion battery or from a 12 v or 15 v rail. the tps6211x is a synchronous pwm converter with integrated n-channel and p-channel power mosfet switches. synchronous rectification is used to increase efficiency and to reduce external component count. to achieve highest efficiency over a wide load current range, the converter enters a power-saving, pulse-frequency modulation (pfm) mode at light load currents. operating frequency is typically 1 mhz, allowing the use of small inductor and capacitor values. the device can be synchronized to an external clock signal in the range of 0.8 mhz to 1.4 mhz. for low noise operation, the converter can be operated in pwm-only mode. in the shutdown mode, the current consumption is reduced to less than 2 m a. the tps6211x is available in the 16 pin (rsa) qfn package, and operates over a free-air temperature range of ? 55 c to 125 c. 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 powerpad is a trademark of texas instruments. production data information is current as of publication date. copyright ? 2007 ? 2008, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. sync gnd pgnd sw v o = 3.3 v 6.8 h m c = 22 f 6.3 v o m vin lbi c = 10 f 25 v i m 1 f m v = 3.8 v to 17 v i vin en vina pgnd gnd pwpd agnd tps62111 sw lbo pg 1 m fb
tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com 2 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep tps62111 efficiency vs output current 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 5 v 4.2 v 12 v 8.4 v v = 3.3 v t pfm mode o a = 25 c o
absolute maximum ratings (1) dissipation ratings (1) recommended operating conditions tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 this device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. these circuits have been qualified to protect this device against electrostatic discharges; hbm according to eia/jesd22-a114-b, mm according eia/jesd22-a115-a, and cdm according eia/jesd22c101c; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits. during storage or handling the device leads should be shorted together or the device should be placed in conductive foam. in a circuit, unused inputs should always be connected to an appropriate logic voltage level, preferably either vcc or ground. specific guidelines for handling devices of this type are contained in the publication guidelines for handling electrostatic-discharge-sensitive (esds) devices and assemblies available from texas instruments. ordering information (1) t a plastic qfn output lbi/lbo marking 16 pin (rsa) (2) (3) voltage functionality tps62110mrsarep adjustable standard tps62110-ep 1.2 v to 16 v ? 55 c to 125 c tps62111mrsarep 3.3 v standard TPS62111-EP tps62112mrsarep 5 v standard tps62112-ep (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti website at www.ti.com . (2) package drawings, thermal data, and symbolization are available at www.ti.com/packaging . (3) the rsa package is available in tape and reel. add r suffix (tps62110rsar) to order quantities of 3000 parts per reel. add t suffix (tps62110rsat) to order quantities of 250 parts per reel over operating free-air temperature range (unless otherwise noted) unit v cc supply voltage at vin, vina ? 0.3 v to 20 v voltage at sw ? 0.3 v to v i v i voltage at en, sync, lbo, pg ? 0.3 v to 20 v voltage at lbi, fb ? 0.3 v to 7 v i o output current at sw 2400 ma t j maximum junction temperature 150 c t stg storage temperature ? 65 c to 150 c lead temperature 1,6 mm (1/16-inch) from case for 10 seconds 300 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. t a 25 c derating factor t a = 70 c t a = 85 c package power rating above t a = 25 c power rating power rating rsa 2.5 w 25 mw/ c 1.375 w 1 w (1) based on a thermal resistance of 40 k/w soldered onto a high k board. min max unit v cc supply voltage at vin, vina 3.1 17 v maximum voltage at power-good, lbo, en, sync 17 v t j operating junction temperature ? 55 125 c copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 3 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep
electrical characteristics tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com v i = 12 v, v o = 3.3 v, i o = 600 ma, en = v i , t a = ? 55 c to 125 c (unless otherwise noted) parameter test conditions min typ max unit supply current v i input voltage range (1) 3.1 17 v i o = 0 ma, sync = gnd, v i = 7.2 v, 20 t a = 25 c (2) i (q) operating quiescent current m a i o = 0 ma, sync = gnd, 23 29 v i = 17 v (2) en = gnd 1.5 5 i (sd) shutdown current m a en = gnd, t a = 25 c, v i = 7.2 v 1.5 3 enable v ih en high-level input voltage 1.3 v v il en low-level input voltage 0.3 v en trip-point hysteresis 170 mv i ikg en input leakage current en = gnd or v i , v i = 17 v 0.01 0.2 m a i (en) en input current 0.6 v v (en) 4 v 10 m a v (uvlo) undervoltage lockout threshold input voltage falling 2.8 3 3.1 v undervoltage lockout hysteresis 250 mv power switch v i 5.4 v, i o = 350 ma 165 250 r ds(on) p-channel mosfet on-resistance v i = 3.5 v, i o = 200 ma 340 m ? v i = 3 v, i o = 100 ma 490 p-channel mosfet leakage v ds = 17 v 0.1 1 m a current p-channel mosfet current limit v i = 7.2 v, v o = 3.3 v 2400 ma v i 5.4 v, i o = 350 ma 145 200 r ds(on) n-channel mosfet on-resistance v i = 3.5 v, i o = 200 ma 170 m ? v i = 3 v, i o = 100 ma 200 n-channel mosfet leakage v ds = 17 v 0.1 3 m a current power good output, lbi, lbo v (pg) power good trip voltage v o ? 1.6% v v o ramping positive 50 power good delay time m s v o ramping negative 200 v ol pg, lbo output low voltage v (fb) = 1.1 v o nominal, i ol = 1 ma 0.3 v i ol pg, lbo sink current 1 ma pg, lbo output leakage current v (fb) = v o nominal 0.01 0.25 m a minimum supply voltage for valid 3 v power good, lbi, lbo signal v lbi low battery input trip voltage input voltage falling 1.256 v ilbi lbi input leakage current 10 100 na low battery input trip-point 1.5 % accuracy v lbi,hys low battery input hysteresis 25 mv (1) not production tested (2) device is not switching. 4 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep
tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 electrical characteristics (continued) v i = 12 v, v o = 3.3 v, i o = 600 ma, en = v i , t a = ? 55 c to 125 c (unless otherwise noted) parameter test conditions min typ max unit oscillator f s oscillator frequency 900 1000 1100 khz f (sync) synchronization range cmos-logic clock signal on sync pin 800 1400 khz v ih sync high-level input voltage 1.5 v v il sync low-level input voltage 0.3 v i lkg sync input leakage current sync = gnd or vin 0.01 0.2 m a sync trip-point hysteresis 170 mv sync input current 0.6 v v (sync) 4 v 10 20 a duty cycle of external clock signal 30 90 % output v o adjustable output voltage range tps62110 1.153 16 v v fb feedback voltage tps62110 1.153 v fb leakage current tps62110 10 100 na v i = 3.1 v to 17 v, feedback voltage tolerance (3) tps62110 ? 6 6 % 0 ma < i o < 1500 ma (4) v i = 3.8 v to 17 v, tps62111 ? 7 7 % 0 ma < i o < 1500 ma (4) fixed output voltage tolerance (5) v i = 5.5 v to 17 v, tps62112 ? 7 7 % 0 ma < i o < 1500 ma (4) v i 3 v (once undervoltage lockout voltage 100 exceeded) v i 3.5 v 500 i o maximum output current ma v i 4.3 v 1200 v i 6 v 1500 current into internal voltage divider for 5 m a fixed voltage versions v i = 7.2 v, v o = 3.3 v, i o = 600 ma h efficiency 92 % v i = 12 v, v o = 5 v, i o = 600 ma duty cycle range for main switches at 1 mhz 10 100 % minimum t on time for main switch 100 ns shutdown temperature 145 c start-up time i o = 800 ma, v i = 12 v, v o = 3.3 v 1 ms (3) not production tested (4) the maximum output current depends on the input voltage. see the maximum output current for further restrictions on the minimum input voltage. (5) the output voltage accuracy includes line and load regulation over the full temperature range t a = ? 55 c to 125 c. see the section for no-load operation in this data sheet. copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 5 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep
device information pin assignment top view tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com terminal functions terminal i/o description name no. enable. a logic high enables the converter; logic low forces the device into shutdown mode reducing the en 4 i supply current to less than 2 a. feedback pin for the fixed output voltage option. for the adjustable version, an external resistive divider fb 10 i is connected to this pin. the internal voltage divider is disabled for the adjustable version. lbo 6 o open-drain, low-battery output. this pin is pulled low if lbi is below its threshold. gnd 11, 12 i ground lbi 7 i low-battery input connect the inductor to this pin. this pin is the switch pin and connected to the drain of the internal sw 14, 15 o power mosfets. power good comparator output. this is an open-drain output. a pullup resistor should be connected pg 13 o between pg and vout. the output goes active high when the output voltage is greater than 98.4% of the nominal value. pgnd 1, 16 i power ground. connect all power grounds to this pin. agnd 9 i analog ground, connect to gnd and pgnd input for synchronization to external clock signal. synchronizes the converter switching frequency to an external clock signal with cmos level: sync 5 i sync = high: low-noise mode enabled, fixed frequency pwm operation is forced sync = low (gnd): power save mode enabled, pfm/pwm mode enabled vin 2, 3 i supply voltage input (power stage) vina 8 i supply voltage input (support circuits) powerpad? connect to agnd 6 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep 16 15 14 13 5 6 7 8 1 23 4 9 gnd gnd fbagnd pgnd exposed thermal pad vinvin en pgndsw lbi vina swpg sync lbo 12 11 10
tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 functional block diagram a. for the adjustable version (tps62110), the internal feedback divider is disabled and the fb pin is directly connected to the internal gm amplifier. copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 7 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep _ + _ + _ + _ + _ + ref ref load comparator i avg comparator current limit comparator p-channelpower mosfet driver shoot-through logic control logic soft start 1-mhz oscillator comparator sr n-channelpower mosfet comparator high comparator low comparator high 2 v (comp) sawtooth generator v i undervoltage lockout bias supply _ + comparator high comparator low compensation v = 1.153 v ref r2 (see note a) r1 v i en sw fb pgnd gm thermal shutdown vina _ + _ + skip comparator _+ _ + pg lbo lbi gnd 1.256 v
typical characteristics tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com table of graphs figure efficiency vs output current (5 v) 1, 2 efficiency vs output current (3.3 v) 3, 4, 5 maximum output current vs input voltage 6 efficiency vs output current (1.8 v) 7, 8 efficiency vs output current (1.5 v) 9, 10 line transient response 11 load transient response 12 output ripple 13 start-up timing 14 switching frequency vs input voltage 15 quiescent current vs input voltage 16 graphs with v o = 1.8 v were taken using the circuit according to figure 20 . tps62112 tps62112 efficiency efficiency vs vs output current output current figure 1. figure 2. 8 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 15 v 12 v 8.4 v v = 5 v t pfm mode o a = 25 c o 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 15 v 12 v 8.4 v v = 5 v t pwm mode o a = 25 c o
tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 tps62111 tps62111 efficiency efficiency vs vs output current output current figure 3. figure 4. tps62111 tps62111 efficiency maximum output current vs vs output current input voltage figure 5. figure 6. copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 9 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 5 v 4.2 v 12 v 8.4 v v = 3.3 v t pwm mode o a = 25 c o 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 5 v 4.2 v 12 v 8.4 v v = 3.3 v t pfm mode o a = 25 c o 20001600 1100 18001400 900700 400 100 19001500 1000 17001200 1300 800500 200 600300 0 3.2 3.6 5.2 4 5.6 6 4.4 4.8 v - input voltage- v i i - output current - ma o 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 5 v 12 v 8.4 v v = 3.3 v sync = 1.4 mhz t pfm mode o a = 25 c o
tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com tps62110 tps62110 efficiency efficiency vs vs output current output current figure 7. figure 8. tps62110 tps62110 efficiency efficiency vs vs output current output current figure 9. figure 10. 10 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 5 v 4.2 v 12 v 8.4 v v = 1.5 v t pfm mode o a = 25 c o 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current- a o efficiency - % 5 v 4.2 v 12 v 8.4 v v = 1.5 v t pwm mode o a = 25 c o 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current - a o efficiency - % 5 v 4.2 v 12 v 8.4 v v = 1.8 v t pfm mode o a = 25 c o 100 0 9070 40 20 8050 6030 10 0.0001 0.001 0.01 0.1 10 1 i - output current - a o efficiency - % 5 v 4.2 v 12 v 8.4 v v = 1.8 v t pwm mode o a = 25 c o
tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 tps62111 tps62111 line transient load transient figure 11. figure 12. tps62111 tps62111 output ripple start-up timing figure 13. figure 14. copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 11 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep t ? t ime = 2 ms/div v i = 7.2 v to 12 v v o = 3.3 v i load = 800 ma t a = 25 c c2 = 50 mv/div c1 = 5 v/div t ? t ime = 20 m s/div v i = 8.4 v v o = 3.3 v i load = 150 ma to 1350 ma t a = 25 c v o = 50 mv/div i o = 500 ma/div t ? t ime = 5 m s/div ch1 = 20 mv/div v i = 8.4 v , v o = 3.3 v ch2 =5 v/div ch4 = 200 ma/div i load = 100 ma, t a = 25 c t ? t ime = 200 m s/div ch1 = 10 v/div v i = 12 v , v o = 3.3 v ch4 = 500 ma/div i load = 800 ma, t a = 25 c ch3 = 5 v/div ch2 = 1 v/div
tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com switching frequency quiescent current vs vs input voltage input voltage figure 15. figure 16. the graphs were generated using the evm with the setup according to figure 17 unless otherwise noted. the output voltage divider was adjusted according to table 4 . graphs for an output voltage of 5 v and 3.3 v were generated using tps62111 and tps62112 with r1 = 0 ? and r2 = open. figure 17. test setup 12 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep 1000 970930 940900 980950 910 990960 920 3 7 5 9 4 8 6 10 14 12 16 11 15 13 17 v - input voltage - v i switching frequency - khz 25 c o -40 c o 85 c o v = 12 v i o o = 100 ma 0 10 3020 40 5 15 3525 45 50 3 7 5 9 4 8 6 10 14 12 16 11 15 13 17 v - input voltage - v i quiescent current - a m 25 c o -40 c o 85 c o sync gnd pgnd sw r1 r2 v o tdk 6.8 h slf7032t-6r8m1r6 m c 22 f / 16 v tdk o m c3225x7r1c226m vin lbi c 10 f / 25 v tdk i m c3225x5r1e106k 1 f m 261 k w vbat vin en vina pgnd gnd pwpd open vin orgnd agnd tps62110 sw lbo pg 1 m w 1 m w fb c ff -ep
detailed description operation constant frequency mode operation (sync = high) power save mode operation (sync = low) tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 the tps6211x is a synchronous step-down converter that operates with a 1 mhz fixed frequency pulse width modulation (pwm) at moderate-to-heavy load currents and enters the power save mode at light load current. during pwm operation, the converter uses a unique fast response voltage mode control scheme with input voltage feedforward. good line and load regulation is achieved with the use of small input and output ceramic capacitors. at the beginning of each clock cycle initiated by the clock signal (s), the p-channel mosfet switch is turned on, and the inductor current ramps up until the comparator trips and the control logic turns the switch off. the switch is turned off by the current limit comparator if the current limit of the p-channel switch is exceeded. after the dead time prevents current shoot through, the n-channel mosfet rectifier is turned on, and the inductor current ramps down. the next cycle is initiated by the clock signal turning off the n-channel rectifier, and turning on the p-channel switch. the error amplifier as well as the input voltage determines the rise time of the sawtooth generator. therefore, any change in input voltage or output voltage directly controls the duty cycle of the converter giving a very good line and load transient regulation. in constant frequency mode, the output voltage is regulated by varying the duty cycle of the pwm signal in the range of 100% to 10%. connecting the sync pin to a voltage greater than 1.5 v forces the converter to operate permanently in the pwm mode even at light or no-load currents. the advantage is that the converter operates with a fixed switching frequency that allows simple filtering of the switching frequency for noise-sensitive applications. in this mode, the efficiency is lower compared to the power save mode during light loads. the n-mosfet of the devices stay on even when the current into the output drops to zero. this prevents the device from going into discontinuous mode, and the device transfers unused energy back to the input. therefore, there is no ringing at the output, which usually occurs in discontinuous mode. the duty cycle range in constant frequency mode is 100% to 10%. it is possible to switch from forced pwm mode to the power save mode during operation by pulling the sync pin low. the flexible configuration of the sync pin during operation of the device allows efficient power management by adjusting the operation of the tps6211x to the specific system requirements. as the load current decreases, the converter enters the power save mode operation. during power save mode, the converter operates with reduced switching frequency in pulse frequency modulation (pfm), and with a minimum quiescent current to maintain high efficiency. whenever the average output current goes below the skip threshold, the converter enters the power save mode. the average current depends on the input voltage. it is about 200 ma at low input voltages and up to 400 ma with maximum input voltage. the average output current must be below the threshold for at least 32 clock cycles to enter the power save mode. during the power save mode, the output voltage is monitored with a comparator and the output voltage is regulated in to a typical value between the nominal output voltage and 0.8% above the nominal output voltage. when the output voltage falls below the nominal output voltage, the p-channel switch turns on. the p-channel switch is turned off as the peak switch current is reached. the n-channel rectifier is turned on, and the inductor current ramps down. as the inductor current approaches zero, the n-channel rectifier is turned off and the switch is turned on starting the next pulse. when the output voltage can not be reached with a single pulse, the device continues to switch with its normal operating frequency until the comparator detects the output voltage to be 0.8% above the nominal output voltage. this control method reduces the quiescent current to 20 a (typical), and reduces the switching frequency to a minimum that achieves the highest converter efficiency. copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 13 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep
(1) soft start 100% duty cycle low dropout operation (2) tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com detailed description (continued) figure 18. power save mode output voltage thresholds the typical pfm (skip) current threshold for the tps6211x is given by: equation 1 is valid for input voltages up to 7 v. for higher voltages, the skip current threshold is not increased further. the converter enters the fixed frequency pwm mode as soon as the output voltage falls below v o ? 1.6% (nominal). the tps6211x has an internal soft-start circuit that limits the inrush current during start-up. this prevents possible voltage drops of the input voltage when a battery or a high-impedance power source is connected to the input of the tps6211x. the soft start is implemented as a digital circuit increasing the switch current in steps of 300 ma, 600 ma, 1200 ma. the typical switch current limit is 2.4 a. therefore, the start-up time depends on the output capacitor and load current. typical start-up time with a 22 m f output capacitor and 800-ma load current is 1 ms. the tps6211x offers the lowest possible input to output voltage difference while still maintaining operation with the use of the 100% duty cycle mode. in this mode, the p-channel switch is constantly turned on. this is particularly useful in battery-powered applications to achieve the longest operation time, taking full advantage of the whole battery voltage range. the minimum input voltage to maintain regulation depends on the load current and output voltage, and is calculated as: with: i o max = maximum output current plus inductor ripple current r ds(on) max = maximum p-channel switch r ds(on) r (l) = dc resistance of the inductor v o max = nominal output voltage plus maximum output voltage tolerance 14 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep ( ) ) ( max ) ( max max min l r on ds r o i o v i v + + = v (nominal) o 0.8% 1.6% -1.6% t w ? 2 5 i v s k i p i
enable undervoltage lockout synchronization power good comparator low-battery detector tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 detailed description (continued) logic low on en forces the tps6211x into shutdown. in shutdown, the power switch, drivers, voltage reference, oscillator, and all other functions are turned off. the supply current is reduced to less than 2 m a in the shutdown mode. when the device is in thermal shutdown, the bandgap is forced to be switched on even if the device is set into shutdown by pulling en to gnd. if an output voltage is present when the device is disabled, which could be due to an external voltage source or a super capacitor, the reverse leakage current is specified under electrical characteristics. pulling the enable pin high starts up the tps6211x with the soft start. if the en pin is connected to any voltage other than v i or gnd, an increased leakage current of typically 10 m a and up to 20 m a can occur. the undervoltage lockout circuit prevents the device from misoperation at low-input voltages. it prevents the converter from turning on the switch or rectifier mosfet under undefined conditions. the minimum input voltage to start up the tps6211x is 3.4 v (worst case). the device shuts down at 2.8 v minimum. if no clock signal is applied, the converter operates with a typical switching frequency of 1 mhz. it is possible to synchronize the converter to an external clock within a frequency range from 0.8 mhz to 1.4 mhz. the device automatically detects the rising edge of the first clock and synchronizes immediately to the external clock. if the clock signal is stopped, the converter automatically switches back to the internal clock and continues operation. the switch over is initiated if no rising edge on the sync pin is detected for a duration of four clock cycles. therefore, the maximum delay time can be 6.25 m s if the internal clock has its minimum frequency of 800 khz. if the device is synchronized to an external clock, the power save mode is disabled, and the devices stay in forced pwm mode. connecting the sync pin to the gnd pin enables the power save mode. the converter operates in the pwm mode at moderate-to-heavy loads, and in the pfm mode during light loads, which maintains high efficiency over a wide load current range. the power good (pg) comparator has an open-drain output capable of sinking 1 ma (typical). the pg is active only when the device is enabled (en=high). when the device is disabled (en=low), the pg pin is pulled to gnd. the pg output is valid only after a 250- m s delay when the device is enabled, and the supply voltage is greater than the undervoltage lockout v (uvlo) . pg is low during the first 250 m s after shutdown and in shutdown. the pg pin becomes active high when the output voltage exceeds 98.4% (typical) of its nominal value. leave the pg pin unconnected when not used. the low-battery output (lbo) is an open-drain type which goes low when the voltage at the low-battery input (lbi) falls below the trip point of 1.256 v 1.5%. the voltage at which the low-battery warning is issued can be adjusted with a resistive divider as shown in figure 19 . the sum of resistors (r1 + r2) as well as the sum of (r5 + r6) is recommended to be in the 100 k ? to 1 m ? range for high efficiency at low output current. an external pullup resistor can be connected to out, or any other voltage rail in the voltage range of 0 v to 16 v. during start-up, the lbo output signal is invalid for the first 500 m s. lbo is high impedance when the device is disabled. if the low-battery comparator function is not used, connect lbi to ground. the low-battery detector is disabled when the device is disabled. the logic level of the lbo pin is not defined for the first 500 m s after en is pulled high. when the lbi is used to supervise the battery voltage and shut down the tps62111 at low-input voltages, the battery voltage rises when the current drops to zero. the implemented hysteresis on the lbi pin may not be sufficient for all types of batteries. figure 19 shows how an additional external hysteresis can be implemented. copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 15 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep
no load operation theory or operation / design procedure inductor selection tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com detailed description (continued) figure 19. lbi with increased hysteresis when the converter operates in the forced pwm mode and there is no load connected to the output, the converter regulates the output voltage by allowing the inductor current to reverse for a short time. table 1. list of inductors manufacturer (1) type inductance dc resistance saturation current coilcraft mss6132-682 6.8 h 65 mr (max) 1.5 a epcos b82462g4682m 6.8 h 50 mr (max) 1.5 a sumida cdrh5d28-6r2 6.2 h 33 mr (typ) 1.8 a slf6028t-6r8m1r5 6.8 h 35 mr (typ) 1.5 a tdk slf7032t-6r8m1r6 6.8 h 41 mr (typ) 1.6 a 7447789006 6.8 h 44 mr (typ) 2.75 a wurth 7447779006 6.8 h 33 mr (typ) 3.3 a 744053006 6.2 h 45 mr (typ) 1.8 a (1) the manufacturer ' s part numbers are used for test purposes only. the control loop of the tps6211x family requires a certain value for the output inductor and the output capacitor for stable operation. as long as the nominal value of l c 6.2 h 22 f, the control loop has enough phase margin and the device is stable. reducing the inductor value without increasing the output capacitor (or vice versa) may cause stability problems. there are applications where it may be useful to increase the value of the output capacitor, e.g., for a low transient output voltage change. from a stability point of view, the inductor value could be decreased to keep the l c product constant. however, there are drawbacks if the inductor value is decreased. a low inductor value causes a high inductor ripple current and therefore reduces the maximum dc output current. table 2 gives the advantages and disadvantages when designing the inductor and output capacitor. 16 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep sync gnd pgnd sw r1 560 k r2300 k v o = 3.3 v 6.8 h m c = 22 f 6.3 v o m vin lbi c = 10 f 25 v i m 1 f m 2 3 4 8 9 7 5 11 12 16 10 6 13 14 15 1 v = 4.3 v to 17 v i vin en vina pgnd gnd pwpd r5 r6 agnd tps62110 sw lbo pg r3 r7 r4 fb c ff 10 pf
(3) output capacitor selection tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 table 2. advantages and disadvantages when designing the inductor and output capacitor influence on stability advantage disadvantage less output voltage ripple increase cout ( > 22 f) uncritical none less output voltage overshoot / undershoot during load transient higher output voltage ripple critical high output voltage overshoot / decrease cout ( < 22 f) increase inductor value > 6.8 h none undershoot during load also transient less gain and phase margin less inductor current ripple more energy stored in the inductor higher voltage overshoot during load transient higher dc output current possible if smaller current rise higher increase l ( > 6.8 h) uncritical operated close to the current limit voltage undershoot during load transient do not decrease the value of cout due to these effects critical high inductor current ripple small voltage overshoot / undershoot especially at high input voltage decrease l ( < 6.8 h) increase output capacitor value > during load transient and low output voltage 22 f also as it is shown in table 2 , the inductor value can be increased to higher values. for good performance, the peak-to-peak inductor current ripple should be less than 30% of the maximum dc output current. especially at input voltages above 12 v, it makes sense to increase the inductor value to keep the inductor current ripple low. in such applications, the inductor value can be increased to 10 h or 22 h. values above 22 h should be avoided to keep the voltage overshoot during load transient in an acceptable range. after choosing the inductor value, two additional inductor parameters should be considered: 1. current rating of the inductor 2. dc resistance the dc resistance of the inductance directly influences the efficiency of the converter. therefore, an inductor with lowest dc resistance should be selected for highest efficiency. to avoid saturation of the inductor, the inductor should be rated at least for the maximum output current plus the inductor ripple current which is calculated as: where: f = switching frequency (1000 khz typical) l = inductor value i l = peak-to-peak inductor ripple current i l (max) = maximum inductor current the highest inductor current occurs at maximum v i . a more conservative approach is to select the inductor current rating just for the maximum switch current of the tps6211x, which is 2.4 a (typically). see table 1 for recommended inductors. a 22 m f (typical) output capacitor is needed with a 6.8 m h inductor. for an output voltage greater than 5 v, a 33 m f (minimum) output capacitor is required for stability. for best performance, a low esr ceramic output capacitor is needed. the rms ripple current is calculated as: copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 17 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep f l i v o v o v l i - = d 1 2 m a x m a x l i o i l i d + =
(4) (5) input capacitor selection (6) feedforward capacitor selection recommended capacitors tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com the overall output ripple voltage is the sum of the voltage spike caused by the output capacitor esr plus the voltage ripple caused by charge and discharging the output capacitor: where the highest output voltage ripple occurs at the highest input voltage v i . the nature of the buck converter is a pulsating input current; therefore, a low esr input capacitor is required for best input voltage filtering, and minimizing the interference with other circuits caused by high input voltage spikes. the input capacitor should have a minimum value of 10 f and can be increased without any limit for better input voltage filtering. the input capacitor should be rated for the maximum input ripple current calculated as: the worst-case rms ripple current occurs at d = 0.5 and is calculated as: i rms = i o /2. ceramic capacitors show a good performance because of their low esr value, and they are less sensitive against voltage transients compared to tantalum capacitors. place the input capacitor as close as possible to the input pin of the ic for best performance the feedforward capacitor (c ff ) is needed to compensate for parasitic capacitance from the feedback pin to gnd. typically, a value of 4.7 pf to 22 pf is needed for an output voltage divider with a equivalent resistance (r1 in parallel with r2) in the 150 k ? range. the value can be chosen based on best transient performance and lowest output voltage ripple in pfm mode. it is recommended that only x5r or x7r ceramic capacitors be used as input/output capacitors. ceramic capacitors show a dc-bias effect. this effect reduces the effective capacitance when a dc-bias voltage is applied across a ceramic capacitor, as on the output and input capacitor of a dc/dc converter. the effect may lead to a significant capacitance drop especially for high input/output voltages and small capacitor packages. see the manufacturer ' s data sheet about the performance with a dc bias voltage applied. it may be necessary to choose a higher voltage rating or nominal capacitance value to get the required value at the operating point. the capacitors listed in table 3 have been tested with the tps62110 with good performance. table 3. list of capacitors manufacturer part number size voltage capacitance type tmk316bj106kl 1206 25 v 10 f taiyo yuden ceramic emk325bj226km 1210 16 v 22 f c3225x5r1e106m 25 v 10 f 1210 tdk c3225x7r1c226m 16 v 22 f ceramic c3216x5r1e106mt 1206 25 v 10 f 18 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep 3 2 1 1 ) ( - = f l i v o v o v o c r m s i ? ? ? ? ? + - = d e s r r f o c f l i v o v o v o v 8 1 1 ? ? ? ? ? - = i v o v i v o v o i r m s i 1 m a x
application information (7) tps62110-ep TPS62111-EP tps62112-ep www.ti.com .............................................................................................................................................................. slvs630c ? april 2007 ? revised may 2008 a. for an output voltage lower than 2.5 v, an output capacitor of 33 m f or greater is recommended to improve load transient. figure 20. standard connection for adjustable version v fb = 1.153 v table 4. recommended resistors output voltage r1 r2 nominal voltage typical c ff 9 v 680 k ? 100 k ? 8.993 v 22 pf 5 v 510 k ? 150 k ? 5.073 v 10 pf 3.3 v 560 k ? 300 k ? 3.305 v 10 pf 2.5 v 390 k ? 330 k ? 2.515 v 10 pf 1.8 v 220 k ? 390 k ? 1.803 v 10 pf 1.5 v 100 k ? 330 k ? 1.502 v 10 pf figure 21. standard connection for fixed voltage version copyright ? 2007 ? 2008, texas instruments incorporated submit documentation feedback 19 product folder link(s): tps62110-ep TPS62111-EP tps62112-ep sync gnd pgnd sw r1 220 k w r2390 k w v o = 1.8 v 6.8 h m c = 2 x 22 f 6.3 v o m vin lbi c = 10 f 25 v i m 1 f m 2 3 4 8 9 7 5 11 12 16 10 6 13 14 15 1 v = 3.5 v to 17 v i vin en vina pgnd gnd pwpd r5 r6 agnd tps62110 sw lbo pg r31 m w r41 m w fb c ff 10 pf 2 2 1 r r r f b v o v + = 2 2 1 r f b v o v r r - ? ? ? ? ? = sync gnd pgnd sw v o = 5 v 6.8 h m c = 22 f 10 v o m vin lbi c = 10 f 25 v i m 1 f m 2 3 4 8 9 7 5 11 12 16 10 6 13 14 15 1 v = 5.5 v to 17 v i vin en vina pgnd gnd pwpd agnd tps62112 sw lbo pg 1 m w fb
tps62110-ep TPS62111-EP tps62112-ep slvs630c ? april 2007 ? revised may 2008 .............................................................................................................................................................. www.ti.com a. for an output voltage greater than 5 v, an output capacitor of 33 m f minimum is required for stability. figure 22. application with 9 v output 20 submit documentation feedback copyright ? 2007 ? 2008, texas instruments incorporated product folder link(s): tps62110-ep TPS62111-EP tps62112-ep sync gnd pgnd sw r1 680 k w r2100 k w v o = 9 v 6.8 h m c = 33 f 16 v o m vin lbi c = 10 f 25 v i m 1 f m 2 3 4 8 9 7 5 11 12 16 10 6 13 14 15 1 v = 9.3 v to 17 v i vin en vina pgnd gnd pwpd agnd tps62110 sw lbo pg 1 m w fb c ff 22 pf
package option addendum www.ti.com 31-may-2014 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tps62110mrsarep active qfn rsa 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 tps62 110ep tps62111mrsarep active qfn rsa 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 tps62 111-ep tps62112mrsarep active qfn rsa 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 tps62 112-ep v62/07622-01xe active qfn rsa 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 tps62 110ep v62/07622-02xe active qfn rsa 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 tps62 111-ep v62/07622-03xe active qfn rsa 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 tps62 112-ep (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device.
package option addendum www.ti.com 31-may-2014 addendum-page 2 (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of tps62110-ep, TPS62111-EP, tps62112-ep : ? catalog: tps62110 , tps62111 , tps62112 ? automotive: tps62110-q1 note: qualified version definitions: ? catalog - ti's standard catalog product ? automotive - q100 devices qualified for high-reliability automotive applications targeting zero defects
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant tps62110mrsarep qfn rsa 16 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 tps62111mrsarep qfn rsa 16 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 tps62112mrsarep qfn rsa 16 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 package materials information www.ti.com 27-jul-2016 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) tps62110mrsarep qfn rsa 16 3000 367.0 367.0 35.0 tps62111mrsarep qfn rsa 16 3000 367.0 367.0 35.0 tps62112mrsarep qfn rsa 16 3000 367.0 367.0 35.0 package materials information www.ti.com 27-jul-2016 pack materials-page 2
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