1/8 june 2002 . STS4PF20V p-channel 20v - 0.090 w - 4a so-8 2.7v-drive stripfet ? ii power mosfet n typical r ds (on) = 0.090 w @ 4.5 v n typical r ds (on) = 0.100 w @ 2.7 v n ultra low threshold gate drive (2.7 v) n standard outline for easy automated surface mount assembly description this power mosfet is the latest development of stmicroelectronis unique osingle feature size ? o strip-based process. the resulting transistor shows extremely high packing density for low on- resistance, rugged avalanche characteristics and less critical alignment steps therefore a remark- able manufacturing reproducibility. applications n mobile phone applications n dc-dc converters n battery management in nomadic equipment type v dss r ds(on) i d STS4PF20V 20 v < 0.11 w ( @ 4.5 v ) < 0.135 w ( @ 2.7 v ) 4a so-8 absolute maximum ratings ( ? ) pulse width limit ed by safe operating area. note: for the p-channel mosfet actual polarity of voltages and current has to be reversed symbol parameter value unit v ds drain-source voltage (v gs =0) 20 v v dgr drain-gate voltage (r gs =20k w ) 20 v v gs gate- source voltage 12 v i d drain current (continuous) at t c =25 c 4a i d drain current (continuous) at t c = 100 c 2.5 a i dm ( ? ) drain current (pulsed) 16 a p tot total dissipation at t c =25 c 2.5 w internal schematic diagram
STS4PF20V 2/8 thermal data (*) when mounted on 1 inch 2 fr-4 board, 2 oz of cu and t [ 10 sec. electrical characteristics (t case =25 c unless otherwise specified) off on (* ) dynamic rthj-amb t j t stg (*) thermal resistance junction-ambient maximum operating junction temperature storage temperature max 50 150 -55 to 150 c/w c c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 m a, v gs =0 20 v i dss zero gate voltage drain current (v gs =0) v ds = max rating v ds = max rating t c = 125 c 1 10 m a m a i gss gate-body leakage current (v ds =0) v gs = 12v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs i d = 250 m a 0.6 v r ds(on) static drain-source on resistance v gs = 4.5 v i d =2a v gs = 2.7 v i d =2a 0.090 0.100 0.110 0.135 w w symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds =15v i d =2 a 7.5 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 15v, f = 1 mhz, v gs =0 500 140 30 pf pf pf
3/8 STS4PF20V switching on (* ) switching off (* ) source drain diode (* ) (*) pulse width [ 300 m s, duty cycle 1.5 %. ( ? ) pulse width limited by t jmax symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =10v i d =2a r g = 4.7 w v gs = 4.5 v (resistive load, figure 1) 38 39 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 10v i d =4av gs =4.5v (see test circuit, figure 2) 6.2 1 1.4 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd =10v i d =2a r g = 4.7 w, v gs = 4.5 v (resistive load, figure 1) 54 12 ns ns t r(voff) t f t c off-voltage rise time fall time cross-over time v clamp =16v i d =4a r g = 4.7 w, v gs = 4.5 v (inductive load, figure 3) 46 11 15 ns ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ? ) source-drain current source-drain current (pulsed) 4 16 a a v sd (*) forward on voltage i sd =4a v gs =0 1.2 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 4 a di/dt = 100a/ m s v dd =15v t j = 150 c (inductive load, figure 3) 20 13 1.3 ns nc a electrical characteristics (continued) safe operating area thermal impedance
STS4PF20V 4/8 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/8 STS4PF20V normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics normalized breakdown voltage vs temperature ..
STS4PF20V 6/8 fig. 2: gate charge test circuit fig. 3: test circuit for diode recovery behaviour fig. 1: switching times test circuits for resistive load
7/8 STS4PF20V dim. mm inch min. typ. max. min. typ. max. a 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m 0.6 0.023 s 8 (max.) 0016023 so-8 mechanical data
STS4PF20V 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in lif e support devices or systems without express written approval of stmicroelectronics. the st logo is registered trademark of stmicroelectronics ? 2002 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://w ww.st.com
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