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4916s-auto-09/14 features operating range from 5v to 27v baud rate up to 20kbaud improved slew rate control according to lin specification 2.0, 2.1 and saej2602-2 fully compatible with 3.3v and 5v devices dominant time-out function at transmit data (txd) normal and sleep mode wake-up capability via lin bus (90s dominant) external wake-up via wake pin (35s low level) control of external voltage regulator via inh pin very low standby current during sleep mode (10a) wake-up source recognition bus pin short-circuit protected versus gnd and battery lin input current < 2a if v bat is disconnected overtemperature protection high emc level interference and damage protection according to iso/cd 7637 fulfills the oem ?hardware requirements for lin in automotive applications rev.1.0? ata6662c lin transceiver datasheet
ata6662c [datasheet] 4916s?auto?09/14 2 1. description the atmel ? ata6662c is a fully integrated lin transceiver comply ing with the lin specificati on 2.0, 2.1 and saej2602-2. it interfaces the lin protocol handler and the physical la yer. the device is designed to handle the low-speed data communication in vehicles, for example, in convenience electron ics. improved slope control at the lin driver ensures secure data communication up to 20kbaud. sleep mode guarantees mi nimal current consumption. the atmel ata6662c has advanced emi and esd performance. figure 1-1. block diagram 2 3 wake 4 txd en 1 rxd gnd 5 short circuit and overtemperature protection filter lin vs 7 6 txd time-out timer slew rate control wake up bus timer standby mode control unit receiver + - v s v s wake-up timer 8 inh
3 ata6662c [datasheet] 4916s?auto?09/14 2. pin configuration figure 2-1. pinning so8 table 2-1. pin description pin symbol function 1 rxd receive data output (open drain) 2 en enables normal mode; when the input is open or low, the device is in sleep mode 3 wake high voltage input for local wake-up reques t. if not needed, connect directly to vs 4 txd transmit data input; active low output (strong pull-down) after a local wake-up request 5 gnd ground, heat sink 6 lin lin bus line input/output 7 vs battery supply 8 inh battery-related inhibit output for controlling an external voltage regulator; active high after a wake-up request inh 3 4 2 1 lin vs gnd rxd en 8 7 6 5 wake txd
ata6662c [datasheet] 4916s?auto?09/14 4 3. functional description 3.1 physical layer compatibility since the lin physical layer is independent from higher lin laye rs (e.g., the lin protocol layer), all nodes with a lin physica l layer according to revision 2.x can be mixe d with lin physical layer nodes, which, acco rding to older versions (i.e., lin 1.0, lin 1.1, lin 1.2, lin 1.3), are without any restrictions. 3.2 supply pin (v s ) undervoltage detection is implemen ted to disable transmission if v s falls to a value below 5v in order to avoid false bus messages. after switching on v s , the ic switches to fail-safe mode and inhibit is switched on. the supply current in sleep mode is typically 10a. 3.3 ground pin (gnd) the atmel ? ata6662c does not affect the lin bus in the case of a gnd disconnection. it is able to handle a ground shift up to 11.5% of v s . 3.4 bus pin (lin) a low-side driver with internal current limitation and thermal sh utdown and an internal pull-up resistor are implemented as specified for lin 2.x. the volt age range is from ?27v to +40v. this pin exhi bits no reverse current from the lin bus to v s , even in the case of a gnd shift or v batt disconnection. the lin receiver thresholds are compatible to the lin protocol specification.the fall time (from recessi ve to dominant) and the rise time (from dom inant to recessive) are slope controlled. the output has a self-adapting short circuit limitation; that is, during current limita tion, as the chip temperature increases, the current is reduced. 3.5 input/output pin (txd) in normal mode the txd pin is the microcontr oller interface to control the state of t he lin output. txd must be at low- level in order to have a low lin bus. if txd is high, the lin output transist or is turned off and the bus is in recessive state. the txd pin is compatible to both a 3.3v or 5v supply. during fa il-safe mode, this pin is used as output and is signalling the wake-up source (see section 3.14 ?wake-up source recognition? on page 7 ). it is current limited to < 8ma. 3.6 txd dominant time-out function the txd input has an internal pull-down resistor. an internal timer prevents the bus line from being driven permanently in dominant state. if txd is fo rced to low longer than t dom > 6ms, the pin lin will be switched off (recessive mode). to reset this mode, switch txd to high (> 10s) before switching lin to dominant again. 3.7 output pin (rxd) this pin reports to the microcontr oller the state of the lin bus. lin high (recessiv e) is reported by a high level at rxd, lin low (dominant) is reported by a low voltage at rxd. the output is an open drain, theref ore, it is compatible to a 3.3v or 5v power supply. the ac characteristics are defined with a pull- up resistor of 5k to 5v and a load capacitor of 20pf. the output is short-protected. in unpowered mode (v s = 0v), rxd is switched off. for esd protection a zener diode is integrated, with v z =6.1v. 3.8 enable input pin (en) this pin controls the operation mode of the interface. if en = 1, the interface is in normal mode, with the transmission path from txd to lin and from lin to rxd both active. at a fallin g edge on en, while txd is already set to high, the device is switched to sleep mode and no transmission is possible. in sleep mode, the lin bus pin is connected to v s with a weak pull- up current source. the device can tran smit only after being woken up (see section 3.9 ?inhibit output pin (inh)? on page 5 ). during sleep mode the device is still supplied from the batt ery voltage. the supply current is typically 10a. the pin en provides a pull-down resistor in order to force the tran sceiver into sleep mode in case the pin is disconnected.
5 ata6662c [datasheet] 4916s?auto?09/14 3.9 inhibit output pin (inh) this pin is used to control an external switchable voltage regulator having a wake-up input. the inhibit pin provides an internal switch towards pin v s . if the device is in normal mode, the inhibit high-side switch is turned on and the external voltage regulator is activated. when the device is in sleep mo de, the inhibit switch is turned off and disables the voltage regulator. a wake-up event on the lin bus or at pi n wake will switch the inh pin to the v s level. after a system power-up (v s rises from zero), the pin inh swit ches automatically to the v s level. 3.10 wake-up input pin (wake) this pin is a high-voltage input used to wa ke the device up from sleep mode. it is usua lly connected to an external switch in the application to generate a local wake- up. a pull-up current source with typi cally ?10a is implemented. the voltage threshold for a wake-up signal is 3v below the vs vo ltage with an output current of typically ?3a. if you do not need a local wake-up in your application, connect pin wake directly to pin vs. 3.11 operation modes 1. normal mode this is the normal transmitting and re ceiving mode. all feat ures are available. 2. sleep mode in this mode the transmission path is disabled and the device is in low power mode. supply current from v batt is typically 10a. a wake-up signal from the lin bus or vi a pin wake will be detected and will switch the device to fail-safe mode. if en then switches to high, normal mode is activated. input debounce timers at pin wake (t wake ), lin (t bus ) and en (t sleep ,t nom ) prevent unwanted wake-up events due to automotive transients or emi. in sleep mode the inh pin is left floating. the internal termination between pin lin and pin v s is disabled. only a weak pull-up current (typical 10a) between pin lin and pin v s is present. the sleep mode can be activated inde- pendently from the actual level on pin lin or wake. 3. fail-safe mode at system power-up or after a wake-up event, the device auto matically switches to fail- safe mode. it switches the inh pin to a high state, to the v s level. lin communication is switched off. the microcontroller of the application will then confirm the normal mode by setting the en pin to high. 4. unpowered mode if you connect battery voltage to the a pplication circuit, the voltage at the vs pin increases according to the block capacitor. after vs is higher than the vs undervoltage threshold vs th , the ic mode changes from unpowered mode to fail-safe mode. then the lin driver is switched off, but the lin receiver is active, if the txd pin is at low level. figure 3-1. mode of operation local wake-up event go to sleep command en = 0; after 1 0 while txd = 1 en = 1 a a: v s > 5v b: v s < 5v c: bus wake-up event d: wake-up from wake switch b b en = 1 b c d unpowered mode v batt = 0v fail-safe mode inh: high (inh internal high-side switch on) communication: off normal mode inh: high (inh hs switch on) communication: on sleep mode inh: high impedence (inh hs switch off) communication: off
ata6662c [datasheet] 4916s?auto?09/14 6 wake-up events from sleep mode: lin bus en pin wake pin vs undervoltage figure 3-1 on page 5 , figure 3-2 and figure 3-3 on page 7 show details of wake-up operations. 3.12 remote wake-up via dominant bus state a voltage less than the lin pre-wake detection v linl at pin lin activates the internal lin receiver and switches on the internal slave termination between the lin pin and the vs pin. a falling edge at pin lin, followed by a dominant bus level v busdom maintained for a certain time period (t bus ) and a rising edge at pin lin results in a remote wake-up request. the device switches to fail-safe mode. pin inh is activated (switches to v s ) and the internal termination resistor is switched on. the remo te wake-up request is indicated by a low level at pin rxd to interrupt the microcontroller (see figure 3-2 on page 6 ). figure 3-2. lin wake-up waveform diagram table 3-1. table of modes mode of operation transceiver inh rxd lin fail-safe off on high, except after wake up recessive normal on on lin depending txd depending sleep off off high ohmic recessive microcontroller start-up delay time bus wake-up filtering time (t bus ) off state node in sleep state high or floating low or floating low high en high normal mode regulator wake-up time delay inh external voltage regulator en rxd lin bus
7 ata6662c [datasheet] 4916s?auto?09/14 3.13 local wake-up via pin wake a falling edge at pin wake, followed by a low level maintained for a certain time period (t wake ), results in a local wake-up request. the wake-up time (t wake ) ensures that no transient, according to is o7637, creates a wake-u p. the device switches to fail-safe mode. pin inh is activated (switches to v s ) and the internal termination resistor is switched on. the local wake- up request is indicated by a low level at pin rxd to interrupt the microcontroller and a strong pull-down at pin txd (see figure 3-3 ). the voltage threshold for a wake-up signal is 3v belo w the vs voltage with an output current of typical ?3a. even in the case of a continuous low at pin wake it is possible to switch the ic into sleep mode via a low at pin en. the ic will stay in sleep mode for an unlimited time. to generate a new wake up at pin wake it needs first a high signal > 6s before a negative edge starts the wake-up filtering time again. figure 3-3. wake-up from wake-up switch 3.14 wake-up source recognition the device can distinguish between a local wake-up request (pin wake) and a remote wake-up request (lin bus). the wake-up source can be read on pin txd in fail-safe mode. if an external pull-up resistor (typically 5k ) has been added on pin txd to the power supply of the microcontroller, a high le vel indicates a remote wake-up request (weak pull-down at pin txd) and a low level indicates a local wake-up request (strong pull-down at pin txd). the wake-up request flag (signalled on pin rxd) as well as the wake-up source flag (signalled on pin txd) are reset immediately if the microcontroller sets pin en to high (see figure 3-2 on page 6 and figure 3-3 ). microcontroller start-up delay time wake filtering time t wake off state node in sleep state high or floating txd weak pull-down resistor low or floating state change txd strong pull-down node in operation weak pull-down en high high low on state high regulator wake-up time delay wake pin inh en txd rxd voltage regulator
ata6662c [datasheet] 4916s?auto?09/14 8 3.15 fail-safe features the reverse current is < 2a at pin lin during loss of v bat ; this is optimal behavior for bus systems where some slave nodes are supplied from battery or ignition. pin en provides a pull-down resistor to force the transceiver into sleep mode if en is disconnected. pin rxd is set floating if v bat is disconnected. pin txd provides a pull-down resistor to pr ovide a static low if txd is disconnected. the lin output driver has a current limita tion, and if the junction temperature t j exceeds the thermal shut-down temperature t off , the output driver switches off. the implemented hysteresis, t hys , enables the lin output again after the temperature has been decreased.
9 ata6662c [datasheet] 4916s?auto?09/14 4. absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond t hose indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability . parameters symbol min. typ. max. unit v s - continuous supply voltage ?0.3 +40 v wake dc and transient voltage (with 33-k serial resistor) - transient voltage due to iso7637 (coupling 1nf) ?1 ?150 +40 +100 v v logic pins (rxd, txd, en) ?0.3 +5.5 v lin - dc voltage - transient voltage due to iso7637 (coupling 1nf) ?27 ?150 +40 +100 v v inh - dc voltage ?0.3 v s + 0.3 v esd according to ibee lin emc test specification 1.0 following iec 61000-4-2 - pin vs, lin to gnd - pin wake (33k serial resistor) 6 5 kv kv esd hbm following stm5.1 with 1.5k /100pf - pin vs, lin, wake, inh to gnd 6 kv hbm esd ansi/esd-stm5.1 jesd22-a114 aec-q100 (002) 3 kv cdm esd stm 5.3.1 750 v machine model esd aec-q100-revf(003) 100 v junction temperature t j ?40 +150 c storage temperature t stg ?55 +150 c 5. thermal characteristics parameters symbol min. typ. max. unit thermal resistance junction ambient r thja 145 k/w special heat sink at gnd (pin 5) on pcb (fused lead frame to pin 5) r thja 80 k/w thermal shutdown t off 150 165 180 c thermal shutdown hysteresis t hys 5 10 20 c
ata6662c [datasheet] 4916s?auto?09/14 10 6. electrical characteristics 5v < v s < 27v, t j = ?40c to +150c no. parameters test conditions pin symbol min. typ. max. unit type* 1 v s pin 1.1 dc voltage range nominal 7 v s 5 13.5 27 v a 1.2 supply current in sleep mode sleep mode v lin > v s ? 0.5v v s < 14v 7 i vssleep 10 20 a a 1.3 supply current in normal mode bus recessive v s < 14v 7 i vsrec 0.9 1.3 ma a 1.4 bus dominant v s < 14v total bus load > 500 7 i vsdom 1.2 2 ma a 1.5 supply current in fail-safe mode bus recessive v s < 14v 7 i vsfail 0.5 1.1 ma a 1.6 v s undervoltage threshold on v sth 4 4.95 v a 1.7 v s undervoltage threshold off v sth 4.05 5 v a 1.8 v s undervoltage threshold hysteresis 7 v sth_hys 50 500 mv a 2 rxd output pin (open drain) 2.1 low-level output sink current normal mode v lin = 0v, v rxd = 0.4v 1 i rxdl 1.3 2.5 8 ma a 2.2 rxd saturation voltage 5-k pull-up resistor to 5v 1 vsat rxd 0.4 v a 2.3 high-level leakage current normal mode v lin = v bat , v rxd = 5v 1 i rxdh ?3 +3 a a 2.4 esd zener diode i rxd = 100a 1 vz rxd 5.8 8.6 v a 3 txd input pin 3.1 low-level voltage input 4 v txdl ?0.3 +0.8 v a 3.2 high-level voltage input 4 v txdh 2 5.5 v a 3.3 pull-down resistor v txd = 5v 4 r txd 125 250 600 k a 3.4 low-level leakage current v txd = 0v 4 i txd_leak ?3 +3 a a 3.5 low-level output sink current fail-safe mode, local wake up v txd = 0.4v v lin = v bat 4 i txd 1.3 2.5 8 ma a 4 en input pin 4.1 low-level voltage input 2 v enl ?0.3 +0.8 v a 4.2 high-level voltage input 2 v enh 2 5.5 v a 4.3 pull-down resistor v en = 5v 2 r en 125 250 600 k a 4.4 low-level input current v en = 0v 2 i en ?3 +3 a a 5 inh output pin 5.1 high-level voltage normal mode i inh = ?2ma 8 v inhh v s ? 3 v s v a 5.2 leakage current sleep mode v inh = 0v/27v, v s = 27v 8 i inhl ?3 +3 a a *) type means: a = 100% tested, b = 100% correlation test ed, c = characterized on samp les, d = design parameter
11 ata6662c [datasheet] 4916s?auto?09/14 6 wake pin 6.1 high-level input voltage 3 v wakeh v s ? 1v v s + 0.3v v a 6.2 low-level input voltage i wake = typically ?3a 3 v wakel ?1v v s ? 3.3v v a 6.3 wake pull-up current v s < 27v 3 i wake ?30 ?10 a a 6.4 high-level leakage current v s = 27v, v wake = 27v 3 i wake ?5 +5 a a 7 lin bus driver 7.1 driver recessive output voltage r load = 500 /1k 6 v busrec 0.9 v s v s v a 7.2 driver dominant voltage v busdom_drv_losup v vs = 7v, r load = 500 6 v _losup 1.2 v a 7.3 driver dominant voltage v busdom_drv_hisup v vs = 18v, r load = 500 6 v _hisup 2 v a 7.4 driver dominant voltage v busdom_drv_losup v vs = 7v, r load = 1000 6 v _losup_1k 0.6 v a 7.5 driver dominant voltage v busdom_drv_hisup v vs = 18v, r load = 1000 6 v _hisup_1k_ 0.8 v a 7.6 pull-up resistor to v s the serial diode is mandatory 6 r lin 20 30 60 k a 7.7 voltage drop at the serial diodes in pull-up path with r slave i serdiode = 10ma 6 v serdiode 0.4 1.0 v d 7.8 lin current limitation v bus = v bat_max 6 i bus_lim 40 120 200 ma a 7.9 input leakage current at the receiver, including pull-up resistor as specified input leakage current driver off v bus = 0v, v s = 12v 6 i bus_pas_dom ?1 ma a 7.10 leakage current lin recessive driver off 8v < v bat < 18v 8v < v bus < 18v v bus v bat 6 i bus_pas_rec 10 20 a a 7.11 leakage current at ground loss; control unit disconnected from ground; loss of local ground must not affected communication in the residual network gnd device = v s v bat =12v 0v < v bus < 18v 6 i bus_no_gnd ?10 +0.5 +10 a a 7.12 leakage current at loss of battery; node has to substain the current that can flow under this condition; bus must remain operational under this condition v bat disconnected v sup_device = gnd 0v < v bus < 18v 6 i bus_no_bat 0.1 2 a a 7.13 capacitance on pin lin to gnd 6 c lin 20 pf d 6. electrical characteristics (continued) 5v < v s < 27v, t j = ?40c to +150c no. parameters test conditions pin symbol min. typ. max. unit type* *) type means: a = 100% tested, b = 100% correlation test ed, c = characterized on samp les, d = design parameter
ata6662c [datasheet] 4916s?auto?09/14 12 8 lin bus receiver 8.1 center of receiver threshold v bus_cnt = (v th_dom + v th_rec )/2 6 v bus_cnt 0.475 v s 0.5 v s 0.525 v s v a 8.2 receiver dominant state v en = 5v 6 v busdom ?27 0.4 v s v a 8.3 receiver recessive state v en = 5v 6 v busrec 0.6 v s 40 v a 8.4 receiver input hysteresis v hys = v th_rec ? v th_dom 6 v bushys 0.028 v s 0.1 v s 0.175 v s v a 8.5 pre-wake detection lin high-level input voltage 6 v linh v s ? 2v v s + 0.3v v a 8.6 pre-wake detection lin low-level input voltage switches the lin receiver on 6 v linl ?27v v s ? 3.3v v a 9 internal timers 9.1 dominant time for wake-up via lin bus v lin = 0v 6 t bus 30 90 150 s a 9.2 time of low pulse for wake-up via pin wake v wake = 0v 3 t wake 7 35 50 s a 9.3 time delay for mode change from fail-safe mode to normal mode via pin en v en = 5v 2 t norm 2 7 15 s a 9.4 time delay for mode change from normal mode into sleep mode via pin en v en = 0v 2 t sleep 2 7 12 s a 9.5 txd dominant time out time v txd = 0v 4 t dom 6 9 20 ms a 9.6 power-up delay between v s = 5v until inh switches to high v vs = 5v t vs 200 s a 10 lin bus driver ac parameter with different bus loads load 1 (small): 1nf, 1k ; load 2 (large): 10nf, 500 ; r rxd = 5k ; c rxd = 20pf; load 3 (medium): 6.8nf, 660 characterized on samples; 10.1 and 10.2 specifies the timing parameters for proper operation at 20kbit/s, 10.3 and 10.4 at 10.4kbit/s. 10.1 duty cycle 1 th rec(max) = 0.744 v s th dom(max) = 0.581 v s v s = 7.0v to 18v t bit = 50s d1 = t bus_rec(min) /(2 t bit ) 6 d1 0.396 a 10.2 duty cycle 2 th rec(min) = 0.422 v s th dom(min) = 0.284 v s v s = 7.0v to 18v t bit = 50s d2 = t bus_rec(max) /(2 t bit ) 6 d2 0.581 a 10.3 duty cycle 3 th rec(max) = 0.778 v s th dom(max) = 0.616 v s v s = 7.0v to 18v t bit = 96s d3 = t bus_rec(min) /(2 t bit ) 6 d3 0.417 a 6. electrical characteristics (continued) 5v < v s < 27v, t j = ?40c to +150c no. parameters test conditions pin symbol min. typ. max. unit type* *) type means: a = 100% tested, b = 100% correlation test ed, c = characterized on samp les, d = design parameter
13 ata6662c [datasheet] 4916s?auto?09/14 figure 6-1. definition of bus timing parameter 10.4 duty cycle 4 th rec(min) = 0.389 v s th dom(min) = 0.251 v s v s = 7.0v to 18v t bit = 96s d4 = t bus_rec(max) /(2 t bit ) 6 d4 0.590 a 11 receiver electrical ac parameters of the lin physical layer lin receiver, rxd load conditions: c rxd = 20pf, r pull-up = 5k 11.1 propagation delay of receiver (see figure 6-1 ) t rec_pd = max(t rx_pdr , t rx_pdf ) v s = 7.0v to 18v 1 t rx_pd 6 s a 11.2 symmetry of receiver propagation delay rising edge minus falling edge t rx_sym = t rx_pdr ? t rx_pdf v s = 7.0v to 18v 1 t rx_sym ?2 +2 s a 6. electrical characteristics (continued) 5v < v s < 27v, t j = ?40c to +150c no. parameters test conditions pin symbol min. typ. max. unit type* *) type means: a = 100% tested, b = 100% correlation test ed, c = characterized on samp les, d = design parameter txd (input to transmitting node) vs (transceiver supply of transmitting node) rxd (output of receiving node 1) rxd (output of receiving node 2) lin bus signal thresholds of receiving node 1 thresholds of receiving node 2 t bus_rec(max) t rx_pdr(1) t rx_pdf(2) t rx_pdr(2) t rx_pdf(1) t bus_dom(min) t bus_dom(max) th rec(max) th dom(max) th rec(min) th dom(min) t bus_rec(min) t bit t bit t bit
ata6662c [datasheet] 4916s?auto?09/14 14 figure 6-2. application circuit v s v s inh 8 en 2 rxd 12v 5v vbattery 5k 1k 100nf ata6662c 33k 10k 1 short-circuit and overtemperature protection control unit slew rate control wake-up bus timer filter master node pull-up wake-up timer txd time-out timer sleep mode receiver wake 3 txd microcontroller io vdd external switch 4 5 gnd 6 7 vs lin lin sub bus 220pf 22f gnd
15 ata6662c [datasheet] 4916s?auto?09/14 8. package information 7. ordering information extended type number package remarks ata6662c-gaqw so8 lin transceiver, pb-fr ee, 4k, taped and reeled package drawing contact: packagedrawings@atmel.com gpc drawing no. rev. title 6.543-5185.01-4 1 05/08/14 package: so8 common dimensions (unit of measure = mm) min nom note max symbol dimensions in mm specifications according to din technical drawings 0.15 0.25 0.1 a1 3.9 4 3.8 e1 0.4 0.5 0.3 b 1.27 bsc e 0.2 0.25 0.15 c 0.65 0.9 0.4 l 66.2 5.8 e 4.9 5 4.8 d 1.47 1.55 1.4 a2 1.65 1.8 1.5 a 85 14 d b e a a1 a2 c e1 e l pin 1 identity
ata6662c [datasheet] 4916s?auto?09/14 16 9. revision history please note that the following page numbers re ferred to in this section re fer to the specific revision mentioned, not to this document. revision no. history 4916s-auto-09/14 section 7 ?ordering information? on page 15 updated section 8 ?package information? on page 15 updated 4916r-auto-04/14 put datasheet in the latest template 4916q-auto-02/13 section 7 ?ordering information? on page 15 updated 4916p-auto-10/11 section 3.11 ?operation modes? on page 5 changed 4916o-auto-05/10 features on page 1 changed heading 3.6: text changed 4916n-auto-03/10 features on page 1 changed section 4 ?absolute maximum ratings? on page 9 changed section 6 ?electrical characteri stics? number 7.13 on page 11 added section 7 ?ordering information? on page 16 changed 4916m-auto-09/09 figure 1-1 ?block diagram? on page 1 changed section 4 ?absolute maximum ratings? on page 8 changed figure 6-2 ?application circuit? on page 14 changed 4916l-auto-02/09 section 6 ?el.characteristics? numbe rs 3.2 and 4.2 on page 9 changed 4916k-auto-12/08 figure 2-1 ?pinning so8? on page 2 changed section 3.2 ?supply pin (v s )? on page 3 changed section 3.8 ?enable input pin (en)? on page 4 changed section 3.11 ?operation modes? on page 5 changed section 3.12 ?remote wake-up via dominant bus state? on page 5 changed section 3.14 ?wake-up source recognition? on page 6 changed figure 3.2 ?lin wake-up waveform diagram? on page 7 changed figure 3.3 ?wake-up from wake-up switch? on page 7 changed section 4 ?absolute maximum ratings? on page 8 changed section 5 ?thermal resistance? on page 8 changed section 6 ?electrical characteristics? on pages 9 to 12 changed figure 6-2 ?application circuit? on page 13 changed 4916j-auto-02/08 ?pre-normal mode? in ?fail-safe mode? changed section 3.9 ?inhibit output pin (inh) on page 4 changed section 4 ?absolute maximum ratings? on page 8 changed section 6 ?electrical characterist ics? number 5.1 on page 9 changed 4916i-auto-12/07 section 3.1 ?physical layer compatibility? on page 3 added section 6 ?el.characteristics? num bers 1.5, 1.6 and 1.7 on page 9 changed 4916h-auto-10/07 section 7 ?ordering information? on page 14 changed 4916g-auto-07/07 put datasheet in a new template capital t for time generally changed in a lower case t
17 ata6662c [datasheet] 4916s?auto?09/14 4916f-auto-05/07 figure 1-1 ?block diagram? on page 1 changed figure 6-2 ?application circuit? on page 13 changed features on page 1 changed section 6 ?el.characteristics? numbers 10.1 to 10.4 and 11.1, 11.2 changed 4916e-auto-02/07 section 4 ?absolute maximum ratings? on page 8 changed section 2 ?electrical characteristics? on pages 9 to 11 changed 4916d-auto-02/07 features on page 1 changed section 1 ?description? on page 1 changed table 2-1 ?pin description? on page 2 changed section 3.2 ?ground pin (gnd) on page 3 changed section 3.7 ?enable input pin (en)? on page 4 changed section 3.11 ?remote wake-up via dominant bus state? on page 5 changed figure 3-1 ?mode of operation? on page 6 changed section 3-14 ?fail-safe features? on page 6 changed section 4 ?absolute maximum ratings? on page 8 changed section 6 ?electrical characteristics? on pages 9 to 11 changed please note that the following page numbers re ferred to in this section re fer to the specific revision mentioned, not to this document. (continued) revision no. history
x x xx x x atmel corporation 1600 technology drive, san jose, ca 95110 usa t: (+1)(408) 441.0311 f: (+1)(408) 436.4200 | www.atmel.com ? 2014 atmel corporation. / rev.: rev.: 4916s?auto?09/14 atmel ? , atmel logo and combinations thereof, enabling unlimited possibilities ? , and others are registered trademarks or trademarks of atmel corporation or its subsidiaries. other terms and product names may be trademarks of others. disclaimer: the information in this document is provided in c onnection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in the atmel terms and condit ions of sales located on the atmel website, atmel assumes no liability wh atsoever and disclaims any express, implied or statutory warranty relating to its p roducts including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, pu nitive, special or incidental damages (including, without limi tation, damages for loss and profits, business interruption, or loss of information ) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no r epresentations or warranties with respect to the accuracy or c ompleteness of the contents of this document and reserves the right to make changes to specificatio ns and products descriptions at any time without notice. atmel d oes not make any commitment to update the information contained herein. unless specifically provided otherwise, atme l products are not suitable for, and shall not be used in, automo tive applications. atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. safety-critical, military, and automotive applications disclaim er: atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to re sult in significant personal inju ry or death (?safety-critical a pplications?) without an atmel officer's specific written consent. safety-critical applications incl ude, without limitation, life support devices and systems, equipment or systems for t he operation of nuclear facilities and weapons systems. atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by atmel as military-grade. atmel products are not designed nor intended for use in automot ive applications unless spec ifically designated by atmel as automotive-grade.

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