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general description features ics9250-14 block diagram pentium ii is a trademark of intel corporation i 2 c is a trademark of philips corporation frequency timing generator for pentium ii systems 9250-14 rev a 2/5/00 pin configuration
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4 < 4 < power groups a,-56,,-56b-56 a,*00,,*00b*00 a,&,,&b&cd a,'-,,'-bcc'-5 a,32,,32b32 a,+,-,,+,-b+,-(# a,c,,cbcd a,c&,,c(&b&'(& !; <e4< f!"d ,,44 skew specifications 7 gh!i 7 +,-(#+,-(#h" 7 *00g*00h" 7 &g&h"" 7 +,-(#h"" 7 ./&#&ab!";jb"#(eb3" 7 *00h"" 7 *00./&#&ab!;jb"#(eb3" 7 &'(&&h"" product preview documents contain information on new products in the sampling or preproduction phase of development. characteristic data and other specifications are subject to change without notice. preliminary product preview
ics9250-14 preliminary product preview pin descriptions n i p r e b m u n e m a n n i pe p y tn o i t p i r c s e d 11 f e rt u o. t u p t u o k c o l c e c n e r e f e r z h m 8 1 3 . 4 1 , v 3 . 3 , 5 2 , 8 1 , 0 1 , 9 , 2 5 4 , 7 3 , 2 3 d d vr w py l p p u s r e w o p v 3 . 3 31 xn i k c a b d e e f d n a ) f p 3 3 ( p a c d a o l l a n r e t n i s a h , t u p n i l a t s y r c 2 x m o r f r o t s i s e r 42 xt u o d a o l l a n r e t n i s a h . z h m 8 1 3 . 4 1 y l l a n i m o n , t u p t u o l a t s y r c ) f p 3 3 ( p a c , 1 2 , 4 1 , 6 , 5 , 6 3 , 9 2 , 8 2 9 4 , 1 4 d n gr w py l p p u s v 3 . 3 r o f s n i p d n u o r g 8 , 7) 1 ; 0 ( 6 6 v 3t u ob u h r o f s t u p t u o k c o l c z h m 6 6 d e x i f v 3 . 3 1 1 0 k l c i c p 1 t u os k l c u p c s u o n o r h c n y s h t i w , s t u p t u o k c o l c i c p v 3 . 3 0 s fn i. n o r e w o p t a d e h c t a l t u p n i . t i b t c e l e s y c n e u q e r f t u p n i c i g o l 2 1 1 k l c i c p 1 n is k l c u p c s u o n o r h c n y s h t i w , s t u p t u o k c o l c i c p v 3 . 3 1 s fn i. n o r e w o p t a d e h c t a l t u p n i . t i b t c e l e s y c n e u q e r f t u p n i c i g o l , 6 1 , 5 1 , 3 1 0 2 , 9 1 , 7 1 ) 7 : 2 ( k l c i c pt u os k l c u p c s u o n o r h c n y s h t i w , s t u p t u o k c o l c i c p v 3 . 3 2 2# d pn i o t n i e c i v e d e h t n w o d r e w o p o t d e s u n i p t u p n i w o l e v i t c a s u o n o r h c n y s a d n a o c v e h t d n a d e l b a s i d e r a s k c o l c l a n r e t n i e h t . e t a t s r e w o p w o l a e b t o n l l i w n w o d r e w o p e h t f o y c n e t a l e h t . d e p p o t s e r a l a t s y r c e h t . s m 3 n a h t r e t a e r g 3 2k l c sn ii f o t u p n i k c o l c 2 t u p n i c 4 2a t a d sn ii r o f t u p n i a t a d 2 . t u p n i l a i r e s c 4 3 z h m 8 4t u ob s u r o f t u p t u o k c o l c z h m 8 4 d e x i f v 3 . 3 3 s fn i. n o r e w o p t a d e h c t a l t u p n i . t i b t c e l e s y c n e u q e r f t u p n i c i g o l 5 3 2 s fn i. n o r e w o p t a d e h c t a l t u p n i . t i b t c e l e s y c n e u q e r f t u p n i c i g o l z h m 4 2t u ot u p t u o z h m 4 2 d e x i f v 3 . 3 8 3f _ m a r d st u oi y b d e t c e f f a t o n m a r d s z h m 0 0 1 g n i n n u r e e r f v 3 . 3 2 c , 1 3 , 0 3 , 7 2 , 6 2 , 3 4 , 2 4 , 0 4 , 9 3 8 4 , 7 4 , 4 4 ) 0 : 1 1 ( m a r d st u o f f o d e n r u t e b n a c s t u p t u o m a r d s l l a . z h m 0 0 1 g n i n n u r t u p t u o v 3 . 3 i h g u o r h t 2 c 0 5l d n gr w pc i p a & u p c r o f y l p p u s r e w o p v 5 . 2 r o f d n u o r g 2 5 , 1 5) 1 : 0 ( k l c u p ct u o s f n o g n i d n e p e d z h m 0 0 1 r o z h m 6 6 . t u p t u o k c o l c s u b t s o h v 5 . 2 . 3 e g a p r e f e r s n i p ) 1 : 0 ( 5 5 , 3 5l d d vr w pc i p a o i , u p c r o f y l p p y u s r e w o p v 5 . 2 4 5c i p a o it u o. z h m 7 6 . 6 1 t a g n i n n u r s t u p t u o k c o l c v 5 . 2 6 5 4 s fn i. n o r e w o p t a d e h c t a l t u p n i . t i b t c e l e s y c n e u q e r f t u p n i c i g o l 0 f e r 1 t u o. t u p t u o k c o l c e c n e r e f e r z h m 8 1 3 . 4 1 , v 3 . 3 a !; <e4<
ics9250-14 preliminary product preview frequency selection clock enable configuration a f;
? cd44 < 4 4 4 s f3 s f2 s f1 s f0 s f u p c z h m m a r d s z h m z h m 6 6 v 3 i c p z h m z h m c i p a o i 00000 1 8 . 7 61 7 . 1 0 11 8 . 7 60 9 . 3 35 9 . 6 1 0000 1 0 0 . 0 70 0 . 5 0 10 0 . 0 70 0 . 5 30 5 . 7 1 000 10 1 0 . 2 71 0 . 8 0 11 0 . 2 70 0 . 6 30 0 . 8 1 000 11 7 6 . 6 60 0 . 0 0 17 6 . 6 63 3 . 3 37 6 . 6 1 00100 1 0 . 3 71 5 . 9 0 11 0 . 3 70 5 . 6 35 2 . 8 1 0010 1 0 0 . 5 70 5 . 2 1 10 0 . 5 70 5 . 7 35 7 . 8 1 00110 0 0 . 7 70 5 . 5 1 10 0 . 7 70 5 . 8 35 2 . 9 1 00111 1 0 . 8 71 0 . 7 1 11 0 . 8 70 0 . 9 30 5 . 9 1 01000 0 0 . 0 80 0 . 0 2 10 0 . 0 80 0 . 0 40 0 . 0 2 01001 0 0 . 3 81 5 . 4 2 10 0 . 3 80 5 . 1 45 7 . 0 2 01010 9 4 . 4 84 7 . 6 2 19 4 . 4 85 2 . 2 42 1 . 1 2 01011 0 0 . 0 0 10 0 . 0 5 10 0 . 0 0 10 0 . 0 50 0 . 5 2 01100 8 0 . 6 82 1 . 9 2 18 0 . 6 84 0 . 3 42 5 . 1 2 01101 0 0 . 8 80 0 . 2 3 10 0 . 8 80 0 . 4 40 0 . 2 2 01110 0 0 . 0 90 0 . 5 3 10 0 . 0 90 0 . 5 40 5 . 2 2 01111 0 0 . 5 90 5 . 2 4 10 0 . 5 90 5 . 7 45 7 . 3 2 10000 0 9 . 9 40 9 . 9 46 2 . 3 33 6 . 6 12 3 . 8 100 0 1 0 0 . 0 0 10 0 . 0 0 16 6 . 6 63 3 . 3 37 6 . 6 1 100 10 5 8 . 4 75 8 . 4 70 9 . 9 45 9 . 4 27 4 . 2 1 100 1 1 8 5 . 6 68 5 . 6 69 3 . 4 49 1 . 2 20 1 . 1 1 10 10 0 4 8 . 2 84 8 . 2 83 2 . 5 51 6 . 7 21 8 . 3 1 10 10 1 1 8 . 9 81 8 . 9 88 8 . 9 54 9 . 9 27 9 . 4 1 10 1 10 0 8 . 4 90 8 . 4 90 2 . 3 60 6 . 1 30 8 . 5 1 10111 0 5 . 0 0 10 5 . 0 0 10 0 . 7 60 5 . 3 35 7 . 6 1 11000 8 7 . 4 0 18 7 . 4 0 16 8 . 9 63 9 . 4 36 4 . 7 1 1100 1 7 7 . 1 1 17 7 . 1 1 12 5 . 4 76 2 . 7 33 6 . 8 1 110 10 7 7 . 4 1 17 7 . 4 1 11 5 . 6 76 2 . 8 33 1 . 9 1 110 11 0 0 . 0 0 10 0 . 0 0 16 6 . 6 63 3 . 3 37 6 . 6 1 11100 5 7 . 3 2 15 7 . 3 2 10 5 . 2 85 2 . 1 42 6 . 0 2 1110 1 4 7 . 2 3 14 7 . 2 3 19 4 . 8 85 2 . 4 42 1 . 2 2 11110 5 7 . 9 3 15 7 . 9 3 16 1 . 3 98 5 . 6 49 2 . 3 2 11111 9 6 . 9 4 19 6 . 9 4 19 7 . 9 90 9 . 9 45 9 . 4 2 # d pk l c u p cm a r d sc i p a o iz h m 6 6k l c i c p , f e r z h m 8 4 c s os o c v 0w o lw o lw o lw o lw o lw o lf f of f o 1n on on on on on on on o
ics9250-14 preliminary product preview power down waveform (
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t i b n o i t p i r c s e d d w p t i b ) 4 : 7 , 2 ( ) 4 : 7 , 2 ( t i b k l c u p c z h m m a r d s z h m 6 6 v 3 z h m k l c i c p c i p a o i z h m x x x x 1 e t o n 00000 1 8 . 7 61 7 . 1 0 11 8 . 7 60 9 . 3 35 9 . 6 1 00001 0 0 . 0 70 0 . 5 0 10 0 . 0 70 0 . 5 30 5 . 7 1 00010 1 0 . 2 71 0 . 8 0 11 0 . 2 70 0 . 6 30 0 . 8 1 00011 7 6 . 6 60 0 . 0 0 17 6 . 6 63 3 . 3 37 6 . 6 1 00100 1 0 . 3 71 5 . 9 0 11 0 . 3 70 5 . 6 35 2 . 8 1 00101 0 0 . 5 70 5 . 2 1 10 0 . 5 70 5 . 7 35 7 . 8 1 00110 0 0 . 7 70 5 . 5 1 10 0 . 7 70 5 . 8 35 2 . 9 1 00111 1 0 . 8 71 0 . 7 1 11 0 . 8 70 0 . 9 30 5 . 9 1 01000 0 0 . 0 80 0 . 0 2 10 0 . 0 80 0 . 0 40 0 . 0 2 01001 0 0 . 3 81 5 . 4 2 10 0 . 3 80 5 . 1 45 7 . 0 2 01010 9 4 . 4 84 7 . 6 2 19 4 . 4 85 2 . 2 42 1 . 1 2 01011 0 0 . 0 0 10 0 . 0 5 10 0 . 0 0 10 0 . 0 50 0 . 5 2 01100 8 0 . 6 82 1 . 9 2 18 0 . 6 84 0 . 3 42 5 . 1 2 01101 0 0 . 8 80 0 . 2 3 10 0 . 8 80 0 . 4 40 0 . 2 2 01110 0 0 . 0 90 0 . 5 3 10 0 . 0 90 0 . 5 40 5 . 2 2 01111 0 0 . 5 90 5 . 2 4 10 0 . 5 90 5 . 7 45 7 . 3 2 10000 0 9 . 9 40 9 . 9 46 2 . 3 33 6 . 6 12 3 . 8 1000 1 0 0 . 0 0 10 0 . 0 0 16 6 . 6 63 3 . 3 37 6 . 6 1 100 10 5 8 . 4 75 8 . 4 70 9 . 9 45 9 . 4 27 4 . 2 1 100 11 8 5 . 6 68 5 . 6 69 3 . 4 49 1 . 2 20 1 . 1 1 10 100 4 8 . 2 84 8 . 2 83 2 . 5 51 6 . 7 21 8 . 3 1 10 10 1 1 8 . 9 81 8 . 9 88 8 . 9 54 9 . 9 27 9 . 4 1 10 110 0 8 . 4 90 8 . 4 90 2 . 3 60 6 . 1 30 8 . 5 1 10 111 0 5 . 0 0 10 5 . 0 0 10 0 . 7 60 5 . 3 35 7 . 6 1 11000 8 7 . 4 0 18 7 . 4 0 16 8 . 9 63 9 . 4 36 4 . 7 1 11001 7 7 . 1 1 17 7 . 1 1 12 5 . 4 76 2 . 7 33 6 . 8 1 11010 7 7 . 4 1 17 7 . 4 1 11 5 . 6 76 2 . 8 33 1 . 9 1 11011 0 0 . 0 0 10 0 . 0 0 16 6 . 6 63 3 . 3 37 6 . 6 1 11100 5 7 . 3 2 15 7 . 3 2 10 5 . 2 85 2 . 1 42 6 . 0 2 11101 4 7 . 2 3 14 7 . 2 3 19 4 . 8 85 2 . 4 42 1 . 2 2 11110 5 7 . 9 3 15 7 . 9 3 16 1 . 3 98 5 . 6 49 2 . 3 2 11111 9 6 . 9 4 19 6 . 9 4 19 7 . 9 90 9 . 9 45 9 . 4 2 3 t i b s t u p n i d e h c t a l , t c e l e s e r a w d r a h y b d e t c e l e s s i y c n e u q e r f - 0 4 : 6 , 2 t i b y b d e t c e l e s s i y c n e u q e r f - 1 0 1 t i b l a m r o n - 0 d a e r p s r e t n e c % 5 2 . 0 e l b a n e m u r t c e p s d a e r p s - 1 1 0 t i b g n i n n u r - 0 s t u p t u o l l a e t a t s i r t - 1 0
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4= electrical characteristics - input/supply/common output parameters t a = 0 - 70c; supply voltage v dd = 3.3 v + 5%, vddl=2.5 v+ 5%(unless otherwise stated) parameter symbol conditions min typ max units input high voltage v ih 2v dd +0.3 v input low voltage v il v ss -0.3 0.8 v input high current i ih v in = v dd -5 5 a input low current i il1 v in = 0 v; inputs with no pull-up resistors -5 2.0 a input low current i il2 v in = 0 v; inputs with pull-up resistors -200 -100 a operating i dd3.3op c l = 0 pf; select @ 66m 60 100 ma supply current power down i dd3.3pd c l = 0 pf; with input address to vdd or gnd 400 600 a supply current input frequency f i v dd = 3.3 v; 14.318 mhz pin inductance l pin 7nh input capacitance 1 c in logic inputs 5 pf c out out put pin capacitance 6 pf c inx x1 & x2 pins 13.5 22.5 pf transition time 1 t trans to 1st crossing of target freq. 3 ms settling time 1 t s from 1st crossing to 1% target freq. ms clk stabilization 1 t stab from v dd = 3.3 v to 1% target freq. 3 ms delay t pzh ,t pzh output enable delay (all outputs) 1 10 ns t plz ,t pzh output disable delay (all outputs) 1 10 ns 1 guarenteed by design, not 100% tested in production.
ics9250-14 preliminary product preview electrical characteristics - 3v66 t a = 0 - 70c; v dd = 3.3 v +/-5%; c l = 10-30 pf (unless otherwise stated) parameter symbol conditions min typ max units output frequency f o 1 66 mhz output impedance r dsp1 1 v o = v dd *(0.5) 12 55 ? output impedance r d sn1 1 v o = v d d *(0.5) 12 55 ? output high voltage v o h1 i o h = -1 ma 2.4 v output low voltage v o l1 i o l = 1 ma 0.55 v output high current i o h1 v oh@ min = 1.0 v, voh@ max = 3.135 v -33 -33 ma output low current i o l1 vol@ min = 1.95 v, vol@ max= 0.4 30 38 ma rise time t r 1 1 v o l = 0.4 v, v o h = 2.4 v 0.4 1.6 ns fall time t f1 1 v oh = 2.4 v, v ol = 0.4 v 0.4 1.6 ns duty cycle d t 1 1 v t = 1.5 v 45 55 % skew t s k1 1 v t = 1.5 v 175 ps jitter t j cyc-cyc v t = 1.5 v 500 ps 1 guarenteed by design, not 100% tested in production. electrical characteristics - cpu t a = 0 - 70c, v ddl = 2.5 v +/-5%; c l = 10 - 20 pf (unless otherwise stated) parameter symbol conditions min typ max units output frequency f o 2 66 100 mhz output impedance r d sp2b 1 v o = v d d *(0.5) 13.5 45 ? output impedance r dsn2 b 1 v o = v dd *(0.5) 13.5 45 ? output high voltage v oh2 b i oh = -1 ma 2 v output low voltage v o l2 b i o l = 1 ma 0.4 v output high current i o h2 b v o h @min = 1.0v , v o h@ max = 2.375v -27 -27 ma output low current i o l2b v o l @min = 1.2v , v o l@ max = 0.3v 27 30 ma rise time t r 2b 1 v o l = 0.4 v, v o h = 2.0 v 0.4 1.6 ns fall time t f2b 1 v oh = 0.4 v, v ol = 2.0 v 0.4 1.6 ns duty cycle d t 2b 1 v t = 1.25 v 455055ns skew t s k2b 1 v t = 1.25 v 175 ps t jcyc-cyc 1 v t = 1.25 v 250 ps jitter 1 guarenteed by design, not 100% tested in production.
ics9250-14 preliminary product preview electrical characteristics - ioapic t a = 0 - 70c;v ddl = 2.5 v +/-5%; c l = 10 - 20 pf (unless otherwise stated) parameter symbol conditions min typ max units output frequency f o 4 16.67 mhz output frequency f o 5 33 mhz output impedance r d sp4b 1 v o = v d d *(0.5) 9 30 ? output impedance r d sn4b 1 v o = v d d *(0.5) 9 30 ? output high voltage v o h4 \ b i o h = -5.5 ma 2 v output low voltage v o l4 b i o l = 9.0 ma 0.4 v output high current i o h4 b v o h@ mi n = 1.4 v, v o h@ max = 2.5 v -36 -21 ma output low current i o l4b v o l@ min = 1.0 v, v o l@ max= 0.2 36 31 ma rise time t r 4b 1 v o l = 0.4 v, v o h = 2.0 v 0.4 1.6 ns fall time t f 4b 1 v o h = 2.0 v, v o l = 0.4 v 0.4 1.6 ns duty cycle d t 4b 1 v t = 1.25 v 45 55 % jitter t jcyc-cyc v t = 1.25 v 500 ps 1 guarenteed by design, not 100% tested in production. electrical characteristics - sdram t a = 0 - 70c; v dd = v ddl = 3.3 v +/-5%; c l = 20 - 30 pf (unless otherwis e s tated) parameter symbol conditions min typ max units output frequency f o3 100 mhz output impedance r dsp3 1 v o = v dd *(0.5) 10 24 ? output impedance r dsn3 1 v o = v dd *(0.5) 10 24 ? output high voltage v oh3 i oh = -1 ma 2.4 v output low voltage v ol3 i ol = 1 ma 0.4 v output high current i oh3 v oh @min = 2.0 v, v oh@ max =3.135 v -54 -46 ma output low current i ol3 v ol@ min = 1.0 v, v ol@ max =0.4 v 54 53 ma ris e time t r3 1 v ol = 0.4 v, v oh = 2.4 v 0.4 1.6 ns fall time t f3 1 v oh = 2.4 v, v ol = 0.4 v 0.4 1.6 ns duty cycle d t3 1 v t = 1.5 v 45 55 % skew t sk3 1 v t = 1.5 v 250 ps jitter t j cyc-cyc v t = 1.5 v 250 ps 1 guarenteed by design, not 100% tested in production.
ics9250-14 preliminary product preview electrical characteristics - pci t a = 0 - 70c; v dd = 3.3 v +/-5%; c l = 10-30 pf (unless otherwise stated) parameter symbol conditions min typ max units output frequency f o 1 33 mhz output impedance r dsp1 1 v o = v dd *(0.5) 12 55 ? output impedance r d sn1 1 v o = v d d *(0.5) 12 55 ? output high voltage v o h1 i o h = -1 ma 2.4 v output low voltage v o l1 i o l = 1 ma 0.55 v output high current i o h1 v oh@ min = 1.0 v, voh@ max = 3.135 v -33 -33 ma output low current i o l1 vol@ min = 1.95 v, vol@ max= 0.4 30 38 ma rise time t r 1 1 v o l = 0.4 v, v o h = 2.4 v 0.5 2 ns fall time t f1 1 v oh = 2.4 v, v ol = 0.4 v 0.5 2 ns duty cycle d t 1 1 v t = 1.5 v 45 55 % skew t s k1 1 v t = 1.5 v 500 ps jitter t j cyc-cyc v t = 1.5 v 500 ps 1 guarenteed by design, not 100% tested in production. electrical characteristics - 48m, ref t a = 0 - 70c; v dd = v ddl = 3.3 v +/-5%; c l = 10 -20 pf (unless otherwise stated) parameter symbol conditions min typ max units output frequency f o48m 48 mhz output frequency f oref 14.318 mhz output impedance r dsp5 1 v o = v dd *(0.5) 20 60 ? output impedance r dsn5 1 v o = v dd *(0.5) 20 60 ? output high voltage v oh5 i oh = 1 ma 2.4 v output low voltage v ol5 i ol = -1 ma 0.4 v output high current i oh5 v oh @min =1 v, v oh@max = 3.135 v -29 -23 ma output low current i ol5 v ol@min =1.95 v, v ol@min =0.4 v 29 27 ma ris e time t r5 1 v ol = 0.4 v, v oh = 2.4 v 1.8 4 ns fall time t f5 1 v oh = 2.4 v, v ol = 0.4 v 1.7 4 ns duty cycle d t5 1 v t = 1.5 v 45 55 % jitter t jcyc-cyc 1 v t = 1.5 v; fixed clocks 500 ps t jcyc-cyc 1 v t = 1.5 v; ref clocks 1000 ps skew t sk v t = 1.5 v 250 ps 1 guarenteed by design, not 100% tested in production.
ics9250-14 preliminary product preview group offset waveforms group skews at common transition edges: cpu & ioapic load (lumped) = 20pf; pci, sdram, 3v66 load (lumped) = 30pf. group symbol conditions min typ max units cpu (at 66mhz) to 3v66 s cpu1 -3 v6 6 cpu @ 1.25v, 3v66 @ 1.5v (note: 180 offset between cpu & 3v66 0500ps cpu (at 100mhz) to sdram s cpu2-sdram c pu @ 1.25v, sdram @ 1.5v (note: 180 offset between cpu & sdram 0500ps 3v66 to pci s 3v66-pci 3v66 @ 1.5v, pci @ 1.5v 1.5 2.1 4 ns ioapic to pci s ioapic-pci ioapic @ 1.25v, pci @1.5v 0 500 ps
ics9250-14 preliminary product preview product preview documents contain information on new products in the sampling or preproduction phase of development. characteristic data and other specifications are subject to change without notice. l o b m y ss n o i s n e m i d n o m m o cs n o i t a i r a vdn . n i m. m o n. x a m. n i m. m o n. x a m a5 9 0 .2 0 1 .0 1 1 .d a0 2 7 .5 2 7 .0 3 7 .6 5 1 a8 0 0 .2 1 0 .6 1 0 . 2 a7 8 0 .0 9 0 .4 9 0 . b8 0 0 .- 5 3 1 0 . c5 0 0 .-0 1 0 . ds n o i t a i r a v e e s e1 9 2 .5 9 2 .9 9 2 . ec s b 5 2 0 . 0 h5 9 3 .-0 2 4 . h0 1 0 .3 1 0 .6 1 0 . l0 2 0 .-0 4 0 . ns n o i t a i r a v e e s 0- 8 56 pin 300 mil ssop package ?for current dimensional specifications, see jedec 95.? .093 dia. pin (optional) d/2 e/2 bottom view a 2 see detail ?a? -e- c end view h pin 1 top view index area parting line l detail ?a? a 1 -e- b a side view -c- -d- seating plane .004 c ordering information ics9250 y f-14-t

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