rev. information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a fast, precision comparator AD790 features 45 ns max propagation delay single 5 v or dual 15 v supply operation cmos or ttl compatible output 250 v max input offset voltage 500 v max input hysteresis voltage 15 v max differential input voltage onboard latch 60 mw power dissipation available in 8-pin plastic and hermetic cerdip packages available in tape and reel in accordance with eia-481a standard applications zero-crossing detectors overvoltage detectors pulse-width modulators precision rectifiers discrete a/d converters delta-sigma modulator a/ds product description the AD790 is a fast (45 ns), precise voltage comparator, with a number of features that make it exceptionally versatile and easy to use. the AD790 may operate from either a single 5 v supply or a dual 15 v supply. in the single-supply mode, the AD790? inputs may be referred to ground, a feature not found in other comparators. in the dual-supply mode it has the unique ability of handling a maximum differential voltage of 15 v across its in- put terminals, easing their interfacing to large amplitude and dynamic signals. this device is fabricated using analog devices?complementary bipolar (cb) process?hich gives the AD790? combination of fast response time and outstanding input voltage resolution (1 mv max). to preserve its speed and accuracy, the AD790 incorporates a ?ow glitch?output stage that does not exhibit the large current spikes normally found in ttl or cmos output stages. its controlled switching reduces power supply disturbances that can feed back to the input and cause undesired oscillations. the AD790 also has a latching function which makes it suitable for applications requiring synchronous operation. the AD790 is available in five performance grades. the AD790j and the AD790k are rated over the commercial tem- perature range of 0 c to 70 c. the AD790a and AD790b are rated over the industrial temperature range of ?0 c to +85 c. the AD790s is rated over the military temperature range of ?5 c to +125 c. product highlights 1. the AD790? combination of speed, precision, versatility and low cost makes it suitable as a general purpose compara- tor in analog signal processing and data acquisition systems. 2. built-in hysteresis and a low-glitch output stage minimize the chance of unwanted oscillations, making the AD790 easier to use than standard open-loop comparators. 3. the hysteresis combined with a wide input voltage range enables the AD790 to respond to both slow, low level (e.g., 10 mv) signals and fast, large amplitude (e.g., 10 v) signals. 4. a wide variety of supply voltages is acceptable for operation of the AD790, ranging from single 5 v to dual +5 v/?2 v, 5 v, or +5 v/ 15 v supplies. 5. t he ad7 90? power dissipation is the lowest of any compara- tor in its speed range. 6. the AD790? output swing is symmetric between v logic and ground, thus providing a predictable output under a wide range of input and output conditions. connection diagrams 8-pin plastic mini-dip (n) and cerdip (q) packages output latch ground v logic 1 2 3 45 6 7 8 AD790 + +v s +in ?n ? s 8-pin soic (r) package latch ground v logic +v s 1 2 3 4 5 6 7 8 output AD790 + +in ?n ? s one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700www.analog.com fax: ? analog devices, inc., 781/461-3113 2014 e
AD790* product page quick links last content update: 02/23/2017 comparable parts view a parametric search of comparable parts. documentation application notes ? an-25: applying the op06 op amp as a high precision comparator ? an-352: high speed comparators provide many useful circuit functions when used correctly data sheet ? AD790: fast, precision comparator data sheet reference designs ? cn0123 reference materials product selection guide ? comparators product brochure 2007 design resources ? AD790 material declaration ? pcn-pdn information ? quality and reliability ? symbols and footprints discussions view all AD790 engineerzone discussions. sample and buy visit the product page to see pricing options. technical support submit a technical question or find your regional support number. document feedback submit feedback for this data sheet. this page is dynamically generated by analog devices, inc., and inserted into this data sheet. a dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. this dynamic page may be frequently modified.
rev. C2C AD790?pecifications dual supply AD790j/a AD790k/b AD790s parameter conditions min typ max min typ max min typ max unit response characteristic 100 mv step propagation delay, t pd 5 mv overdrive 40 45 40 45 40 45 ns t min to t max 45/50 45/50 60 ns output characteristics output high voltage, v oh 1.6 ma source 4.65 4.65 4.65 6.4 ma source 4.3 4.45 4.3 4.45 4.3 4.45 v t min to t max 4.3/ 4.3 4.3 4.3 v output low voltage, v ol 1.6 ma sink 0.35 0.35 0.35 v 6.4 ma sink 0.44 0.5 0.44 0.5 0.44 0.5 v t min to t max 0.5/ 0.5 0.5 0.5 v input characteristics offset voltage 1 0.2 1.0 0.05 0.25 0.2 1.0 mv t min to t max 1.5 0.5 1.5 mv hysteresis 2 t min to t max 0.3 0.4 0.6 0.3 0.4 0.5 0.3 0.4 0.65 mv bias current either input 2.5 5 1.8 3.5 2.5 5 a t min to t max 6.5 4.5 7 a offset current 0.04 0.25 0.02 0.15 0.04 0.25 a t min to t max 0.3 0.2 0.4 a power supply rejection ratio dc v s 20% 80 90 88 100 80 90 db t min to t max 76 88 85 93 76 85 db input voltage range differential voltage v s ? 15 v v s v s v s v common mode ? s +v s ? v v s +v s ? v v s +v s ? v v common mode rejection ratio ?0 v single supply AD790j/a AD790k/b AD790s parameter conditions min typ max min typ max min typ max unit response characteristic 100 mv step propagation delay, t pd 5 mv overdrive 45 50 45 50 45 50 ns t min to t max 50/60 50/60 65 ns output characteristics output high voltage, v oh 1.6 ma source 4.65 4.65 4.65 6.4 ma source 4.3 4.45 4.3 4.45 4.3 4.45 v t min to t max 4.3 4.3 4.3 v output low voltage, v ol 1.6 ma sink 0.35 0.35 0.35 v 6.4 ma sink 0.44 0.5 0.44 0.5 0.44 0.5 v t min to t max 0.5 0.5 0.5 v input characteristics offset voltage 2 0.45 1.5 0.35 0.6 0.45 1.5 mv t min to t max 2.0 0.85 2.0 mv hysteresis 3 t min to t max 0.3 0.5 0.75 0.3 0.5 0.65 0.3 0.7 1.0 mv bias current either input 2.7 5 2.0 3.5 2.7 5 a t min to t max 7 58 a offset current 0.04 0.25 0.02 0.15 0.04 0.25 a t min to t max 0.3 0.2 0.4 a power supply rejection ratio dc 4.5 v v s 5.5 v 80 90 86 100 80 90 db t min to t max 76/ 76 88 82 93 76 85 db input voltage range differential voltage v s v s v s v common mode 0 +v s ? v 0 +v s ? v 0 +v s ? v v input impedance 20 22 0 22 0 2m ? pf latch characteristics latch hold time, t h 25 35 25 35 25 35 ns latch setup time, t s 510 510 510 ns low input level, v il t min to t max 0.8 0.8 0.8 v high input level, v ih t min to t max 1.6 1.6 1.6 v latch input current 2.3 5 2.3 3.5 2.3 5 a t min to t max 7 58 a supply characteristics supply voltage 4 t min to t max 4.5 7 4.5 7 4.7 7 v quiescent current 10 12 10 12 10 12 ma power dissipation 60 60 60 mw temperature range rated performance t min to t max 0 to 70/?0 to +85 0 to 70/?0 to +85 ?5 to +125 c notes 1 pin 1 tied to pin 8, and pin 4 tied to pin 6. 2 defined as the average of the input voltages at the low to high and high to low transition points. refer to figure 6. 3 defined as half the magnitude between the input voltages at the low to high and high to low transition points. refer to figure 6. 4 ? s must not be connected above ground. all min and max specifications are guaranteed. specifications shown in boldface are tested on all production units at final test. specifications subject to change without notice. AD790 rev. C3C (operation @ 25 c and +v s = v logic = 5 v, ? s = 0 v unless otherwise noted.) 1 e
AD790 rev. C4C absolute maximum ratings 1, 2 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 . . . . . . . . . . . . . . . . . . . 500 mw differential input voltage . . . . . . . . . . . . . . . . . . . . . 16.5 v output short-circuit duration . . . . . . . . . . . . . . . . indefinite storage temperature range (n, r) . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 c to +125 c (q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 c to +150 c lead temperature range (soldering 60 sec) . . . . . . . . 300 c logic supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 v notes 1 stresses above those listed under ?bsolute maximum ratings?may cause perma- nent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 thermal characteristics: plastic n-8 package: ja = 90 c/watt; ceramic q-8 package: ja = 110 c/watt, jc = 30 c/watt. soic (r-8) package: ja = 160 c watt; jc = 42 c/watt. AD790 0.1? 0.1? 0.1? 15v + +in ?n 5v + 510 output 15v latch (optional) 8 1 5 7 6 4 3 2 ? figure 1. basic dual supply configuration (n, q package pinout) AD790 1 2 3 4 5 6 7 8 +5v +15v ?5v tek 7904 scope 5v voltage source 10? ?mv 0.1? ?00mv ?.3v ?.7v ?v hp8112 pulse generator 1k hp2835 mps 571 0.1? 0.1? 0.1? 10k? 650? 400? 50? 25? 130? figure 3. response time test circuit (n, q package pinout) AD790 1 2 3 4 5 6 7 8 0.1? +in in 5v + output latch (optional) 510 ? figure 2. basic single supply configuration (n, q package pinout) e
t ypical performace characteristics?d790 rev. C5C tpc 2. propagation delay vs. load capacitance tpc 5. propagation delay vs. temperature tpc 8. total supply current vs. temperature tpc 3. propagation delay vs. fanout (lsttl and cmos) 06 410 0.8 0.7 0.6 0.5 0.4 0.2 0.1 0.3 0.0 28 i sink ? ma temp = +25? output low voltage ?volts tpc 6. output low voltage vs. sink current input t h latch t s output t pd 0 v ih v il v oh v ol t s = setup time t h = hold time t pd = comparator response time figure 4. latch timing tpc 1. propagation delay vs. overdrive tpc 4. propagation delay vs. source resistance 06 410 5.0 4.9 4.8 4.7 4.6 4.4 4.3 4.5 4.2 28 temp = +25? output low voltage ?volts i source ?ma tpc 7. output high voltage vs. source current e
AD790 rev. C6C circuit description the AD790 possesses the overall characteristics of a standard monolithic comparator: differential inputs, high gain and a logic output. however, its function is implemented with an architec- ture which offers several advantages over previous comparator designs. specifically, the output stage alleviates some of the limi- tations of classic ?tl?comparators and provides a symmetric output. a simplified representation of the AD790 circuitry is shown in figure 5. a1 a2 av output gain stage output stage q2 q1 + + + in + in v logic gnd figure 5. AD790 block diagram the output stage takes the amplified differential input signal and converts it to a single-ended logic output. the output swing is defined by the pull-up pnp and the pull-down npn. these pro- duce inherent rail-to-rail output levels, compatible with cmos logic, as well as ttl, without the need for clamping to internal bias levels. furthermore, the pull-up and pull-down levels are symmetric about the center of the supply range and are refer- enced off the v logic supply and ground. the output stage has nearly symmetric dynamic drive capability, yielding equal rise and fall times into subsequent logic gates. unlike classic ttl or cmos output stages, the AD790 circuit does not exhibit large current spikes due to unwanted current flow between the output transistors. the AD790 output stage has a controlled switching scheme in which amplifiers a1 and a2 drive the output transistors in a manner designed to reduce the current flow between q1 and q2. this also helps minimize the disturbances feeding back to the input which can cause troublesome oscillations. the output high and low levels are well controlled values defined by v logic (5 v), ground and the transistor equivalent schottky clamps and are compatible with ttl and cmos logic require- ments. the fanout of the output stage is shown in tpc 3 for standard lsttl or hcmos gates. output drive behavior vs. capacitive load is shown in tpc 2. hysteresis the AD790 uses internal feedback to develop hysteresis about the input reference voltage. figure 6 shows how the input offset voltage and hysteresis terms are defined. input offset voltage (v os ) is the difference between the center of the hysteresis range and the ground level. this can be either positive or nega- tive. the hysteresis voltage (v h ) is one-half the width of the v oh v ol h v = hysteresis voltage h v 0 h v v out in + v os v os = input offset voltage 2 3 7 in + out v gnd figure 6. hysteresis definitions (n, q package pinout) hysteresis range. this built-in hysteresis allows the AD790 to avoid oscillation when an input signal slowly crosses the ground level. supply voltage connections the AD790 may be operated from either single or dual supply voltages. internally, the v logic circuitry and the analog front- end of the AD790 are connected to separate supply pins. if dual supplies are used, any combination of voltages in which +v s v logic ?0.5 v and ? s 0 may be chosen. for single supply operation (i.e., +v s = v logic ), the supply voltage can be oper- ated between 4.5 v and 7 v. figure 7 shows some other examples of typical supply connections possible with the AD790. bypassing and grounding although the AD790 is designed to be stable and free from oscillations, it is important to properly bypass and ground the power supplies. ceramic 0.1 f capacitors are recommended and should be connected directly at the AD790? supply pins. these capacitors provide transient currents to the device during comparator switching. the AD790 has three supply voltage pins, +v s , ? s and v logic . it is important to have a common ground lead on the board for the supply grounds and the gnd pin of the AD790 to provide the proper return path for the supply current. latch operation the AD790 has a latch function for retaining input information at the output. the comparator decision is ?atched?and the output state is held when pin 5 is brought low. as long as pin 5 is kept low, the output remains in the high or low state, and does not respond to changing inputs. proper capture of the input signal requires that the timing relationships shown in figure 4 are followed. pin 5 should be driven with cmos or ttl logic levels. the output of the AD790 will respond to the input when pin 5 is at a high logic level. when not in use, pin 5 should be con nected to the positive logic supply. when using dual supplies, it is rec- ommended that a 510 ? resistor be placed in series with pin 5 and the driving logic gate to limit input currents during powerup. e
AD790 rev. C7C AD790 1 2 3 4 5 6 7 8 +in ?n 5v + out 510? + 12v 0.1? 0.1? +v s = +12v, ? s = 0v v logic = +5v AD790 1 2 3 4 5 6 7 8 5v + out 15v 0.1? 0.1? +v s = +5v, ? s = ?5v v logic = +5v +in ?n AD790 1 2 3 4 5 6 7 8 5v + out 5v 0.1? 0.1? +in ?n +v s = +5v, ? s = ?v, v logic = +5v figure 7. typical power supply connections (n, q package pinout) window comparator for overvoltage detection the wide differential input range of the AD790 makes it suitable for monitoring large amplitude signals. the simple overvoltage detection circuit shown in figure 8 illustrates direct connection of the input signal to the high impedance inputs of the comparator without the need for special clamp diodes to limit the differen- tial input voltage across the inputs. 510? overrange = 1 7432 AD790 1 2 3 4 5 6 7 8 +15v +5v ?5v AD790 1 2 3 4 5 6 7 8 +15v +5v ?5v v in 510? 0.1? 0.1? 0.1? 0.1? 0.1? 0.1? sign 1 = high 0 = low ?.5v +7.5v figure 8. overvoltage detector (n, q package pinout) single supply ground referred overload detector the AD790 is useful as an overload detector for sensitive loads that must be powered from a single supply. a simple ground referenced overload detector is shown in figure 8. the com- parator senses a voltage across a pc board trace and compares that to a reference (trip) voltage established by the comparator? minus supply current through a 2.7 ? resistor. this sets up a 10 mv reference level that is compared to the sense voltage. applying the C7C the minus supply current is proportional to absolute tempera- ture and compensates for the change in the sense resistance with temperature. the width and length of the pc board trace determine the resistance of the trace and consequently the trip cur rent level. i limit = 10 mv/r sense r sense = rho (trace length/trace width) rho = resistance of a unit square of trace l o a d 2.7 pc board trace AD790 1 2 3 4 5 6 7 8 0.1? 5v + output r sense 10mv/100ma +v s 510 ? ? figure 9. ground referred overload detector circuit (n, q package pinout) precision full-wave rectifier the high speed and precision of the AD790 make it suitable for use in the wide dynamic range full-wave rectifier shown in figure 10. this circuit is capable of rectifying low level signals as small as a few mv or as high as 10 v. input resolution, propaga- tion delay and op amp settling will ultimately limit the maximum input frequency for a given accuracy level. total comparator plus switch delay is approximately 100 ns, which limits the maximum input frequency to 1 mhz for clean rectification. ad711 10k fet switches the gain from +1 to ? 20k 10k AD790 1 2 3 4 5 6 7 8 +15v +5v ?5v 2 3 4 6 7 +15v ?5v v in v out nmos fet (r on < 20 ) 0.1? 510 0.1? 0.1? 0.1? 0.1? ? ? ? ? ? figure 10. precision full-wave rectifier (n, q package pinout) e
AD790 rev. C8C 2 3 1 4 6 7 5 8 ttl level output 400 * 5v + gnd standard schottky diode 1k a resistor up to 10k maybe used to reduce the source and sink current of the driver. however, this will slightly lower the maximum usable clock rate. * bipolar signal input 4.7v 0.3v 5v ? ? ? figure 11. a bipolar to cmos ttl line receiver (n, q package pinout) bipolar to cmos/ttl it is so metimes desirable to translate a bipolar signal (e.g., 5 v) coming from a communications cable or another section of the system to cmos/ttl logic levels; such an application is referred to as a line receiver. previously, the interface to the bipolar signal required either a dual ( ) power supply or a refer- ence voltage level about which the line receiver would switch. the AD790 may be used in a simple circuit to provide a unique capability: the ability to receive a bipolar signal while powered from a single 5 v supply. other comparators cannot perform this task. figure 11 shows a 1 k ? resistor in series with the input signal which is then clamped by a schottky diode, holding the input of the comparator at 0.4 v below ground. although the comparator is specified for a common mode range down to ? s , (in this case ground) it is permissible to bring one of the inputs a few hundred mv below ground. the comparator switches around this level and produces a cmos/ttl compatible swing. the circuit will operate to switching frequencies of 20 mhz. e
AD790 rev. e | page 9 outline dimensions compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off i nch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 12. 8-lead plastic dual in-line package [pdip] narrow body (n-8) dimensions shown in inches and (millimeters) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.055 (1.40) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 14 5 8 figure 13. 8-lead ceramic dual in-line package [cerdip] (q-8) dimensions shown in inches and (millimeters)
AD790 rev. e | page 10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 14. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option AD790jn 0c to 70c 8-lead pdip n-8 AD790jnz 0c to 70c 8-lead pdip n-8 AD790jr 0c to 70c 8-lead soic_n r-8 AD790jr-reel 0c to 70c 8-lead soic reel AD790jr-reel7 0c to 70c 8-lead soic_n r-8 AD790jrz 0c to 70c 8-lead soic_n r-8 AD790jrz-reel 0c to 70c 8-lead soic reel AD790jrz-reel7 0c to 70c 8-lead soic reel AD790aq ?40c to +85c 8-lead cerdip q-8 AD790sq ?55c to +125c 8-lead cerdip q-8 1 z = rohs compliant part. revision history 11/14rev. d to rev. e updated outline dimensions ......................................................... 9 changes to ordering guide .......................................................... 10 5/02rev. c to rev. d edits to soic (r-8) package ........................................................... 9 03/02? rev. b to rev. c edits to features ................................................................................ 1 edits to product description .......................................................... 1 deleted metalization photograph .................................................. 4 edits to ordering guide .................................................................. 4 ?2014 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00844-0-11/14(e)
|
