spd50p03l g opti mos ? -p power-transistor features ? p-channel ? enhancement mode ? logic level ? 175c operating temperature ? avalanche rated ? d v /d t rated ? high current rating ? pb-free lead-plating, rohs compliant maximum ratings, at t j =25 c, unless otherwise specified parameter symbol conditions unit continuous drain current i d t c =25 c 1) a t c =100 c 1) pulsed drain current i d,pulse t c =25 c avalanche energy, single pulse e as i d =-50 a, r gs =25 ? mj reverse diode d v /d t d v /d t i d =-50 a, v ds =24 v, d i /d t =-200 a/s, t j,max =175 c kv/s gate source voltage v gs v power dissipation p tot t c =25 c w operating and storage temperature t j , t stg c esd class hbm soldering temperature iec climatic category; din iec 68-1 value 256 -200 -50 -50 150 55/175/56 -55?+175 20 -6 260 1c v ds -30 v r ds(on),max 7 m ? i d -50 a product summary pg-to252-5 type package marking lead free pg-to252-5 50p03l yes spd50p03l g rev. 1. 9 page 1 20 12 - 0 9 -1 3 packing non dry tape and reel information 1000 pcs / reel
spd50p03l g parameter symbol conditions unit min. typ. max. thermal characteristics thermal resistance, junction - case r thjc - - 1 k/w r thja minimal footprint - - 75 6 cm 2 cooling area 2) --50 electrical characteristics, at t j =25 c, unless otherwise specified static characteristics drain-source breakdown voltage v (br)dss v gs =0 v, i d =-250 a -30 - - v gate threshold voltage v gs(th) v ds = v gs , i d =-250 a -1 -1.5 -2 zero gate voltage drain current i dss v ds =-30 v, v gs =0 v, t j =25 c - -0.1 -1 a v ds =-30 v, v gs =0 v, t j =175 c - -10 -100 gate-source leakage current i gss v gs =-20 v, v ds =0 v - -10 -100 na drain-source on-state resistance r ds(on) v gs =-4.5 v, i d =-30 a - 8.5 12.5 m ? drain-source on-state resistance r ds(on) v gs =-10 v, i d =-50 a - 5.7 7.0 transconductance g fs | v ds |>2| i d | r ds(on)max , i d =-50 a 47 94 - s 1) current is limited by bondwire; with an r thjc =1 k/w the chip is able to carry 123 a. values 2) device on 40 mm x 40 mm x 1.5 mm epoxy pcb fr4 with 6 cm 2 (one layer, 70 m thick) copper area for drain connection. pcb is vertical in still air. thermal resistance, junction - ambient rev. 1. 9 page 2 20 12 -0 9 - 1 3
spd50p03l g parameter symbol conditions unit min. typ. max. dynamic characteristics input capacitance c iss - 4590 6880 pf output capacitance c oss - 1220 1830 reverse transfer capacitance c rss - 1000 1500 turn-on delay time t d(on) - 14.8 22 ns rise time t r - 21.7 32 turn-off delay time t d(off) - 139 208 fall time t f - 104 156 gate char g e characteristics 3) gate to source charge q gs - -14 -19 nc gate to drain charge q gd - -35 -53 gate charge total q g v dd =-24 v, i d =-50 a, v gs =0 to -10 v - -95 -126 gate plateau voltage v plateau v dd =-24 v, i d =-50 a - -3.0 - v reverse diode diode continous forward current i s - - -50 a diode pulse current i s,pulse - - -200 diode forward voltage v sd v gs =0 v, i f =50 a, t j =25 c - -1 -1.65 v reverse recovery time t rr v r =-15 v, i f =| i s |, d i f /d t =100 a/s -3847ns reverse recovery charge q rr -4657nc 3) see figure 16 for gate charge parameter definition t c =25 c values v gs =0 v, v ds =-25 v, f =1 mhz v dd =-15 v, v gs =-10 v, i d =-1 a, r g =6 ? v dd =-24 v, i d =-50 a rev. 1. 9 page 3 20 12 -0 9 -1 3
spd50p03l g 1 power dissipation 2 drain current p tot =f( t c ) i d =f( t c ); | v gs | 10 v 3 safe operating area 4 max. transient thermal impedance i d =f( v ds ); t c =25 c; d =0 z thjc =f( t p ) parameter: t p parameter: d = t p / t 1 s 10 s 100 s 1 ms 10 ms dc 10 -1 10 0 10 1 10 2 10 0 10 1 10 2 10 3 -v ds [v] -i d [a] limited by on-state resistance single pulse 0.01 0.02 0.05 0.1 0.2 0.5 10 -1 10 -2 10 -3 10 -4 10 -5 10 1 10 0 10 -1 10 -2 t p [s] z thjc [k/w] 0 20 40 60 80 100 120 140 160 0 40 80 120 160 200 t c [c] p tot [w] 0 5 10 15 20 25 30 35 40 45 50 55 0 40 80 120 160 200 t c [c] -i d [a] rev. 1. 9 page 4 20 12 -0 9 -1 3
spd50p03l g 5 typ. output characteristics 6 typ. drain-source on resistance i d =f( v ds ); t j =25 c r ds(on) =f( i d ); t j =25 c parameter: v gs parameter: v gs 7 typ. transfer characteristics 8 typ. forward transconductance i d =f( v gs ); | v ds |>2| i d | r ds(on)max g fs =f( i d ); t j =25 c parameter: t j -4.5 v -5.5 v v 6- -6.5 v -7 v -10 v 0 5 10 15 0 40 80 120 160 200 -i d [a] r ds(on) [m ? ] c 25 c 175 0 10 20 30 40 50 60 70 80 01234 -v gs [v] -i d [a] 0 20 40 60 80 100 0204060 -i d [a] g fs [s] -3 v -5 v -4 v -2.5 v -4.5 v -3.5 v -10 v 0 20 40 60 80 100 120 140 160 180 200 0246810 -v ds [v] -i d [a] rev. 1. 9 page 5 20 12 -0 9 -1 3
spd50p03l spd50p03l g 9 drain-source on-state resistance 10 typ. gate threshold voltage r ds(on) =f( t j ); i d =-50 a; v gs =-10 v v gs(th) =f( t j ); v gs = v ds ; i d =-250 a 11 typ. capacitances 12 forward characteristics of reverse diode c =f( v ds ); v gs =0 v; f =1 mhz i f =f( v sd ) parameter: t j typ. 98 % 3 5 7 9 11 -60 -20 20 60 100 140 180 t j [c] r ds(on) [m ? ] ciss coss crss 10 4 10 3 10 2 100 1000 10000 0 5 10 15 20 25 -v ds [v] c [pf] typ. 98%. 2% 0 0.5 1 1.5 2 2.5 -60 -20 20 60 100 140 180 t j [c] -v gs(th) [v] 25 c, typ 175 c, typ 25 c, 98% 175 c, 98% 1 10 100 1000 0 0.5 1 1.5 2 2.5 -v sd [v] i f [a] rev. 1. 9 page 6 20 12 -0 9 - 1 3
spd50p03l g 13 avalanche characteristics 14 typ. gate charge i as =f( t av ); r gs =25 ? v gs =f( q gate ); i d =-50 a pulsed parameter: t j(start) parameter: v dd 15 drain-source breakdown voltage 16 gate charge waveforms v br(dss) =f( t j ); i d =-250 a v 6- v 15- v 24- 0 2 4 6 8 10 12 0 20406080100120 -q gate [nc] -v gs [v] 27 28 29 30 31 32 33 34 35 36 -60 -20 20 60 100 140 180 t j [c] -v br(dss) [v] v gs q gate v gs(th) q g(th) q gs q gd q sw q g c 25 c 100 c 150 1 10 100 1 10 100 1000 t av [s] -i av [a] rev. 1. 9 page 7 20 12 -0 9 -1 3
spd50p03l g package outline pg -to252-5: outline footprint packaging tape dimensions in mm rev. 1. 9 page 8 20 12 -0 9 -1 3
rev. 1. 9 page 9 20 12 -0 9 -1 3 spd50p03l spd50p03l g published b y infineon te c hnologies ag 8172 6 munic h, german y ? 2008 infin e on tech nol ogies ag all rights reserv e d. legal disclai mer the inform ation given in th is do cume nt shall in n o event be reg a rd ed as a g uara n tee of con d itions or ch aracte ristics. with respect to any e x amples o r hi nts given he rein, any typical values stated herei n and/o r any informati on reg a rding the appl i c atio n of the device, infineon te chn o logie s here b y disclai m s any and a ll warrantie s and liabilitie s of any kind, inclu d ing without limitation, warra n ties of non-i n frin gem ent of intellect ual prop erty rights of any t h ird pa rty. information for furth e r inf o rmatio n on tech nolo g y, delivery terms and conditio n s and p r ices, plea se conta c t the nearest in fineon te chn o logie s office ( ww w.infine o n.com ). warning s due to techni cal re qui reme nts, com pone nts may co ntain dan gerou s su bsta nces. for inform ation on the types i n que stion, pl ease co ntact t he nearest in fineon te chn o logie s office . infineon tech nolo gie s compo nent s may be use d in life-su ppo rt device s or sy stem s only wi th the express written ap pro v al of infineon tech nolo g i e s, if a failure of such com pone nts can reasona bly be expecte d to cause the failu re of that life-sup port device or s y s t em or to affec t the s a fety or effectivene ss of that device or system. li fe supp ort de vices o r sy ste m s are intend ed to be implanted in t he huma n bo dy or to supp ort and/o r ma intain and su stain an d/or p r otect h u man life. if they fail, it is rea s o nabl e to assume th at the health of the use r or other pe rson s may be enda nge red.
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