xemod reserves the right to make changes to this specification without further notice. before the product described here is written into specifications or used in critical applications, the performance characteristics should be verified by contacting xemod. xemod quikpac data www.xemod.com rev. b (05 - 16 - 01) page 1 of 2 qpp - 007 qpp - 007 35w, 869 - 894mhz quikpac module data class ab driver stage general description: the qpp - 007 quikpac? rf power module is an impedance matched class ab amplifier stage designed for use in the driver stage of linear rf power amplifiers for cellul ar base stations. the power transistor is fabricated using xemod?s advanced design ldmos process. the gate terminal is connected directly to the control voltage pin, allowing direct control of the bias. the user must supply the proper value of v gs to set t he desired quiescent current. features: single polarity operation matched for 50 w rf interfaces xemos fet technology stable performance quikpac system compatible quikclip or flange mounting standard operating conditions parameter symbol min nom max units frequency range f 869 894 mhz supply (drain) voltage v d 26.0 28.0 32.0 vd c bias (gate) voltage v g 3.0 3.5 5.0 vdc bias (gate) current, average i g 1.0 ma rf source & load impedance w 50 ohms load impedance for stable operation (all phases) vswr 10:1 operating baseplate temperature t op - 20 +90 oc output devic e thermal resistance, channel to baseplate q jc 1.9 oc/w maximum ratings parameter symbol value units supply (drain) voltage v dd 35 vdc control (gate) voltage, v dd = 0 vdc v g 15 vdc input rf power p in 2.5 w load impedance for continuous operation without damage vswr 3:1 output device channel temperature 200 oc lead soldering temperature +190 oc storage temperature t stg - 65 to +150 oc performance at 28vdc & 25oc parameter symbol min nom max units supply (drain) voltage v d1,2 27.5 28.0 2 8.5 vdc quiescent current (total) (1) i dq 270 300 330 ma power output at 1 db compression (single tone) p - 1 35 40 w gain at 7w pep (two tone) g 14.5 15.5 db gain variation over frequency at 7w output (two tone) d g 0.2 0.5 db input return loss (50 w ref) at 7w pep (two tone) irl 12.0 15.0 db drain efficiency at 35w p out (single tone) h 40 45 % drain efficiency at 35w pep (two tone) h 33 36 % 3 rd order imd product (2 tone at 35w pep;1 mhz spacing) - 30 - 27 dbc
xemod quikpac data www.xemod.com rev. b (05 - 16 - 01) page 2 of 2 qpp - 007 performance at 28vdc & 25oc (continued) parameter symbol min nom max units imd variation ? 100 khz to 25 mhz tone spacing 1.0 2.0 db 2 nd harmonic at 35w p out (single tone) - 40 dbc 3 rd harmonic at 35w p out (single tone) - 45 dbc gro up (signal) delay t d 3.5 ns transmission phase flatness 0.5 degrees cdma acpr at 7w pavg - 46 db cdma acpr at 3.5w pavg - 49 db drain efficiency at 7w cdma h 20 22 % drain efficiency at 3.5w cdma h 14 15 % notes: this quikpac module requires an ext ernally supplied gate voltage (v gs ) on the gate lead (pin 3) to set the operating point (quiescent current - i dq ) of the power transistor. v gs may be safely set to any voltage in the range listed in the table. this permits a wide range of quiescent current to be used. since the operating characteristics of the module will vary as i dq changes, the bias setting will depend on the application. the data provided in the performance section of this data sheet was obtained with i dq set to a value within the range l isted (a nominal value 10%) . this particular value was chosen to optimize gain, imd performance, and efficiency simultaneously. gate voltage must be applied coincident with or after application of the drain voltage to prevent potentially destructive osci llations. bias voltages should never be applied to a module unless it is terminated on both input and output. the v gs corresponding to a specific i dq will vary from module to module . this is due to the normal die - to - die variation in threshold voltage of ld mos transistors. since the gate bias of an ldmos transistor changes with device temperature, it may be necessary to use a v gs supply with thermal compensation if operation over a wide temperature range is required. internal rf decoupling is included on all bias leads. no additional bypass elements are required, however some applications may require energy storage on the drain leads to accommodate time - varying waveforms. the rf leads are internally protected against dc voltages up to 100v. care should be tak en to avoid video transients that may damage the active devices. package styles this model is available in both a (h10535) and af (h10890) package styles. style af is shown for reference. please see the applicable outline drawing for specific dimensions.
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