? semiconductor components industries, llc, 2014 august, 2014 ? rev. 5 1 publication order number: NTD5805N/d NTD5805N, nvd5805n power mosfet 40 v, 51 a, single n?channel, dpak features ? low r ds(on) ? high current capability ? avalanche energy specified ? nvd prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable ? these devices are pb?free and are rohs compliant applications ? led backlight driver ? ccfl backlight ? dc motor control ? power supply secondary side synchronous rectification maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 40 v gate?to?source voltage ? continuous v gs 20 v gate?to?source v oltage ? non?repetitive (t p < 10 s) v gs 30 v continuous drain current (r jc ) (note 1) steady state t c = 25 c i d 51 a t c = 100 c 36 power dissipation (r jc ) (note 1) t c = 25 c p d 47 w pulsed drain current t p = 10 s i dm 85 a operating junction and storage temperature t j , t stg ?55 to 175 c source current (body diode) i s 30 a single pulse drain?to?source avalanche energy (v dd = 50 v, v gs = 10 v, r g = 25 , i l(pk) = 40 a, l = 0.1 mh, v ds = 40 v) e as 80 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. thermal resistance maximum ratings parameter symbol value unit junction?to?case (drain) r jc 3.2 c/w junction?to?ambient ? steady state (note 1) r ja 107 1. surface?mounted on fr4 board using the minimum recommended pad size. dpak case 369c (surface mount) style 2 marking diagram & pin assignment 40 v 16 m @ 5.0 v r ds(on) max i d max v (br)dss 9.5 m @ 10 v http://onsemi.com 1 2 3 4 see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information 1 gate 2 drain 3 source 4 drain ayww 58 05ng a = assembly location* y = year ww = work week 5805n = device code g = pb?free package 51 a g s n?channel d * the assembly location code (a) is front side optional. in cases where the assembly location is stamped in the package, the front side assembly code may be blank.
NTD5805N, nvd5805n http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 40 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 40.8 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 40 v t j = 25 c 1.0 a t j = 150 c 100 gate?to?source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.5 3.5 v negative threshold temperature coefficient v gs(th) /t j 7.04 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v, i d = 15 a 7.6 9.5 m v gs = 5.0 v, i d = 10 a 10.9 16 forward transconductance gfs v ds = 15 v, i d = 15 a 8.54 s charges, capacitances and gate resistances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 1725 pf output capacitance c oss 220 reverse transfer capacitance c rss 160 total gate charge q g(tot) v gs = 10 v, v ds = 32 v, i d = 30 a 33 80 nc threshold gate charge q g(th) 2.0 gate?to?source charge q gs 7.2 gate?to?drain charge q gd 9.8 switching characteristics (note 3) turn?on delay time t d(on) v gs = 10 v, v dd = 32 v, i d = 30 a, r g = 2.5 10.2 ns rise time t r 17.9 turn?off delay time t d(off) 22.9 fall time t f 4.5 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 10 a t j = 25 c 0.83 1.2 v t j = 150 c 0.65 reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/ s, i s = 30 a 24.8 ns charge time ta 14.6 discharge time tb 10.2 reverse recovery charge q rr 15.5 nc product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures.
NTD5805N, nvd5805n http://onsemi.com 3 typical performance characteristics 5.0 v figure 1. on?region characteristics figure 2. transfer characteristics v ds , drain?to?source voltage (v) v gs , gate?to?source voltage (v) 3 2.5 2 1.5 1 0.5 0 0 10 20 30 50 70 80 90 6 5 4 3 2 0 50 75 figure 3. on?resistance vs. drain current figure 4. on?resistance vs. drain current and gate voltage v gs , gate?to?source voltage (v) i d , drain current (a) 10 8 7 6 5 0.007 0.009 0.011 0.013 0.015 0.017 45 35 30 25 15 10 50 0 0.03 0.04 0.05 figure 5. on?resistance variation with temperature figure 6. drain?to?source leakage current vs. voltage t j , junction temperature ( c) v ds , drain?to?source voltage (v) 100 75 50 25 0 ?25 ?50 0.7 0.8 0.9 1.2 1.3 1.4 1.6 1.8 42 32 22 12 2 10 1000 10,000 i d , drain current (a) i d , drain current (a) r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance (normalized) i dss , leakage (na) 40 10 v 4.5 v v gs = 7 v ? 5.5 v 5.2 v 4.0 v 3.5 v t j = 25 c 25 100 v ds 10 v t j = 25 c t j = ?55 c t j = 100 c i d = 30 a t j = 25 c r ds(on) , drain?to?source resistance ( ) 0.02 0.01 v gs = 5 v t j = 25 c v gs = 10 v 125 150 175 1.0 1.1 1.5 1.7 v gs = 10 v i d = 51 a t j = 100 c t j = 150 c v gs = 0 v 60 20 40 100 0.019 0.021 49 1.9 100
NTD5805N, nvd5805n http://onsemi.com 4 typical performance characteristics q gs figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage vs. total charge gate?to?source or drain?to?source voltage (v) q g , total gate charge (nc) 40 35 15 10 5 0 5 10 0 1000 2000 3000 0 0 5 10 15 20 figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance ( ) v sd , source?to?drain voltage (v) 100 10 1 1 10 1000 0.7 0.5 1 .0 0.8 0.6 0.4 0 10 30 20 c, capacitance (pf) v gs , gate?to?source voltage (v) t, time (ns) i s , source current (a) 30 20 25 t j = 25 c v gs = 0 v c iss c oss c rss 10 40 v ds , drain?to?source voltage (v) 0 10 20 30 40 t j = 25 c i d = 30 a v gs v ds qt q gd v dd = 32 v i d = 30 a v gs = 10 v t d(off) t d(on) t r t j = 25 c v gs = 0 v t f vds vgs 20 30 100 0.9 figure 11. maximum rated forward biased safe operating area v ds , drain?to?source voltage (v) i d , drain current (a) 0.1 10 100 1000 0.1 10 100 10 s 100 s 1 ms 10 ms dc v gs = 10 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 1 1
NTD5805N, nvd5805n http://onsemi.com 5 typical performance characteristics 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 t, pulse time (s) figure 12. thermal response r(t), effective transient thermal resistance ( c/w) d = 0.5 0.2 0.1 0.05 0.02 0.01 single pulse ordering information order number package shipping ? NTD5805Nt4g dpak (pb?free) 2500 / tape & reel nvd5805nt4g* dpak (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *nvd prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable.
NTD5805N, nvd5805n http://onsemi.com 6 package dimensions dpak (single gauge) case 369c issue e b d e b3 l3 l4 b2 m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.028 0.045 0.72 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 7. optional mold feature. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.114 ref 2.90 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw e bottom view z bottom view side view top view alternate construction note 7 style 2: pin 1. gate 2. drain 3. source 4. drain on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemni fy and hold scillc and its officers, em ployees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NTD5805N/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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