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this is information on a product in full production. december 2016 docid028908 rev 3 1/25 STGIPQ8C60T-HZ sllimm? nano - 2 nd series ipm, 3-phase inverter, 8 a, 600 v short-circuit rugged igbts datasheet - production data features ? ipm 8 a, 600 v 3-phase igbt inverter bridge including 3 control ics for gates driving and freewheeling diodes ? 3.3 v, 5 v and 15 v ttl/cmos inputs comparators with hysteresis and pull down/pull up resistors ? internal bootstrap diode ? optimized for low electromagnetic interference ? undervoltage lockout ? short-circuit rugged tfs igbts ? smart shutdown function ? interlocking function ? op-amp for advanced current sensing ? comparator for fault protection against overcurrent ? ntc (ul 1434 ca 2 and 4) ? isolation rating of 1500 vrms/min applications ? 3-phase inverters for motor drives ? home appliances such as dishwashers, refrigerator compressors, heating systems, air- conditioning fans, draining and recirculation pumps description this second series of sllimm (small low-loss intelligent molded module) nano provides a compact, high performance ac motor drive in a simple, rugged design. it is composed of six improved short-circuit rugged trench gate field- stop igbts with freewheeling diodes and three half-bridge hvics for gate driving, providing low electromagnetic interference (emi) characteristics with optimized switching speed. the package is designed to allow a better and easy screw on heatsink, it is optimized for thermal performance and compactness in built-in motor applications, or other low power applications where assembly space is limited. this ipm includes an operational amplifier, completely uncommitted, and a comparator that can be used to design a fast and efficient protection circuit. sllimm? is a trademark of stmicroelectronics. n2dip-26l type z table 1. device summary order code marking package packaging STGIPQ8C60T-HZ gipq8c60t-hz n2dip-26l tube www.st.com
contents STGIPQ8C60T-HZ 2/25 docid028908 rev 3 contents 1 internal schematic and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 inverter part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2.1 ntc thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.3 waveform definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 application circuit example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8.1 n2dip-26l type z package information . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
docid028908 rev 3 3/25 STGIPQ8C60T-HZ internal schematic and pin description 25 1 internal schematic and pin description figure 1. internal schematic diagram and pin configuration 23 9ff: +,1: 7 6'2' +,19 9ff9 +,18 9ff8 /,1: /,18 92879 :287: 82878 3 1: 23287 7 6'2' *1' &,1 23 /,19 19 18 9errw8 9errw9 9errw: 17& *1' 23287 /,1 9&& +9* 23 23 6'2' 287 /9* 9errw +,1 *1' /,1 9&& +9* &,1 6'2' 287 /9* 9errw +,1 *1' /,1 9&& +9* 6'2' 287 /9* 9errw +,1
internal schematic and pin description STGIPQ8C60T-HZ 4/25 docid028908 rev 3 table 2. pin description pin symbol description 1 gnd ground 2 t/sd /od ntc thermistor terminal / shutdown logic input (active low) / open-drain (comparator output) 3v cc w low voltage power supply w phase 4 hin w high-side logic input for w phase 5 lin w low-side logic input for w phase 6 op+ op-amp non inverting input 7 opout op-amp output 8 op- op-amp inverting input 9v cc v low voltage power supply v phase 10 hin v high-side logic input for v phase 11 lin v low-side logic input for v phase 12 cin comparator input 13 v cc u low voltage power supply v phase 14 hin u high-side logic input for v phase 15 t/sd /od ntc thermistor terminal / shutdown logic input (active low) / open-drain (comparator output) 16 lin u low-side logic input for u phase 17 v boot u bootstrap voltage for u phase 18 p positive dc input 19 u,out u u phase output 20 n u negative dc input for u phase 21 v boot v bootstrap voltage for v phase 22 v,out v v phase output 23 n v negative dc input for v phase 24 v boot w bootstrap voltage for w phase 25 w,out w w phase output 26 n w negative dc input for w phase
docid028908 rev 3 5/25 STGIPQ8C60T-HZ absolute maximum ratings 25 2 absolute maximum ratings (t j = 25c unless otherwise noted). table 3. inverter parts symbol parameter value unit v ces collector-emitter voltage each igbt (v in (1) = 0 v) 1. applied between hinx, linx and gnd for x = u, v, w. 600 v i c continuous collector current each igbt 8 a i cp (2) 2. pulsed width limited by max junction temperature. peak collector current each igbt (less than 1ms) 16 a p tot total dissipation at t c =25 c each igbt 19.2 w t scw short-circuit withstand time (v ce = 300 v, t j = 125 c, v cc = v boot = 15 v, v in (1) = 0 to 5 v) 5s table 4. control parts symbol parameter min max unit v cc low voltage power supply -0.3 21 v v boot bootstrap voltage -0.3 620 v v out output voltage between out u , out v , out w and gnd v boot - 21 v boot + 0.3 v v cin comparator input voltage -0.3 v cc + 0.3 v v op+ op-amp non-inverting input -0.3 v cc + 0.3 v v op- op-amp inverting input -0.3 v cc + 0.3 v v in logic input voltage applied between hinx, linx and gnd -0.3 15 v v t/sd /od open drain voltage -0.3 15 v ? v out/dt allowed output slew rate 50 v/ns table 5. total system symbol parameter value unit v iso isolation withstand voltage applied between each pin and heat sink plate (ac voltage, t = 60sec.) 1500 vrms t j power chips operating junction temperature -40 to 150 c t c module case operation temperature -40 to 125 c
absolute maximum ratings STGIPQ8C60T-HZ 6/25 docid028908 rev 3 2.1 thermal data table 6. thermal data symbol parameter value unit r th(j-c) thermal resistance junction-case single igbt 6.5 c/w thermal resistance junction-case single diode 10
docid028908 rev 3 7/25 STGIPQ8C60T-HZ electrical characteristics 25 3 electrical characteristics (t j = 25c unless otherwise noted). 3.1 inverter part table 7. static symbol parameter test condition min typ max unit i ces collector-cut off current (v in (1) = 0 logic state) 1. applied between hinx, linx and gnd for x = u, v, w v ce = 550 v, v cc = v boot = 15 v - 250 a v ce(sat) collector-emitter saturation voltage v cc = v boot = 15 v, v in (1) = 0 to 5 v, i c = 8 a -2.02.4 v v f diode forward voltage v in (1) = 0 logic state, i c = 8 a - 2.4 v table 8. inductive load switching time and energy symbol parameter test condition min typ max unit t on (1) 1. t on and t off include the propagation delay time of the internal drive. t c(on) and t c(off) are the switching time of igbt itself under the internally given gate driving condition. turn-on time v dd = 300 v, v cc = v boot = 15 v, v in (2) = 0 to 5 v, i c = 8 a (see figure 3 ) 2. applied between hinx, linx and gnd for x = u, v, w -290 - ns t con (1) cross-over time on - 145 - t off (1) turn-off time - 515 - t coff (1) cross-over time off - 90 - t rr reverse recovery time -110- e on turn-on switching energy -200 - j e off turn-off switching energy -95-
electrical characteristics STGIPQ8C60T-HZ 8/25 docid028908 rev 3 figure 2. switching time test circuit figure 3. switching time definition 9 &( , & , & 9 ,1 w 21 w &21 9 ,121 , & , & 9 &( dwxuqrq ewxuqrii w uu , & , & 9 ,1 9 &( w 2)) w &2)) 9 ,12)) 9 &( , & $09
docid028908 rev 3 9/25 STGIPQ8C60T-HZ electrical characteristics 25 3.2 control part (v cc =15 v unless otherwise specified) table 9. low voltage power supply symbol parameter test condition min typ max unit v cc_hys v cc uv hysteresis 1.2 1.5 1.8 v v cch_th(on) v cch uv turn-on threshold 11.5 12 12.5 v v cch_th(off) v cch uv turn-off threshold 10 10.5 11 v i qccu under voltage quiescent supply current v cc =10v; v t/sd /od =5v; l in =h in =c in =0 150 a i qcc quiescent current v cc =10 v; v t/sd /od =5v; l in =h in =c in =0 1ma v ref internal comparator (c in ) reference voltage 0.51 0.54 0.56 v table 10. bootstrapped voltage symbol parameter test condition min typ max unit v bs_hys v bs uv hysteresis 1.2 1.5 1.8 v v bs_th(on) v bs uv turn-on threshold 11.1 11.5 12.1 v v bs_th(off) v bs uv turn-off threshold 9.8 10 10.6 v i qbsu undervoltage v bs quiescent current v bs <9v v t/sd /od =5v; l in =0v;h in =5v;c in =0f; 70 110 a i qbs v bs quiescent current v bs =15v v t/sd /od =5v; l in =0v;h in =5v;c in =0f; 150 210 a r ds(on) bootstrap driver on resistance lvg on 120 ?
electrical characteristics STGIPQ8C60T-HZ 10/25 docid028908 rev 3 table 11. logic inputs symbol parameter test condition min typ max unit v il low logic level voltage 0.8 v v ih high logic level voltage 2.25 v i hinh hin logic ?1? input bias hin=15v 20 40 100 a i hinl hin logic ?0? input bias current hin=0v 1 a i linh lin logic ?1? input bias current lin=15v 20 40 100 a i linl lin logic ?0? input bias current lin=0v 1 a i sdh sd logic ?0? input bias current sd =15v 220 295 370 a i sdl sd logic ?1? input bias current sd =0v 3 a dt dead time see figure 8 180 ns table 12. op-amp characteristics symbol parameter test condition min typ max unit v io input offset voltage v ic =0v, v o =7.5v 6 mv i io input offset current v ic =0v, v o =7.5v 4 40 na i ib input bias current (1) v ic =0v, v o =7.5v 100 200 na v ol low level output voltage range r l =10 k to v cc 75 150 mv v oh high level output voltage range r l =10 k to gnd 14 14.7 v i o output short-circuit current source v id =+1v, v o =0v 16 30 ma sink v id =-1v, v o = v cc 50 80 ma sr slew rate v i =1-4v; c l =100pf; unity gain 2.5 3.8 v/s gbwp gain bandwidth product v o =7.5v 8 12 mhz a vd large signal voltage gain r l =2 k 70 85 db
docid028908 rev 3 11/25 STGIPQ8C60T-HZ electrical characteristics 25 svr supply voltage rejection ratio vs. v cc 60 75 db cmrr common mode rejection ratio 55 70 db 1. the direction of the input current is out of the ic. table 13. sense comparator characteristics symbol parameter test condition min typ max unit i ib input bias current v cin =1v - 3 a v od open drain low level output voltage i od =3ma - 0.5 v r on_od open drain low level output resistance i od =3ma - 166 ? r pd_sd sd pull down resistor (1) 1. equivalent value as a result of the resistances of three drivers in parallel 125 k ? t d_comp comparator delay v t/sd /od pulled to 5v through 100 k resistor -90130ns sr slew rate c l =180pf; r pu =5 k -60 v/s t sd shutdown to high/low side driver propagation delay v out =0v, v boot = v cc , v in =0 to 3.3v 50 125 200 ns t isd comparator triggering to high/low side driver turn-off propagation delay measured applying a voltage step from 0v to 3.3v to pin of c in 50 200 250 ns table 14. truth table condition logic input (v l )output t/sd /od lin hin lvg hvg shutdown enable half-bridge tri-state l x (1) 1. x = don?t care x (1) ll interlocking half-bridge tri-state h h h l l 0 ?logic state? half-bridge tri-state hllll 1 ?logic state? low side direct driving hhlhl 1 ?logic state? high side direct driving hlhlh table 12. op-amp characteristics (continued) symbol parameter test condition min typ max unit
electrical characteristics STGIPQ8C60T-HZ 12/25 docid028908 rev 3 3.2.1 ntc thermistor figure 4. internal structure of sd and ntc (a) figure 5. equivalent resistance (ntc//r pd _ sd ) a. rpd_sd: equivalent value as result of resistances of three drivers in parallel. 76'2 ' 9 9eldv 53'b6' 17& /,1 +,1 9&& *1' &,1 /9* 287 +9* 9errw 6'2' 56' &6' (txlydohqw5hvlvwdqfhn 7hpshudwxuh?&
docid028908 rev 3 13/25 STGIPQ8C60T-HZ electrical characteristics 25 figure 6. equivalent resistance (ntc//r pd _ sd ) zoom figure 7. voltage of t/sd /od pin according to ntc temperature (txlydohqw5hvlvwdqfhn 7hpshudwxuh?& 9 6' 9 7hpshudwxuh?& 9 %ldv 9 5 6' n 6'2'kljk 9 %ldv 9 5 6' n
electrical characteristics STGIPQ8C60T-HZ 14/25 docid028908 rev 3 3.3 waveform definitions figure 8. dead time and interlocking waveform definitions ).4%2, /#+).' ).4%2, /#+).' ).4%2, /#+).' ).4%2, /#+).' '
docid028908 rev 3 15/25 STGIPQ8C60T-HZ smart shutdown function 25 4 smart shutdown function the device integrates a comparator for fault sensing purposes. the comparator has an internal voltage reference v ref connected to the inverting input, while the non-inverting input on pin (cin) can be connected to an external shunt resistor for simple overcurrent protection. when the comparator triggers, the device is set to the shutdown state and both its outputs are switched to the low-level setting, causing the half bridge to enter a tri-state. in common overcurrent protection architectures, the comparator output is usually connected to the shutdown input through an rc network that provides a mono-stable circuit which implements a protection time following a fault condition. our smart shutdown architecture immediately turns off the output gate driver in case of overcurrent along a preferential path for the fault signal which directly switches off the outputs. the time delay between the fault and output shutdown no longer depends on the rc values of the external network connected to the shutdown pin. at the same time, the dmos connected to the open-drain output (pin t/sd /od) is turned on by the internal logic, which holds it on until the shutdown voltage is lower than the logic input lower threshold (vil). also, the smart shutdown function allows increasing the real disable time without increasing the constant time of the external rc network. an ntc thermistor for temperature monitoring is internally connected in parallel to the sd pin. to avoid undesired shutdown, keep the voltage v t/sd /od higher than the high-level logic threshold by setting the pull-up resistor r sd to 1 k ? or 2.2 k ? for the 3.3 v or 5 v mcu power supplies, respectively.
smart shutdown function STGIPQ8C60T-HZ 16/25 docid028908 rev 3 figure 9. smart shutdown timing waveforms in case of overcurrent event 6+87'2:1&,5&8,7 $qdssur[lpdwlrqriwkhglvdeohwlphlvjlyhqe\ +,1/,1 +9*/9* rshqgudlqjdwh lqwhuqdo frps9uhi &3 3527(&7,21 )dvwvkxwgrzq wkhgulyhurxwsxwvduhvhwwrwkh6'vwdwhdvvrrqdvwkhfrpsd udwru wuljjhuvhyhqliwkh6'vljqdokdvq?wuhdfkhgwkhorzhulqsxww kuhvkrog glvdeohwlph 6'2' *,3*)65 76' 2' 9 60$ 57 6' /2*,& 76'2' 53'b6' &6' 56' 9eldv 17& 521b2'
docid028908 rev 3 17/25 STGIPQ8C60T-HZ application circuit example 25 5 application circuit example figure 10. application circuit example (b) b. application designers are free to use a different schem e according with the specifications of the device. 23 9ff: +,1: 76'2' +,19 9ff9 +,18 9ff8 /,1: /,18 92879 :287: 82878 3 1: 23287 76'2' *1' &,1 23 /,19 19 18 9errw8 9errw9 9errw: 56 56 $'& 56 0 3:5b*1 ' 6*1b*1 ' 9& & & yf f & '= '= & 5 56' & 0,&52&21752//( 5 7h p s 0rqlwrulqj +,18 /,18 /,19 +,19 /,1: +,1: 6' $'& *1' /,1 9&& /9* 6'2' 287 +9* 9errw +,1 & & &errw8 5vkxqw 5 5 &6' 5 99 & 5 5 & &ygf *1' /,1 9&& /9* &,1 6'2' 287 +9* 9errw +,1 9'& 56) 99 &23 5 5 *1' 23287 /,1 9&& /9* 23 23 6'2' 287 +9* 9errw +,1 5 &errw9 17& 5 & &6) &errw: & & & '= 5 '= *$')65
guidelines STGIPQ8C60T-HZ 18/25 docid028908 rev 3 6 guidelines ? input signals hin, lin are active-high logic. a 375 k ? (typ.) pull-down resistor is built-in for each input. to prevent input signal oscillation, the wiring of each input should be as short as possible and the use of rc filters (r1, c1) on each input signal is suggested. the filters should be done with a time constant of about 100 ns and placed as close as possible to the ipm input pins. ? the use of a bypass capacitor c vcc (aluminum or tantalum) can help to reduce the transient circuit demand on the power supply. also, to reduce high frequency switching noise distributed on the power lines, placing a decoupling capacitor c2 (100 to 220 nf, with low esr and low esl) as close as possible to vcc pin and in parallel whit the bypass capacitor is suggested. ? the use of rc filter (rsf, csf) for preventing protection circuit malfunction is recommended. the time constant (rsf x csf) should be set to 1 s and the filter must be placed as close as possible to the cin pin. ? the sd is an input/output pin (open drain type if used as output). a built-in thermistor ntc is internally connected between the sd pin and gnd. the voltage v sd -gnd decreases as the temperature increases, due to the pull-up resistor r sd . in order to keep the voltage always higher than the high level logic threshold, the pull-up resistor is suggested to be set at 1 k ? or 2.2 k ? for 3.3 v or 5 v mcu power supply, respectively. the c sd capacitor of the filter on sd should be fixed no higher than 3.3 nf in order to assure a sd activation time 1 <= 500 ns, in addition the filter should be placed as close as possible to the sd pin. ? the decoupling capacitor c 3 (from 100 to 220 nf , ceramic with low esr and low esl), in parallel with each c boot , is useful to filter high frequency disturbance. both c boot and c3 (if present) should be placed as close as possible to the u, v, w and v boot pins. bootstrap negative electrodes should be co nnected to u, v, w terminals directly and separated from the main output wires. ? to prevent the overvoltage on vcc pin, a zener diode (dz1) can be used. similarly on the v boot pin, a zener diode (dz2) can be placed in parallel with each c boot . ? the use of the decoupling capacitor c4 (100 to 220 nf, with low esr and low esl) in parallel with the electrolytic capacitor c vdc is useful to prevent surge destruction. both capacitors c4 and c vdc should be placed as close as possible to the ipm (c4 has priority over c vdc ). ? by integrating an application-specific type hvic inside the module, direct coupling to the mcu terminals without an opto-coupler is possible. ? use low inductance shunt resistors for phase leg current sensing. ? in order to avoid malfunctions, the wiring between n pins, the shunt resistor and pwr_gnd should be as short as possible. ? the connection of sgn_gnd to pwr_gnd at only one point (close to the shunt resistor terminal) can help to reduce the impact of power ground fluctuation. note: these guidelines are useful for application design to ensure the specifications of the device. for further details, please refer to the relevant application note.
docid028908 rev 3 19/25 STGIPQ8C60T-HZ guidelines 25 table 15. recommended operating conditions symbol parameter test condition min. typ. max. unit v pn supply voltage applied between p- n u ,n v ,n w 300 500 v v cc control supply voltage applied between v cc -gnd 13.5 15 18 v v bs high side bias voltage applied between v bootx - out for x=u,v,w 13 18 v t dead blanking time to prevent arm- short for each input signal 1 s f pwm pwm input signal -40c electrical characteristics (curves) STGIPQ8C60T-HZ 20/25 docid028908 rev 3 7 electrical characteristics (curves) figure 11. output characteristics (t j = 25 c) figure 12. v ce(sat) vs. collector current ,*%72& , & $ 9 &( 9 9 *( 9 ,*%79&(& 9 &(6$7 9 , & $ 9 && 9 7 - ?& 7 - ?& figure 13. diode vf vs forward current figure 14. eon switching energy vs collector current ,*%7'9) 9 ) 9 , ) $ 7 - ?& 7 - ?& ,*%76/& ( rq p- , & $ 9 '' 99 && 9 errw 9 7 - ?& 7 - ?&
docid028908 rev 3 21/25 STGIPQ8C60T-HZ electrical characteristics (curves) 25 figure 15. eoff switching energy vs collector current figure 16. thermal impedance ,*%76/& ( rii p- , & $ 9 '' 99 && 9 errw 9 7 - ?& 7 - ?& =wkmf1',3/,*%7 . w s v
package mechanical data STGIPQ8C60T-HZ 22/25 docid028908 rev 3 8 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 8.1 n2dip-26l type z package information figure 17. n2dip-26l type z package mechanical outline table 16. n2dip-26l type z mechanical dimensions (1) 1. all dimensions are expressed in millimeters. ref. dimensions ref. dimensions ref. dimensions min. typ. max. min. typ. max. min. typ. max. a 4.80 5.10 5.40 b 0.53 0.72 e 12.35 12.45 12.55 a1 0.80 1.00 1.20 b2 0.83 1.02 e 1.70 1.80 1.90 a2 4.00 4.10 4.20 c 0.46 0.59 e1 2.40 2.50 2.60 a3 1.70 1.80 1.90 d 32.05 32.15 32.25 eb1 16.10 16.40 16.70 a4 1.70 1.80 1.90 d1 2.10 eb2 21.18 21.48 21.78 a5 8.10 8.40 8.70 d2 1.85 l 0.85 1.05 1.25 a6 1.75 d3 30.65 30.75 30.85 dia 3.10 3.20 3.30 e h 3,1 3,1 $ / $ $ ' h% h% e h ' $ $ $ $ 3,1 3,1 ' ' ( ?gld 3,1 3,1 3,1 3,1 f bw\sh=buhy
docid028908 rev 3 23/25 STGIPQ8C60T-HZ packaging mechanical data 25 9 packaging mechanical data figure 18. n2dip-26l tube dimensions (c) c. all dimensions are expressed in millimeters. ? 6fdoh 6hfw$$ 1uxqlwvshuwxeh "/5*45"5*$ 417$ $ $ $ $ $ b>4 b > 4 b>4 b > 4 $ 3,1 3,1 3,1 $ $ ? 6fdoh 5 ? ? 1rwhv 0dwhuldoeodfn39&zlwkdqwlvwdwlfglsslqj(a(643 9& $ffhswdqfhvshflilfdwlrq$'&6dqg$'&6 *hqhudowrohudqfhxqohvvrwkhuzlvhvshflilhg?pp *hqhudoudgllxqohvvrwkhuzlvhvshflilhgpp 1jotupqqfs
revision history STGIPQ8C60T-HZ 24/25 docid028908 rev 3 10 revision history table 17. document revision history date revision changes 22-jan-2016 1 initial release. 26-jul-2016 2 document status promoted from target to preliminary data. updated features in cover page, section 3: electrical characteristics , section 3.2: control part , section 5: application circuit example and section 6: guidelines . added section 7: electrical characteristics (curves) . 16-dec-2016 3 document status promoted from preliminary to production data. updated figure 12: v ce(sat) vs. collector current .
docid028908 rev 3 25/25 STGIPQ8C60T-HZ 25 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics ? all rights reserved

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