preliminary i ntegrated c ircuits d ivision preliminary ds-cpc3982-r00d 1 cpc3982 n-channel depletion-mode vertical dmos fet v (br)dsx / v (br)dgx r ds(on) (max) i dss (min) package 800v 380 ? 20ma sot-23 applications features description ordering information circuit symbol ? constant current regulator ? ignition modules ? normally-on switches ? solid state relays ? converters ? telecommunications ? power supply ? high breakdown voltage: 800v ? low v gs(off) voltage: -1.4v to -3.1v ? depletion mode device offers low r ds(on) at cold temperatures ? high input impedance ? small package size: sot-23 the cpc3982 is an n-channel, depletion mode, field effect transistor (fet) that utilizes ixys integrated circuits division?s proprietary third-generation vertical dmos process. the third-generation process realizes world class, high voltage mosfet performance in an economical silicon gate process. our vertical dmos process yields a robust device, with high input impedance, for use in high-power applications. the cpc3982 is a highly reliable device that has been used extensively in our solid state relays for industrial and telecommunications applications. this device excels in power applications that require low drain-source resistance, particularly in cold environments such as automotive ignition modules. the cpc3982 has a minimum breakdown voltage of 800v, and is available in an sot-23 package. as with all mos devices, the fet structure prevents thermal runaway and thermal-induced secondary breakdown. package pinout s g d part # description CPC3982TTR n-channel depletion mode fet, sot-23 pkg. tape and reel (3000/reel) (sot-23) 1 2 3 s g d
preliminary i ntegrated c ircuits d ivision preliminary 2 r00d cpc3982 absolute maximum ratings are stress ratings. stresses in excess of these ratings can cause permanent damage to the device. functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. absolute maximum ratings @ 25oc (unless otherwise noted) electrical characteristics @ 25oc (unless otherwise noted) parameter ratings units drain-to-source voltage 800 v gate-to-source voltage 15 v pulsed drain current 150 ma total package dissipation 1 0.4 w junction temperature 125 o c operational temperature -55 to +110 o c storage temperature -55 to +125 o c 1 mounted on 1"x1" 2 oz. copper fr4 board. parameter symbol conditions min typ max units drain-to-source breakdown voltage bv dsx v gs = -5.5v, i d =100a 800 - - v gate-to-source off voltage v gs(off) v ds = 15v, i d =1 ? a -1.4 - -3.1 v change in v gs(off) with temperature dv gs(off) /dt v ds = 15v, i d =1 ? a - - 4.5 mv/ o c gate body leakage current i gss v gs =15v, v ds =0v - - 100 na drain-to-source leakage current i d(off) v gs = -5.5v, v ds =800v - - 1 a saturated drain-to-source current i dss v gs = 0v, v ds =15v 20 - - ma static drain-to-source on-state resistance r ds(on) v gs = 0v, i d =20ma, v ds =10v - - 380 ? change in r ds(on) with temperature dr ds(on) /dt - - 2.5 %/ o c forward transconductance g fs i d = 10ma, v ds = 10v 15 - - m ? input capacitance c iss v gs = -3.5v v ds = 25v f= 1mhz - 20 -pf common source output capacitance c oss 2.2 reverse transfer capacitance c rss 13 source-drain diode voltage drop v sd v gs = -5v, i sd =5ma - 0.6 1 v thermal resistance, junction to ambient ? ja - - 250 - oc/w
preliminary i ntegrated c ircuits d ivision cpc3982 preliminary 3 r00d *the performance data shown in the graphs above is typical of device performance. for guaranteed parameters not indicated in t he written speci? cations, please contact our application department. performance data @25oc (unless otherwise noted)* v gs (v) -2.5 -2.0 -1.5 -1.0 -0.5 i d (ma) 0 5 10 15 20 25 input admittance (v ds =10v) i d (ma) 0 5 10 15 20 g m (ms) 0 10 20 30 40 50 60 transconductance vs. drain current (v ds =10v) v ds (v) 024 681012 i d (ma) 0 5 10 15 20 25 30 output characteristics v gs = 0v v gs = -1v v gs = -1.2v v gs = -1.4v v gs = -1.6v i d (ma) 0 5 10 15 20 25 30 on-resistance ( : ) 240 260 280 300 320 340 360 on-resistance vs. drain current (v gs =0v) v ds (v) 0 5 10 15 20 25 30 capacitance (pf) 1 10 100 capacitance vs. drain-source voltage (v gs = -3.5v) c rss c iss c oss
preliminary i ntegrated c ircuits d ivision preliminary 4 r00d cpc3982 manufacturing information moisture sensitivity all plastic encapsulated semiconductor packages are susceptible to moisture ingression. ixys integrated circuits division classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, ipc/jedec j-std-020 , in force at the time of product evaluation. we test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. this product carries a moisture sensitivity level (msl) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard ipc/jedec j-std-033 . device moisture sensitivity level (msl) rating cpc3982t msl 1 esd sensitivity this product is esd sensitive , and should be handled according to the industry standard jesd-625 . reflow profile this product has a maximum body temperature and time rating as shown below. all other guidelines of j-std-020 must be observed. device maximum temperature x time cpc3982t 260oc for 30 seconds board wash ixys integrated circuits division recommends the use of no-clean flux formulations. however, board washing to remove flux residue is acceptable, and the use of a short drying bake may be necessary. chlorine-based or fluorine-based solvents or fluxes should not be used. cleaning methods that employ ultrasonic energy should not be used.
preliminary i ntegrated c ircuits d ivision ixys integrated circuits division makes no representations or warranties with respect to the accuracy or completeness of the co ntents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. neither circuit patent licenses nor indemnity a re expressed or implied. except as set forth in ixys integrated circuits division?s standard terms and conditions of sale, ixys integrated circuits division assumes no liability whatsoever, a nd disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infri ngement of any intellectual property right. the products described in this document are not designed, intended, authorized or warranted for use as components in systems in tended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of ixys integrated circuits division?s product may resul t in direct physical harm, injury, or death to a person or severe property or environmental damage. ixys integrated circuits division reserves the right to discontinue or make changes to its p roducts at any time without notice. specification: ds-cpc3982-r00d ?copyright 2015, ixys integrated circuits division all rights reserved. printed in usa. 4/10/2015 for additional information please visit our website at: www.ixysic.com 5 cpc3982 mechanical dimensions cpc3982t CPC3982TTR tape & reel dimensions mm (inches) notes: (unless otherwise specified) 1. all dimensions are in mm (inches). 2. reference jedec outline: to-236ab. 3. package outline dimensions inclusive of metal burrs. 4. package outline exclusive of mold flash. mold flash shall not exceed 0.127 (0.005). 5. package outline exclusive of lead finish plating. recommended pcb land pattern 2.300.20 (0.0900.008) 0.150.01 (0.0060.0004) 0.48 typ (0.019 typ) 2.920.12 (0.115 / 0.005) 0.990.10 (0.0390.004) 0.95 typ (0.037 typ) 1.300.10 (0.0510.004) 0.440.06 (0.0180.002) 0.050.05 (0.0020.002) 0.940.06 (0.0370.002) 1.90 typ (0.075 typ) gauge plane 0.25 typ (0.010 typ) 0o / 5o 1 2 3 0.95 (0.037) 2.20 (0.087) 0.95 (0.037) 0.65 (0.026) dimensions mm (inches) notes: 1. all dimensions are shown in mm (inches). 2. cumulative tolerance of 10 sprocket holes is 0.02 (0.008). 3. material: conductive polycarbonate. section a-a 1.09 ref (0.043 ref) embossment embossed carrier top cover tape thickness 0.102 max. (0.004 max.) 177.8 dia. (7.00 dia.) 2.770.10 (0.1090.004) 0.61 ref (0.024 ref) 1.220.10 (0.0480.004) 2.20 ref (0.087 ref) 1.750.10 (0.0690.004) 8.000.10 (0.3150.004) 2.000.05 (0.0790.002) 4.000.10 (0.1570.004) 4.000.10 (0.1570.004) 3.150.10 (0.1240.004) aa ? 1.00 +0.10 -0.00 ( ? 0.039 +0.004 - 0.000) ? 1.550.05 ( ? 0.0610.002)
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