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r10ds0207ej0100 rev.1.00 page 1 of 23 jun 09, 2014 data sheet r1ev58064bxxn series r1ev58064bxxr series 64k eeprom (8-kword 8-bit) ready/ busy function res function (r1ev58064bxxr) description renesas electronics? r1ev58064bxxn series and r1ev58064bx xr series are electrically erasable and programmable eeprom?s organized as 8192-word 8-bit. they have realized high speed, low power consumption and high reliability by employing advanced monos memory technolo gy and cmos process and circuitry technology. they also have a 64-byte page programming function to make their write operations faster. features ? single supply: 2.7 to 5.5 v ? access time: ? 100 ns (max) at 2.7 v v cc < 4.5 v ? 70 ns (max) at 4.5 v v cc 5.5 v ? power dissipation: ? active: 20 mw/mhz (typ) ? standby: 110 w (max) ? on-chip latches: address, data, ce , oe , we ? automatic byte write: 10 ms (max) ? automatic page write (64 bytes): 10 ms (max) ? ready/ busy ? data polling and toggle bit ? data protection circuit on power on/off ? conforms to jedec byte-wide standard ? reliable cmos with monos cell technology ? 10 5 or more erase /write cycles ? 10 or more years data retention ? software data protection ? write protection by res pin (only the r1ev58064bxxr series) ? temperature range: ? 40 to +85 c ? there are lead free products. r10ds0207ej0100 rev.1.00 jun 09, 2014
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 2 of 23 jun 09, 2014 ordering information orderable part name access time package shipping container quantity r1ev58064bdanbi#b0 100ns 600mil 28-pin plastic dip prdp0028ab-a (dp-28v) tube max.13 pcs/tube max. 325 pcs/inner box r1ev58064bdarbi#b0 100ns r1ev58064bscnbi#b0 100ns 400mil 28- pin plastic sop prsp0028dc-a (fp-28dv) tube max. 25 pcs/tube max. 1,000 pcs/inner box r1ev58064bscrbi#b0 100ns r1ev58064bscnbi#s0 100ns tape and reel 1,000 pcs/reel r1ev58064bscrbi#s0 100ns r1ev58064btcnbi#b0 100ns 28-pin plastic tsop ptsa0028zb-a (tfp-28dbv) tray max. 60 pcs/tray max. 600 pcs/inner box r1ev58064btcrbi#b0 100ns pin arrangement 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc we nc a8 a9 a11 oe a10 ce i/o7 i/o6 i/o5 i/o4 i/o3 rdy/busy a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o0 i/o1 i/o2 v ss (top view) r1ev58064bdan series r1ev58064bscn series 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc we res a8 a9 a11 oe a10 ce i/o7 i/o6 i/o5 i/o4 i/o3 rdy/busy a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o0 i/o1 i/o2 v ss (top view) r1ev58064bdar series r1ev58064bscr series 14 13 12 11 10 9 8 7 6 5 4 3 2 1 a2 a1 a0 i/o0 i/o1 i/o2 v ss i/o3 i/o4 i/o5 i/o6 i/o7 ce a10 a3 a4 a5 a6 a7 a12 rdy/bus y v cc we nc a8 a9 a11 oe (top view) r1ev58064btcn series 15 16 17 18 19 20 21 22 23 24 25 26 27 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 a2 a1 a0 i/o0 i/o1 i/o2 v ss i/o3 i/o4 i/o5 i/o6 i/o7 ce a10 a3 a4 a5 a6 a7 a12 rdy/bus y v cc we res a8 a9 a11 oe (top view) r1ev58064btcr series 15 16 17 18 19 20 21 22 23 24 25 26 27 28
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 3 of 23 jun 09, 2014 pin description pin name function a0 to a12 address input i/o0 to i/o7 data input/output oe output enable ce chip enable we write enable v cc power supply v ss ground rdy/ busy ready busy re s * 1 reset nc no connection note: 1. this function is supported by only the r1ev58064bxxr series. block diagram note: 1. this function is supported by only the r1ev58064bxxr series. v v oe ce a5 a0 a6 a12 we cc ss i/o0 i/o7 high voltage generator control logic and timing y decoder x decoder address buffer and latch i/o buffer and input latch y gating memory array data latch res rdy/bus y res * 1 * 1 to to to voltage detector
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 4 of 23 jun 09, 2014 operation table operation c e oe w e r es * 3 rdy/ b usy i/o read v il v il v ih v h * 1 high-z dout standby v ih * 2 high-z high-z write v il v ih v il v h high-z to v ol din deselect v il v ih v ih v h high-z high-z write inhibit v ih ? ? write inhibit v il ? ? dat a polling v il v il v ih v h v ol dout (i/o7) program reset v il high-z high-z notes: 1. refer to the recommended dc operating conditions. 2. : don?t care 3. this function supported by only the r1ev58064bxxr series. absolute maximum ratings parameter symbol value unit power supply voltage relative to v ss v cc ?0.6 to +7.0 v input voltage relative to v ss vin ?0.5 * 1 to +7.0 * 3 v operating temperature range * 2 topr ?40 to +85 c storage temperature range tstg ?55 to +125 c notes: 1. vin min : ?3.0 v for pulse width 50 ns. 2. including electrical characteristics and data retention. 3. should not exceed v cc + 1 v. recommended dc operating conditions parameter symbol min typ max unit supply voltage v cc 2.7 ? 5.5 v v ss 0 0 0 v input voltage v il ?0.3 * 1 ? 0.6 * 5 v v ih 2.4 * 2 ? v cc + 0.3 * 3 v v h * 4 v cc ? 0.5 ? v cc + 1.0 v operating temperature topr ?40 ? +85 c notes: 1. v il min: ?1.0 v for pulse width 50 ns. 2. v ih = 3.0 v for v cc = 3.6 to 5.5 v. 3. v ih max: v cc + 1.0 v for pulse width 50 ns. 4. this function is supported by only the r1ev58064bxxr series. 5. v il = 0.8 v for v cc = 3.6 v to 5.5 v
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 5 of 23 jun 09, 2014 dc characteristics (ta = ? 40 to +85 c, v cc = 2.7 to 5.5 v) parameter symbol min typ max unit test conditions input leakage current i li ? ? 2 * 1 av cc = 5.5 v, vin = 5.5 v output leakage current i lo ? ? 2 av cc = 5.5 v, vout = 5.5/0.4 v standby v cc current i cc1 ? 1 to 2 5 a c e = v cc i cc2 ? ? 1 ma c e = v ih operating v cc current i cc3 ? ? 6 ma iout = 0 ma, duty = 100%, cycle = 1 s at v cc = 3.6 v ? ? 10 ma iout = 0 ma, duty = 100%, cycle = 1 s at v cc = 5.5 v ? ? 15 ma iout = 0 ma, duty = 100%, cycle = 100 ns at v cc = 3.6 v ? ? 25 ma iout = 0 ma, duty = 100%, cycle = 70 ns at v cc = 5.5 v output low voltage v ol ? ? 0.4 v i ol = 2.1 ma output high voltage v oh v cc 0.8 ? ? v i oh = ? 400 a note: 1. i li on res : 100 a max (only the r1ev58064bxxr series) capacitance (ta = +25 c, f = 1 mhz) parameter symbol min typ max unit test conditions input capacitance cin* 1 ? ? 6 pf vin = 0 v output capacitance cout * 1 ? ? 12 pf vout = 0 v note: 1. this parameter is sampled and not 100% tested.
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 6 of 23 jun 09, 2014 ac characteristics ta = ? 40 to +85 c, v cc = 2.7 to 5.5 v test conditions ? input pulse levels : 0.4 v to 2.4 v (v cc = 2.7 to 3.6 v), 0.4 v to 3.0 v (v cc = 3.6 to 5.5 v) 0 v to v cc ( res pin* 2 ) ? input rise and fall time : 5 ns ? input timing reference levels : 0.8, 1.8 v ? output load : 1ttl gate +100 pf ? output reference levels : 1.5 v, 1.5 v read cycle 1 (2.7 v cc < 4.5 v) parameter symbol min max unit test conditions address to output delay t acc ? 100 ns c e = oe = v il , we = v ih ce to output delay t ce ? 100 ns o e = v il , we = v ih oe to output delay t oe 10 50 ns c e = v il , we = v ih address to output hold t oh 0 ? ns c e = oe = v il , we = v ih oe ( ce ) high to output float * 1 t df 0 40 ns c e = v il , we = v ih re s low to output float * 1, 2 t dfr 0 350 ns c e = oe = v il , we = v ih re s to output delay * 2 t rr 0 450 ns c e = oe = v il , we = v ih write cycle 1 (2.7 v cc < 4.5 v) parameter symbol min * 3 typ max unit test conditions address setup time t as 0 ? ? ns address hold time t ah 50 ? ? ns ce to write setup time ( we controlled) t cs 0 ? ? ns ce hold time ( we controlled) t ch 0 ? ? ns we to write setup time ( ce controlled) t ws 0 ? ? ns we hold time ( ce controlled) t wh 0 ? ? ns oe to write setup time t oes 0 ? ? ns oe hold time t oeh 0 ? ? ns data setup time t ds 50 ? ? ns data hold time t dh 0 ? ? ns we pulse width ( we controlled) t wp 200 ? ? ns ce pulse width ( ce controlled) t cw 200 ? ? ns data latch time t dl 100 ? ? ns byte load cycle t blc 0.3 ? 30 s byte load window t bl 100 ? ? s write cycle time t wc ? ? 10* 4 ms time to device busy t db 120 ? ? ns write start time t dw 0 * 5 ? ? ns reset protect time * 2 t rp 100 ? ? s reset high time * 2, 6 t res 1 ? ? s notes: 1. t df and t dfr are defined as the time at which the outpu ts achieve the open circuit conditions and are no longer driven. 2. this function is supported by only the r1ev58064bxxr series. 3. use this device in longer cycle than this value. 4. t wc must be longer than this value unless polling techniques or rdy/ busy are used. this device automatically completes the internal write operation within this value. 5. next read or write operat ion can be initiated after t dw if polling techniques or rdy/ busy are used. 6. this parameter is sampled and not 100% tested. 7. a6 through a12 are page addresses and these addresses are latched at the first falling edge of we . 8. a6 through a12 are page addresses and these addresses are latched at the first falling edge of ce . 9. see ac read characteristics.
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 7 of 23 jun 09, 2014 read cycle 2 (4.5 v cc 5.5 v) parameter symbol min max unit test conditions address to output delay t acc ? 70 ns c e = oe = v il , we = v ih ce to output delay t ce ? 70 ns o e = v il , we = v ih oe to output delay t oe 10 40 ns c e = v il , we = v ih address to output hold t oh 0 ? ns c e = oe = v il , we = v ih oe ( ce ) high to output float * 1 t df 0 30 ns c e = v il , we = v ih re s low to output float * 1, 2 t dfr 0 350 ns c e = oe = v il , we = v ih re s to output delay * 2 t rr 0 450 ns c e = oe = v il , we = v ih write cycle 2 (4.5 v cc 5.5 v) parameter symbol min * 3 typ max unit test conditions address setup time t as 0 ? ? ns address hold time t ah 50 ? ? ns ce to write setup time ( we controlled) t cs 0 ? ? ns ce hold time ( we controlled) t ch 0 ? ? ns we to write setup time ( ce controlled) t ws 0 ? ? ns we hold time ( ce controlled) t wh 0 ? ? ns oe to write setup time t oes 0 ? ? ns oe hold time t oeh 0 ? ? ns data setup time t ds 50 ? ? ns data hold time t dh 0 ? ? ns we pulse width ( we controlled) t wp 100 ? ? ns ce pulse width ( ce controlled) t cw 100 ? ? ns data latch time t dl 50 ? ? ns byte load cycle t blc 0.2 ? 30 s byte load window t bl 100 ? ? s write cycle time t wc ? ? 10* 4 ms time to device busy t db 120 ? ? ns write start time t dw 0 * 5 ? ? ns reset protect time * 2 t rp 100 ? ? s reset high time * 2, 6 t res 1 ? ? s notes: 1. t df and t dfr are defined as the time at which the outpu ts achieve the open circuit conditions and are no longer driven. 2. this function is supporte d by only the r1ev58064bxxr. 3. use this device in longer cycle than this value. 4. t wc must be longer than this value unless polling techniques or rdy/ busy are used. this device automatically completes the internal write operation within this value. 5. next read or write operat ion can be initiated after t dw if polling techniques or rdy/ busy are used. 6. this parameter is sampled and not 100% tested. 7. a6 through a12 are page address and these addr esses are latched at the first falling edge of we . 8. a6 through a12 are page address and these addr esses are latched at the first falling edge of ce . 9. see ac read characteristics.
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 8 of 23 jun 09, 2014 timing waveforms read timing waveform address ce oe we data out high data out valid t acc t ce t oe t oh t df t rr t dfr res * 2
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 9 of 23 jun 09, 2014 byte write timing waveform(1) ( we controlled) address ce we oe din rdy/busy t wc t ch t ah t cs t as t wp t oeh t bl t oes t ds t dh t db t rp res * 2 v cc t res high-z high-z t dw
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 10 of 23 jun 09, 2014 byte write timing waveform(2) ( ce controlled) address ce we oe din rdy/busy t wc t ah t ws t as t oeh t wh t oes t ds t dh t db t rp res * 2 v cc t cw t bl t dw t res high-z high-z
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 11 of 23 jun 09, 2014 page write timing waveform(1) ( we controlled) address a0 to a12 we ce oe din rdy/busy t as t ah t bl t wc t oeh t dh t db t oes t rp t res res * 2 v cc t ch t cs t wp t dl t blc t ds t dw high-z high-z *7
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 12 of 23 jun 09, 2014 page write timing waveform(2) ( ce controlled) address a0 to a12 we ce oe din rdy/busy t as t ah t bl t wc t oeh t dh t db t oes t rp t res res * 2 v cc t wh t ws t cw t dl t blc t ds t dw high-z high-z *8
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 13 of 23 jun 09, 2014 data polling timing waveform t ce t oeh t wc t dw t oes address ce we oe i/o7 t oe din x an an dout x dout x *9 *9 an
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 14 of 23 jun 09, 2014 toggle bit this device provide another function to determine the internal programming cycle. if the eeprom is set to read mode during the internal programming cycle, i/o6 will charge from ?1? to ?0? (toggling) for each read. when the internal programming cycle is finished, toggling of i/o6 will stop and the device can be accessible for next read or program. toggle bit waveform notes: 1. i/o6 beginning state is ?1?. 2. i/o6 ending state will vary. 3. see ac read characteristics. 4. any address location can be used, but the address must be fixed. we t oes oe ce dout i/o6 dout dout dout next mode t oe t ce t dw t wc t oeh *1 *2 *2 address *3 *3 *4 din
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 15 of 23 jun 09, 2014 software data protection timing waveform(1) (in protection mode) v ce we address data 1555 aa 0aaa 55 1555 a0 t blc t wc cc write address write data software data protection timing waveform(2) (in non-protection mode) v ce we address data t wc cc normal active mode 1555 aa 0aaa 55 1555 80 1555 aa 0aaa 55 1555 20
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 16 of 23 jun 09, 2014 functional description automatic page write page-mode write feature allows 1 to 64 bytes of data to be written into the eeprom in a single write cycle. following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner. each additional byte load cycle must be started within 30 s from the preceding falling edge of we or ce . when ce or we is kept high for 100 s after data input, the eeprom enters write mode automati cally and the input data are written into the eeprom. data polling data polling indicates the status that the eeprom is in a wr ite cycle or not. if eeprom is set to read mode during a write cycle, an inversion of the last byte of data outputs fr om i/o7 to indicate that the eeprom is performing a write operation. rdy/ busy signal rdy/ busy signal also allows status of th e eeprom to be determined. the rdy/ busy signal has high impedance except in write cycle and is lowered to v ol after the first write signal. at the end of a write cycle, the rdy/ busy signal changes state to high impedance. res signal (only the r1ev58064bxxr series) when res is low, the eeprom cannot be read or programmed. therefore, data can be protected by keeping res low when v cc is switched. res should be high during read and programmi ng because it doesn?t prov ide a latch function. v program inhibit cc res program inhibit read inhibit read inhibit
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 17 of 23 jun 09, 2014 we , ce pin operation during a write cycle, addresses are latched by the falling edge of we or ce , and data is latched by the rising edge of we or ce . write/erase endurance and data retention time the endurance is 10 5 cycles (1% cumulative failure rate). the data retention time is more than 10 years. data protection to prevent this phenomenon, this device has a noise cancellati on function that cuts noise if its width is 15 ns or less. 1. data protection against noise on control pins ( ce , oe , we ) during operation during readout or standby, noise on the control pins may act as a trigger and turn the eeprom to programming mode by mistake. be careful not to allow noise of a width of more than 15 ns on the control pins. we ce oe v 0 v v 0 v 15 ns max ih ih
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 18 of 23 jun 09, 2014 2. data protection at v cc on/off when v cc is turned on or off, noise on the control pins genera ted by external circuits (cpu, etc) may act as a trigger and turn the eeprom to program mode by mistake. to prevent this unintentional programming, the eeprom must be kept in an unprogrammable state while the cpu is in an unstable state. note: the eeprom should be kept in unprogrammable state during v cc on/off by using cpu reset signal. v cc cpu reset unprogrammable unprogrammable * * 2.1 protection by ce , oe , we to realize the unprog rammable state, the input level of control pins must be held as shown in the table below. ce v cc oe v ss we v cc : don?t care. v cc : pull-up to v cc level. v ss : pull-down to v ss level. 2.2 protection by res (only the r1ev58064bxxr series) the unprogrammable state can be reali zed by that the cpu?s reset signal inputs directly to the eeprom?s res pin. res should be kept v ss level during v cc on/off. the eeprom breaks off programming operation when res becomes low, programming operation doesn?t finish correctly in case that res falls low during programming operation. res should be kept high for 10 ms after the last data input. v cc res we or ce 100 s min 10 ms min 1 s min program inhibit program inhibit
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 19 of 23 jun 09, 2014 3. software data protection to prevent unintentional programming caused by noise generated by external circuits, this device has the software data protection function. in software data protection mode , 3 bytes of data must be input before write data as follows. and these bytes can switch the non-protection mode to the protection mode. sdp is enabled if only the 3 byte code is input. data aa 55 a0 write data } address 1555 0aaa 1555 write address normal data input software data protection mode can be canceled by inputting th e following 6 bytes. after that, this device turns to the non-protection mode and can write data normally. but when the data is input in the canceling cycle, the data cannot be written. data aa 55 80 aa 55 20 address 1555 0aaa 1555 1555 0aaa 1555 the software data protection is not enabled at the shipment. note: there are some differences between renesas technology?s and other compan y?s for enable/disable sequence of software data protection. if ther e are any questions, please contact with renesas technology?s sales offices.
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 20 of 23 jun 09, 2014 orderable part number guide r1ev58 064b sc r i #b0 parallel eeprom memory density 01mb : 1mbit 256b : 256kbit 064b : 64kbit package type da : dilp-28pin sd : sop-32pin sc : sop-28pin td : tsop-32pin tc : tsop-28pin function r : reset function suported n : reset function not suported quality grade i : ?40 to +85 deg c (industry) b packaging, environmental #s0 : #b0 : embossed tape (pb free) tray or tube (pb free) orderable part number guide of parallel eeprom access time d : 150ns/250ns b : 85/100/120ns
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 21 of 23 jun 09, 2014 package dimensions r1ev58064bdan series r1ev58064bdar series (prdp0028ab-a / previous code: dp-28v) 15.24 maxnom min dimension in millimeters symbol reference 35.6 13.4 5.70 a 1 z b 3 d e a b p c e l e 1 0.51 0.58 1.2 0.20 0.25 0.36 2.29 2.54 2.79 0 15 36.5 14.6 0.38 0.48 1.9 2.54 15 28 14 1 3 1 p 1 c e z l a a b b e d e p-dip28-13.4x35.6-2.54 4.6g mass[typ.] dp-28/dp-28v prdp0028ab-a renesas code jeita package code previous code
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 22 of 23 jun 09, 2014 package dimensions (cont) r1ev58064bscn series r1ev58064bscr series (prsp0028dc-a / previous code: fp-28dv) note) 1. dimension"*1"does not include mold flash. 2. dimension"*2"does not include trim offset. 1.12 0.15 1.27 11. 512 .1 0.4 00.32 18.8 max nom min dimens ion in millimeters symbol reference 2.50 1. 21. 00.8 0.15 8.4 0.30 0.20 0.10 0.48 0.38 0. 220.17 0.12 11.8 8 0 0.20 1.7 18.3 e h e l a d e a 2 a 1 b p b 1 c x y z l 1 c 1 previous code jeita package code renesas code prsp0028dc-a fp-28d mass[typ.] 0.7g p-sop28-8.4x18.3-1.27 terminal cross section c detail f l y s s 15 28 14 index mark 1 xm *2 *1 f d e z e a l 1 a 1 b 1 c 1 b p b p h e
r1ev58064bxxn series/r1ev58064bxxr series r10ds0207ej0100 rev.1.00 page 23 of 23 jun 09, 2014 package dimensions (cont) r1ev58064btcn series r1ev58064btcr series (ptsa0028zb-a / previous code: tfp-28dbv) note) 1. dimension" *1"and"*2(nom)" do not in clude mol d flash. 2. dimension" *3"does not include t rim off set. f detail f terminal cross section a 1 l 1 b p b 1 c 1 c l a 28 1 14 15 index mark *1 d h d *2 e b p m s y x e s z *3 dimension in milli meters reference symbol l 1 z c 1 b 1 a 1 a 2 a b p h d e d l y x e c min nom 11.80 8. 00 8.20 0.20 1.20 0.13 0.05 0.30 0.22 0.20 0.14 0.22 0.17 0.15 0.12 13.70 0.10 0.10 0.45 13.40 0.55 0.80 13.10 0.60 0.50 0.40 5 0 max 0.23g mass[typ.] previous code tfp-28db/tfp-28dbv renesas code jeita package code p-tsop(1)28-8x11.8-0.55 ptsa0028zb-a
all trademarks and registered trademarks are t he property of their respective owners. c - 1 revision history r1ev58064bxxn seri es/r1ev58064bxxr series data sheet rev. date description page summary 0.01 oct 17, 2013 ? initial issue 0.02 oct 18, 2013 1 features: deletion of (only the r1ev58064bxxr series) for ready/ busy. 20 orderable part number guide: deletion of a and c for access time. 0.03 nov 12, 2013 2 ordering information: addition orderab le part name "r1ev58064bscnbi#s0", "r1ev58064bscrbi#s0" 1.00 jun 09, 2014 ? delete preliminary
notice 1. descriptions of circuits, software and other related information in this document are provided only to illustrate the operat ion of semiconductor products and application examples. you are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. renesas electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. renesas electronics has used reasonable care in preparing the information included in this document, but renesas electronics does not warrant that such information is error free. renesas electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information incl uded herein. 3. renesas electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property ri ghts of third parties by or arising from the use of renesas electronics products or technical information described in this document. no license, express, implied or otherwise, is granted hereby under any paten ts, copyrights or other intellectual property rights of renesas electronics or others. 4. you should not alter, modify, copy, or otherwise misappropriate any renesas electronics product, whether in whole or in part . renesas electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration, modification, copy or otherwise misappropriation of renesas electronics product. 5. renesas electronics products are classified according to the following two quality grades: "standard" and "high quality". t he recommended applications for each renesas electronics product depends on the product's quality grade, as indicated below. "standard": computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots etc. "high quality": transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; an ti-crime systems; and safety equipment etc. renesas electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat t o human life or bodily injury (artificial life support devices or systems, surgical implantations etc.), or may cause serious property damages (nuclear reactor control systems, military equipment etc.). you mus t check the quality grade of each renesas electronics product before using it in a particular application. you may not use any renesas electronics product for any application for which it is not intended. renesas electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any renesas electronics product for which the product is not intended by renesas electronics. 6. you should use the renesas electronics products described in this document within the range specified by renesas electronics , especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. renesas e lectronics shall have no liability for malfunctions or damages arising out of the use of renesas electronics products beyond such specified ranges. 7. although renesas electronics endeavors to improve the quality and reliability of its products, semiconductor products have s pecific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. further, renesas electronics products are not subject to radiation resistance desig n. please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a renesas electronics produc t, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measu res. because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or systems manufactured by you. 8. please contact a renesas electronics sales office for details as to environmental matters such as the environmental compatib ility of each renesas electronics product. please use renesas electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, in cluding without limitation, the eu rohs directive. renesas electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 9. renesas electronics products and technology may not be used for or incorporated into any products or systems whose manufactu re, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. you should not use renesas electronics products or technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. when exporting the renesas electronics products or technology described in this do cument, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. 10. it is the responsibility of the buyer or distributor of renesas electronics products, who distributes, disposes of, or othe rwise places the product with a third party, to notify such third party in advance of the contents and conditions set forth in this document, renesas electronics assumes no responsibility for any losses incurred by yo u or third parties as a result of unauthorized use of renesas electronics products. 11. this document may not be reproduced or duplicated in any form, in whole or in part, without prior written consent of renesa s electronics. 12. please contact a renesas electronics sales office if you have any questions regarding the information contained in this doc ument or renesas electronics products, or if you have any other inquiries. (note 1) "renesas electronics" as used in this document means renesas electronics corporation and also includes its majority-o wned subsidiaries. (note 2) "renesas electronics product(s)" means any product developed or manufactured by or for renesas electronics. http://www.renesas.com refer to "http://www.renesas.com/" for the latest and detailed information. renesas electronics america inc. 2801 scott boulevard santa clara, ca 95050-2549, u.s.a. tel: +1-408-588-6000, fax: +1-408-588-6130 renesas electronics canada limited 1101 nicholson road, newmarket, ontario l3y 9c3, canada tel: +1-905-898-5441, fax: +1-905-898-3220 renesas electronics europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k tel: +44-1628-585-100, fax: +44-1628-585-900 renesas electronics europe gmbh arcadiastrasse 10, 40472 dsseldorf, germany tel: +49-211-6503-0, fax: +49-211-6503-1327 renesas electronics (china) co., ltd. room 1709, quantum plaza, no.27 zhichunlu haidian district, beijing 100191, p.r.china tel: +86-10-8235-1155, fax: +86-10-8235-7679 renesas electronics (shanghai) co., ltd. unit 301, tower a, central towers, 555 langao road, putuo district, shanghai, p. r. china 200333 tel: +86-21-2226-0888, fax: +86-21-2226-0999 renesas electronics hong kong limited unit 1601-1613, 16/f., tower 2, grand century place, 193 prince edward road west, mongkok, kowloon, hong kong tel: +852-2265-6688, fax: +852 2886-9022/9044 renesas electronics taiwan co., ltd. 13f, no. 363, fu shing north road, taipei 10543, taiwan tel: +886-2-8175-9600, fax: +886 2-8175-9670 renesas electronics singapore pte. ltd. 80 bendemeer road, unit #06-02 hyflux innovation centre, singapore 339949 tel: +65-6213-0200, fax: +65-6213-0300 renesas electronics malaysia sdn.bhd. unit 906, block b, menara amcorp, amcorp trade centre, no. 18, jln persiaran barat, 46050 petaling jaya, selangor darul ehsan, malaysia tel: +60-3-7955-9390, fax: +60-3-7955-9510 renesas electronics korea co., ltd. 12f., 234 teheran-ro, gangnam-ku, seoul, 135-920, korea tel: +82-2-558-3737, fax: +82-2-558-5141 sales offices ? 2014 renesas electronics corporation. all rights reserved. colophon 4.0

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