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preliminary w91510dn series tone/pulse dialer with rtc and lcd display functions publication release date: may 1997 - 1 - revision a2 general description the w91510dn series ics are si-gate cmos ic that provide the signals needed for either pulse or tone dialing. they feature a 12/16-digit lcd driver for displaying telephone numbers and calling time. a real time clock is included to display the time of day. the w91510dn series is fabricated using cmos technology and thus provide good performance in low voltage, low power applications. features ? one by 32 digits for redial ? uses 5 6 keyboard ? pause, pulse-to-tone (*/t) can be stored as a digit in memory ? flash can be stored as a digit in memory when in store mode ? minimum tone output duration: 87 ms ? minimum intertone pause: 87 ms ? tone/pulse mode pin selectable ? make/break ratio pin selectable ? dialing rate: 10 pps ? pause time: 3.6 sec. ? flash break time (73 ms, 100 ms, 300 ms or 600 ms) selectable by keypad ? built-in 12 or 16-digit lcd driver ( 1/4 duty, 1/3 bias) selectable by mask option ? built-in calling timer from [00:00] to [59:59] ? on-chip power-on reset and clear lcd ? uses 3.579545 mhz tv quartz crystal or ceramic resonator ? uses 32768 hz crystal as rtc frequency base ? packaged in 64-pin plastic qfp with rtc ? switchable 24-hour clock or 12-hour clock with p.m. mode by keypad ? 0 or 9 dialing inhibition pin for pabx systems or long distance dialing lock out ? on hook debounce: 150 ms in normal mode and 20 ms in lock mode ? off-hook delay 300 ms in lock mode ( dp will keep low for 300 ms while off hook except the first off hook after power on reset that dp will keep high for 100 ms then go low for 200 ms) ? first key-in delay: 300 ms in lock mode ? mixed dialing allowed
preliminary w91510dn series - 2 - ? the functions of the different dialers in the w91560dn series are shown in following table: type no. lcd digits lock hold pause time w91510dnf 16 ? yes w91511dlnf 16 yes ? 3.6 sec. w91512dnf 12 ? yes w91513dlnf 12 yes ? w91510dnh* 16 yes yes 3.6 sec. w91512dnh* 12 yes yes * chip form package. pin configuration 1 20 64 w91510dnf series
preliminary w91510dn series publication release date: may 1997 - 3 - revision a2 pin description symbol pin no. i/o function row, column inputs 18 ? 21, 13 ? 17 i the keyboard inputs may be used with either the standard 5 6 keyboard, an inexpensive single contact (form a) keyboard or electronic input. a valid key entry is defined by a single row being connected to a single column. xt1, xt1 22, 23 i, o a built-in inverter provides oscillation with an inexpensive 3.579545 mhz crystal or ceramic resonater. the oscillator ceases when a keypad input is not sensed after chip enable and dialing finished. the crystal frequency deviation is 0.02%. t/p mute 8o the t/p mute is a conventional cmos n-channel open drain output. the output transistor is switched on low level during dialing sequence (both pulse and tone mode), one-key redial break and flash break. otherwise, it is switched off. h/p mute 9 ( w91510dnf, w91512dnf, only ) o the h/p mute is a conventional cmos inverter output, during pulse dialing, one-key redial break, flash break and hold functions, this pin will output an active high. it remains in a low state at all other times. lock 9 (w91511dlnf, w91513dlnf only) i the lock pin is used to prevent "0" or "9" dialing under pabx system long distance call control. when the first key input after reset is "0" or "9", all the key inputs, including "0" or "9" key, become invalid, and the chip generates no output. the telephone is reinitialized by a reset. the following table describes the functions of the lock pin: lock pin floating v dd ss v function normal dialing "0", "9" dialing inhibited "0" dialing inhibited hks 24 i hook switch input. hks = v dd or floating: on-hook state. chip in sleeping mode, no operation. hks = v ss : off-hook state. chip enable for normal operation. hks pin is pulled to v dd by internal resistor.
preliminary w91510dn series - 4 - pin description, continued symbol pin no. i/o function hfi , hfo 25, 10 i, o handfree control pins. a low pulse on the hfi input pin toggles the handfree control state. status of the handfree control is listed in the following table: current state input hfo dialing high yes on hook high low no off hook high low yes on hook off hook low yes off hook low on hook low no off hook high on hook high yes low hook sw. hfo next state hfi hfi hfi hfi pin is pulled to v dd by internal resistor. detailed timing diagrams are shown in figure 4(a), 4(b). dp / c6 11 o this pin is a cmos n-channel open drain output. flash key will cause dp to go active in either pulse mode or tone mode. in lock mode, the dp keeps low for 300 ms during off-hook delay time. the timing diagram is shown as figure 1(a), 1(b), 1(c), 1(d). dtmf 6 o in pulse mode, this pin remains in low state at all time. in tone mode, it will output a dual or single tone. detailed timing diagram for tone mode is shown in figure 2(a), 2(b), 2(c), 2(d). specified actual error % output frequency r1 r2 r3 r4 c1 c2 c3 697 770 852 941 1209 1336 1477 699 766 848 948 1216 1332 1472 +0.28 - 0.52 - 0.47 +0.74 +0.57 - 0.30 - 0.34 vlcd 29 o power supply pin for lcd driver. a 0.1 f capacitor is connected between vlcd and v ss . cp, cn 31, 32 i cp is the voltage control capacitor positive pin. cn is the voltage control capacitor negative pin. a 0.1 f capacitor is connected between these two pins.
preliminary w91510dn series publication release date: may 1997 - 5 - revision a2 pin description, continued symbol pin no. i/o function com1 to com4 33 ? 36 o com1 to com4 are the common signal output terminal for the 1/4 duty lcd. seg1 to seg32 37 ? 64, 1 ? 4 o seg1 to seg32 are the 16-digit segment signal outputs. xt2, xt2 26, 27 i, o a quartz crystal oscillator provides an rtc frequency time base of 32.768 khz. vrtc1, vrtc2 28, 30 i either vrtc1 should be connected to a 1.5v battery, and vrtc2 should be connected a capacitor 0.1 f to ground. v dd , v ss 5, 7 i power input pins. mode 12 i pulling mode pin to v ss places the dialer in tone mode. pulling mode pin to v dd places the dialer in pulse mode (10 pps, m/b = 1/2). leaving mode pin floating places the dialer in pulse mode (10 pps, m/b = 2/3). block diagram row column dtmf xt1 xt1 ram counter system clock generator location latch d/a row & column programmable counter data latch & decoder read/write (r1 ~ r4) (c1 ~ c5) control logic pulse/ control logic keyboard interface converter segment output decoder backplane signal generator com2 com1 com3 l.c.d. com4 xt2 xt2 real time clock generator tone hks mode hfi h/p mute hfo lock dp t/p mute v dd ss v v rtc1 v rtc2 v lcd cp cn
preliminary w91510dn series - 6 - functional description keyboard operation c1 c2 c3 c4 c5 dp / c6 1 2 3 hold1 r1 4 5 6 f4 hold2 r2 7 8 9 chk apset r3 */t 0 # r/p rtc/hour set r4 f1 f2 f3 okr tim/min vx ? */t: * in tone mode and p t in pulse mode ? f1, f2, f3, f4: flash keys ? r/p: redial and pause function key ? okr: one-key redial function ? rtc: real time clock toggle key ? tim: a. display last calling time b. start and/or stop counting up calling time ? hour and min: adjusting time setting keys ? hold1, hold2: hold function keys ? apset: toggle to set rtc display mode ? set: toggle the rtc set function on/off. ? chk: a. check dialing number b. check dialing time note: d1, ..., dn, d1', ..., dn': 0, ..., 9, ? /t, # normal dialing off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn 1. d1, d2, ..., dn will be dialed out. 2. dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing. redialing 1. off hook (or on hook & hfi ?? ), d1 , d2 , check memory (or number store ), d3 , ..., dn , busy, come on hook , off hook (or on hook & hfi ?? ), r/p
preliminary w91510dn series publication release date: may 1997 - 7 - revision a2 a. the r/p key can execute the redial function only as the first key-in after off-hook; otherwise, it will invoke pause function. b. the redial memory content will be d3, , dn. c. redial memory can be checked in memory check mode. ( chk , r/p ) d. if redialing length oversteps 32 digits, the redialing function will be inhibited. 2. off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , busy, okr a. if the dialing of d1 to dn is finished, pressing the okr key will cause the pulse output pin to go low for 2.2 seconds break time and 0.6 seconds pause time will automatically be added. b. if the pulses of the dialed digits d1 to dn have not finished, okr will be ignored. c. the one-key redialing function timing diagram is shown in figure 3. access pause off hook (or on hook & hfi ?? ), d1 , d2 , r/p , d3 , ..., dn , busy, come on hook , off hook (or on hook & hfi ?? ), r/p 1. the first r/p functions as a pause key and the second as a first key-in redial key. 2. the pause function can be stored in memory. 3. the pause function is executed in normal dialing, redialing, or memory dialing. 4. the pause duration time is 3.6 sec. 5. the pause function timing diagram is shown in figure 5 pulse- to-tone (*/t) off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , ? /t ,d1' , d2' , ..., dn' 1. if the mode switch is set to pulse mode, then the output signal will be: d1, d2, , dn, pause (3.6 sec), d1', d2', , dn' (pulse) (tone) 2. if the mode switch is set to tone mode, then the output signal will be: d1, d2, , dn, *, d1', d2', , dn' (tone) (tone) 3. the dialer remains in tone mode after the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. the pulse-to-tone function timing diagram is shown in figure 6(a), 6(b).
preliminary w91510dn series - 8 - flash (f = f1, f2, f3, f4) off hook (or on hook & hfi ?? ), f 1. the dialer will execute flash break time of 600 ms(f1), 300 ms(f2), 73 ms(f3) or 100 ms(f4) and pause time of 1s before the next digit (except flash key) is dialed out. 2. the system will return to the initial state after flash break time is finished. 3. keyboard functions are inhibited during flash break is being executed. 4. the flash timing daigram is shown in figure 7. hold key off hook (or on hook & hfi ?? ), hold1 (or hold2 ) 1.the hold function is toggled on and off by hold1 or hold2 key. when the hold function is toggled on, the hold mark (dot of digit_4) will be lit and all key-in (except hold keys and icon keys) will be ignored. 2. the following are examples of hold function toggled on and off: a. off hook , hold1 (or hold2 ), hold1 (or hold2 ) b. off hook , hold1 (or hold2 ), hfi ?? c. off hook , hold1 (or hold2 ), on hook , hfi ?? d. on hook & hfi ?? , hold1 (or hold2 ), hfi ?? 3. hold1 and hold2 have the same function in off-hook state. the difference between hold1 and hold2 are shown as follows: a. if off hook , hold1 (or hold2 ), on hook , hold1 is entered, then the dialer will be off-line. if off hook , hold1 (or hold2 ), on hook , hold2 is entered, then the dialer will stay at hold function. b. if on hook & hfi ?? , hold1 (or hold2 ), hold1 is entered, then the dialer will be off- line. c. if on hook & hfi ?? , hold1 (or hold2 ), and hold2 is entered, then the dialer will stay at hold function. 4. the function timing diagram is shown in figure 8(a), 8(b), 8(c). adjusting time setting off hook (or on hook & hfi ?? ), set , hour , min , set (or on hook )
preliminary w91510dn series publication release date: may 1997 - 9 - revision a2 1. only hour and min keys are valid in rtc set mode. 2. hours and minutes count forward as long as hour or min key is pressed. 3. the on/off function of set is tolggled, and the dialer will be initialized after toggle set key. 4. if the dialing sequence d1, d2, ..., dn (including flash and pause) has not finished, set will be ignored. rtc display mode off hook (or on hook & hfi ?? ), rtc 1.the real time clock display mode can be toggled on and off by rtc key. 2. the icon display will not be changed when enter rtc display mode and set rtc mode. apset 1. in the off-hook state, pressing apset key to toggle the rtc function in 24-hour clock mode or 12- hour clock with p.m. mode. 2. the default mode is 12-hour clock with p.m. mode after power on. check key off hook (or on hook & hfi ?? ), chk , r/p the redial content will be displayed on the lcd when either r/p or okr is key in. tim off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn (or redialing or repertory dialing ), conversation 1. if no key is pressed after dialing finish, the lcd will display counting time after 6 seconds. 2. if the dialing sequence d1, d2, ..., dn has not finished, tim will be ignored. 3. the timer will be initialized by flash and toggle set key.
preliminary w91510dn series - 10 - absolution maximum ratings parameter symbol rating unit dc supply voltage v dd ? v ss -0.3 to +7.0 v v il v ss ? 0.3 input/output voltage v ih v dd +0.3 v v ol v ss ? 0.3 v oh v dd +0.3 power dissipation p d 120 mw operating temperature t opr -0.5 to +70 c storage temperature t stg -55 to +125 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. electrical characteristics dc characteristics (v dd ? v ss = 2.5v. f osc = 3.58 mhz, t a = 25 c, all outputs unloaded.) parameter symbol conditions min. typ. max. unit operating voltage v dd - 2.0 - 5.5 v operating current i op tone, unloaded - 0.5 0.7 ma pulse, unloaded - 0.4 0.5 standby current i sb hks = 0, unloaded and no key entry --15 a memory retention current i mr hks = 1 v dd = 1.0v - - 0.5 a tone output voltage v to row group rl = 10 k ? 130 150 170 mvrms pre-emphasis col/row v dd = 2.0 to 5.5v -23db dtmf distortion thd rl = 10 k ? v dd = 2.0 to 5.5v - -30 -23 db dtmf output dc level v tdc v dd = 2.0 to 5.5v 1.0 - 3.0 v dtmf output sink current i tl v to = 0.5v 0.2 - - ma dp output sink current i pl v po = 0.5v 0.5 - - ma
preliminary w91510dn series publication release date: may 1997 - 11 - revision a2 dc characteristics, continued parameter sym. conditions min. typ. max. unit common output voltage v ch - 4.2 4.5 4.8 v v cl - - 0 0.3 common output current i ch - -20 - - a i cl -20-- segment output voltage v sh - 4.2 4.5 4.8 v v sl - - 0 0.3 segment output current i sh --5-- a i sl -5-- rms voltage v on - 2.4 2.6 - vrms across a segment v off - - 1.5 1.7 average dc offset voltage v dc - - - 100 mv hfi high voltage v hfih - 0.8 v dd -v dd v hfi low voltage v hfil - - - 0.2 v dd v t/p mute output sink current i tml v tmo = 0.5v 0.5 - - ma h/p mute output drive current i hmh v hmo = 2.0v 0.5 - - ma h/p mute output sink current i hml v hmo = 0.5v 0.5 - - ma keypad input drive current i kd v i = 0v 4 - - a keypad input sink current i ks v i = 2.5v 200 - - a keypad resistance r k ---5 k ? control input pull-up/down resistor r ih - 100 - - k ? hks input pull-high resistor r hk - - 500 - k ?
preliminary w91510dn series - 12 - ac characteristics (v dd ? v ss = 2.5v, f osc. = 3.58 mhz, t a = 25 c, all outputs unloaded.) parameter symbol conditions min. typ. max. unit key-in debounce t kid --20-ms key release debounce t krd --20-ms off-hook delay time t ofd - - 300 - ms first key-in delay time t fkd - - 300 - ms on-hook debounce time t ohd unlock - 150 - ms lock -20- pulse mute delay t md mode = v dd -40-ms mode = floating - 33.3 - pre-digit-pause t pdp mode = v dd -40-ms 10 pps mode = floating - 33.3 - inter-digit pause t idp 10 pps - 800 - ms (auto dialing) make/break ratio m:b mode = v dd - 40:60 - % mode = floating - 33:67 - tone output duration t td --87-ms inter-tone pause t itp -87-ms f1 - 600 - flash break time t fb f2 - 300 - ms f3 - 73 - f4 - 100 flash pause time t fp f1, f2, f3,f4 - 1 - s pause time t p r/p - 3.6 - one key redialing break time t rb - - 2.2 - s one key redialing pause time t rp - - 0.6 - s lcd frame frequency f lcd --32-hz
preliminary w91510dn series publication release date: may 1997 - 13 - revision a2 rtc dc characteristics (v rtc = 1.5v, v ss = 0v, f osc . = 32.768 khz , t a = 25 c, all outputs unloaded.) parameter symbol conditions min. typ. max. unit supply voltage v rtc - 1.2 1.5 1.8 v supply current i rtc no load - 2.0 4.0 a osc. starting time t osc ---3s osc. output built-in cap. c o cl = 12.5 pf - 25 - pf osc. in trimmer cap. c trim - 5 - 35 pf frequency stability ? f/f v dd ? v ss = 1.3 to 1.6v - - 1 ppm notes : 1. crystal parameters suggested for proper operation are rs < 100 ohms, lm = 96 mh , cm = 0.02 pf , cn = 5 pf , cl = 18 pf, and fosc. = 3.579545 mhz 0.02% 2. crystal oscillator accuracy directly affects these times. timing waveforms t idp hks key in dp t/p mute h/p mute 2 b m t idp t idp t kid t idp t pdp 2 mb t md 4 t krd 3 < 600 ms < 300 ms t kid dtmf osc. low oscillation oscillation t pdp t kd figure 1(a). normal dialing timing diagram (pulse mode without lock function)
preliminary w91510dn series - 14 - timing waveforms, continued hks key in dp t/p mute h/p mute t ofd 2 b m t idp t idp t pdp t kid t idp t pdp 2 mb t md t md 4 t krd dtmf osc. low oscillation oscillation t fkd 3 < 600 ms < 300 ms t kid t kd figure 1(b). normal dialing timing diagram (pulse mode with lock function) hks key in dp t/p mute h/p mute r/p t kid b m t idp t idp t pdp mb t md t md dtmf osc. low oscillation t idp < 600 ms t krd figure 1(c). auto dialing timing diagram (pulse mode without lock function)
preliminary w91510dn series publication release date: may 1997 - 15 - revision a2 timing waveforms, continued hks key in dp t/p mute h/p mute t ofd b m t idp t idp t pdp m b t md t md dtmf osc. low oscillation r/p t kid t idp t fkd < 600 ms < 300 ms figure 1(d). auto dialing timing diagram (pulse mode with lock function) hks key in h/p mute t/p mute dtmf 5 t kid 2 low 4 t krd 3 < 600 ms < 300 ms t td osc. dp oscillation oscillation 2 t itp t itp t itp t kid high t itp oscillation t krd figure 2(a). normal dialing timing diagram (tone mode without lock function)
preliminary w91510dn series - 16 - timing waveforms, continued hks key in h/p mute t/p mute dtmf 5 t kid 2 low 4 t krd 3 < 600 ms < 300 ms t td osc. t ofd dp oscillation oscillation t fkd 2 t itp t itp t itp t kd figure 2(b). normal dialing timing diagram (tone mode with lock function) hks key in h/p mute t/p mute dtmf low r/p t krd < 600 ms osc. dp oscillation t td t itp t itp t kid high t ohd figure 2(c). auto dialing timing diagram (tone mode without lock function)

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