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? 2008 microchip technology inc. ds22062b-page 1 mcp14e3/mcp14e4/mcp14e5 features high peak output current: 4.0a (typical) independent enable function for each driver output low shoot-through/cross-conduction current in output stage wide input supply voltage operating range: - 4.5v to 18v high capacitive load drive capability: - 2200 pf in 15 ns (typical) - 5600 pf in 26 ns (typical) short delay times: 50 ns (typical) latch-up protected: will withstand 1.5a reverse current logic input will withstand negative swing up to 5v space-saving packages: - 8-lead 6x5 dfn, pdip, soic applications switch mode power supplies pulse transformer drive line drivers motor and solenoid drive general description the mcp14e3/mcp14e4/mcp14e5 devices are a family of 4.0a buffers/mosf et drivers. dual-inverting, dual-noninvertering, and complementary outputs are standard logic options offered. the mcp14e3/mcp14e4/mcp14e5 drivers are capable of operating from a 4.5v to 18v single power supply and can easily charge and discharge 2200 pf gate capacitance in under 15 ns (typical). they provide low impedance in both the on and off states to ensure the mosfets intended state will not be affected, even by large transients. the mcp14e3/ mcp14e4/mcp14e5 inputs may be driven directly from either ttl or cmos (2.4v to 18v). additional control of the mcp14e3/mcp14e4/ mcp14e5 outputs is allowed by the use of separate enable functions. the enb_a and enb_b pins are active high and are internally pulled up to v dd . the pins maybe left floating for standard operation. the mcp14e3/mcp14e4/mc p14e5 dual-output 4.0a driver family is offered in both surface-mount and pin- through-hole packages with a -40c to +125c temperature rating. the low thermal resistance of the thermally enhanced dfn package allows for greater power dissipation capability for driving heavier capacitive or resistive loads. these devices are highly latch-up resistant under any conditions within their power and voltage ratings. they are not subject to damage when up to 5v of noise spiking (of either polarity) occurs on the ground pin. they can accept, without damage or logic upset, up to 1.5a of reverse current being forced back into their outputs. all terminals are fully protect against electrostatic discharge (esd) up to 4 kv. package types enb_a in a gnd in b 8-pin 12 3 4 enb_b 5 6 7 8 out a out b enb_a in a gnd in b v dd note 1: exposed pad of the dfn package is electrically isolated. mcp14e3 mcp14e4 enb_b out a out b v dd mcp14e5 enb_b out a out b v dd enb_b out a out b v dd mcp14e3 mcp14e4 enb_b out a out b v dd mcp14e5 enb_bout a out b v dd pdip/soic 8-pin 6x5 dfn (1) 1 2 3 4 5 6 7 8 4.0a dual high-speed power mosfet drivers with enable downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 2 ? 2008 microchip technology inc. functional block diagram effective input c = 20 pf (each input) mcp14e3 mcp14e4 mcp14e5 dual inverting dual noninverting one inverting, one noninverting output inputgnd v dd 4.7 v inverting non-inverting enable v dd internal pull-up 4.7 v downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 3 mcp14e3/mcp14e4/mcp14e5 1.0 electrical characteristics absolute maximum ratings ? supply voltage ................................................................+20v input voltage ............................... (v dd + 0.3v) to (gnd C 5v) enable voltage .............................(v dd + 0.3v) to (gnd - 5v) input current (v in >v dd )................................................50 ma package power dissipation (t a = 50c) 8l-dfn ....................................................................... note 3 8l-pdip ........................................................................1.10w 8l-soic .....................................................................665 mw ? notice: stresses above those listed under "maximum ratings" may cause permanent dam age to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. exposure to maximum rating conditions for extended periods may affect device reliability. dc characteristics (note 2) electrical specifications: unless otherwise indicated, t a = +25c, with 4.5v v dd 18v. parameters sym min typ max units conditions input logic 1 , high input voltage v ih 2.4 1.5 v logic 0 , low input voltage v il 1 . 30 . 8v input current i in C1 1 a 0v v in v dd input voltage v in -5 v dd +0.3 v output high output voltage v oh v dd C 0.025 v dc test low output voltage v ol 0.025 v dc test output resistance, high r oh 2 . 53 . 5 i out = 10 ma, v dd = 18v output resistance, low r ol 2 . 53 . 0 i out = 10 ma, v dd = 18v peak output current i pk 4 . 0a v dd = 18v (note 2) latch-up protection with- stand reverse current i rev >1.5 a duty cycle 2%, t 300 s switching time (note 1) rise time t r 1 53 0n s figure 4-1 , figure 4-2 c l = 2200 pf fall time t f 1 83 0n s figure 4-1 , figure 4-2 c l = 2200 pf propagation delay time t d1 4 65 5n s figure 4-1 , figure 4-2 propagation delay time t d2 5 05 5n s figure 4-1 , figure 4-2 enable function (enb_a, enb_b) high-level input voltage v en_h 1.60 1.90 2.90 v v dd = 12v, lo to hi transition low-level input voltage v en_l 1.30 2.20 2.40 v v dd = 12v, hi to lo transition hysteresis v hyst 0.10 0.30 0.60 v enable leakage current i enbl 40 85 115 a v dd =12v, enb_a = enb_b = gnd propagation delay time t d3 6 0n s figure 4-3 (note 1) propagation delay time t d4 5 0n s figure 4-3 (note 1) note 1: switching times ensured by design. 2: tested during characterization, not production tested. 3: package power dissipation is dependent on the copper pad area on the pcb. downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 4 ? 2008 microchip technology inc. power supply supply voltage v dd 4.5 18.0 v supply current i dd 1 . 6 02 . 0 0m a v in_a =3v, v in_b =3v, enb_a = enb_b = high i dd 0 . 6 00 . 9 0m a v in_a =0v, v in_b =0v, enb_a = enb_b = high i dd 1 . 2 01 . 4 0m a v in_a =3v, v in_b =0v, enb_a = enb_b = high i dd 1 . 2 01 . 4 0m a v in_a =0v, v in_b =3v, enb_a = enb_b = high i dd 1 . 4 01 . 8 0m a v in_a =3v, v in_b =3v, enb_a = enb_b = low i dd 0 . 5 50 . 7 5m a v in_a =0v, v in_b =0v, enb_a = enb_b = low i dd 1 . 0 01 . 2 0m a v in_a =3v, v in_b =0v, enb_a = enb_b = low i dd 1 . 0 01 . 2 0m a v in_a =0v, v in_b =3v, enb_a = enb_b = low dc characteristics (note 2) (continued) electrical specifications: unless otherwise indicated, t a = +25c, with 4.5v v dd 18v. parameters sym min typ max units conditions note 1: switching times ensured by design. 2: tested during characterization, not production tested. 3: package power dissipation is dependent on the copper pad area on the pcb. downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 5 mcp14e3/mcp14e4/mcp14e5 dc characteristics (over operating temperature range) electrical specifications: unless otherwise indicated, oper ating temperature range with 4.5v v dd 18v. parameters sym min typ max units conditions input logic 1 , high input voltage v ih 2.4 v logic 0 , low input voltage v il 0 . 8v input current i in C10 +10 a 0v v in v dd output high output voltage v oh v dd C 0.025 v dc test low output voltage v ol 0.025 v dc test output resistance, high r oh 3 . 06 . 0 i out = 10 ma, v dd = 18v output resistance, low r ol 3 . 05 . 0 i out = 10 ma, v dd = 18v switching time (note 1) rise time t r 2 54 0n s figure 4-1 , figure 4-2 c l = 2200 pf fall time t f 2 84 0n s figure 4-1 , figure 4-2 c l = 2200 pf delay time t d1 5 07 0n s figure 4-1 , figure 4-2 delay time t d2 5 07 0n s figure 4-1 , figure 4-2 enable function (enb_a, enb_b) high-level input voltage v en_h 1.60 2.20 2.90 v v dd = 12v, lo to hi transition low-level input voltage v en_l 1.30 1.80 2.40 v v dd = 12v, hi to lo transition hysteresis v hyst 0 . 4 0v enable leakage current i enbl 40 87 115 a v dd = 12v, enb_a = enb_b = gnd propagation delay time t d3 5 0n s figure 4-3 propagation delay time t d4 6 0n s figure 4-3 power supply supply voltage v dd 4.5 18.0 v supply current i dd 2 . 03 . 0m a v in_a =3v, v in_b =3v, enb_a = enb_b = high i dd 0 . 81 . 1m a v in_a =0v, v in_b =0v, enb_a = enb_b = high i dd 1 . 52 . 0m a v in_a =3v, v in_b =0v, enb_a = enb_b = high i dd 1 . 52 . 0m a v in_a =0v, v in_b =3v, enb_a = enb_b = high i dd 1 . 82 . 8m a v in_a =3v, v in_b =3v, enb_a = enb_b = low i dd 0 . 60 . 8m a v in_a =0v, v in_b =0v, enb_a = enb_b = low i dd 1 . 11 . 8m a v in_a =3v, v in_b =0v, enb_a = enb_b = low i dd 1 . 11 . 8m a v in_a =0v, v in_b =3v, enb_a = enb_b = low note 1: switching times ensured by design. downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 6 ? 2008 microchip technology inc. temperature characteristics electrical specifications: unless otherwise noted, all parameters apply with 4.5v v dd 18v. parameters sym min typ max units conditions temperature ranges specified temperature range t a C40 +125 c maximum junction temperature t j +150 c storage temperature range t a C65 +150 c package thermal resistances thermal resistance, 8l-6x5 dfn ja 35.7 c/w typical four-layer board with vias to ground plane thermal resistance, 8l-pdip ja 8 9 . 3 c / w thermal resistance, 8l-soic ja 149.5 c/w downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 7 mcp14e3/mcp14e4/mcp14e5 2.0 typical performance curves note: unless otherwise indicated, t a = +25c with 4.5v v dd 18v. figure 2-1: rise time vs. supply voltage. figure 2-2: rise time vs. capacitive load. figure 2-3: rise and fall times vs. temperature. figure 2-4: fall time vs. supply voltage. figure 2-5: fall time vs. capacitive load. figure 2-6: propagation delay vs. input amplitude. note: the graphs and tables provided following this note ar e a statistical summary based on a limited number of samples and are provided for informational purposes onl y. the performance charac teristics listed herein are not tested or guaranteed. in some graphs or t ables, the data presented ma y be outside the specified operating range (e.g., outside specified power suppl y range) and therefore outs ide the warranted range. 0 20 40 60 80 100 4 6 8 10 12 14 16 18 supply voltage (v) rise time (ns) 10,000 pf 6,800 pf 4,700 pf 2,200 pf 100 pf 0 10 20 30 40 50 60 100 1000 10000 capacitive load (pf) rise time (ns) 5v 12v 18v 10 12 14 16 18 20 22 24 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) time (ns) v dd = 18v t rise t fall 0 30 60 90 120 4 6 8 1012141618 supply voltage (v) fall time (ns) 10,000 pf 6,800 pf 4,700 pf 2,200 pf 100 pf 0 10 20 30 40 50 60 100 1000 10000 capacitive load (pf) fall time (ns) 5v 12v 18v 35 40 45 50 55 60 4 5 6 7 8 9 10 11 12 input amplitude (v) propagation delay (ns) v dd = 12v t d1 t d2 downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 8 ? 2008 microchip technology inc. typical performance curves (continued) note: unless otherwise indicated, t a = +25c with 4.5v v dd 18v. figure 2-7: propagation delay time vs. supply voltage. figure 2-8: quiescent current vs. supply voltage. figure 2-9: output resistance (output high) vs. supply voltage. figure 2-10: propagation delay time vs. temperature. figure 2-11: quiescent current vs. temperature. figure 2-12: output resistance (output low) vs. supply voltage. 20 40 60 80 100 120 140 4 6 8 10 12 14 16 18 supply voltage (v) propagation delay (ns) t d1 t d2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 4 6 8 1012141618 supply voltage (v) quiescent current (ma) input = 1 input = 0 1 2 3 4 5 6 7 8 4 6 8 1012141618 supply voltage (v) r out-hi ( ? ) t a = 125c t a = 25c v in = 0v (mcp14e3) v in = 5v (mcp14e4) 40 50 60 70 80 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) propagatin delay (ns) t d1 t d2 v dd = 12v 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) quiescent current (ma) input = 1 input = 0 v dd = 18v 1 2 3 4 5 6 7 8 4 6 8 1012141618 supply voltage (v) r out-lo ( ? ) t a = 125c t a = 25c v in = 5v (mcp14e3) v in = 0v (mcp14e4) downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 9 mcp14e3/mcp14e4/mcp14e5 typical performance curves (continued) note: unless otherwise indicated, t a = +25c with 4.5v v dd 18v. figure 2-13: supply current vs. capacitive load. figure 2-14: supply current vs. capacitive load. figure 2-15: supply current vs. capacitive load. figure 2-16: supply current vs. frequency. figure 2-17: supply current vs. frequency. figure 2-18: supply current vs. frequency. 0 20 40 60 80 100 120 100 1000 10000 capacitive load (pf) supply current (ma) 650 khz 400 khz 200 khz 100 khz 50 khz v dd = 18v 0 10 20 30 40 50 60 70 100 1000 10000 capacitive load (pf) supply current (ma) 650 khz 400 khz 200 khz 100 khz 50 khz v dd = 12v 0 5 10 15 20 25 30 35 100 1000 10000 capacitive load (pf) supply current (ma) 650 khz 400 khz 200 khz 100 khz 50 khz v dd = 6v 0 20 40 60 80 100 120 10 100 1000 frequency (khz) supply current (ma) 10,000 pf 6,800 pf 4,700 pf 2,200 pf 100 pf v dd = 18v 0 10 20 30 40 50 60 70 10 100 1000 frequency (khz) supply current (ma) 10,000 pf 6,800 pf 4,700 pf 2,200 pf 100 pf v dd = 12v 0 5 10 15 20 25 30 35 10 100 1000 frequency (khz) supply current (ma) 10,000 pf 6,800 pf 4,700 pf 2,200 pf 100 pf v dd = 6v downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 10 ? 2008 microchip technology inc. typical performance curves (continued) note: unless otherwise indicated, t a = +25c with 4.5v v dd 18v. figure 2-19: input threshold vs. temperature. figure 2-20: input threshold vs. supply voltage. figure 2-21: enable threshold vs. temperature. figure 2-22: enable hysteresis vs. temperature. figure 2-23: crossover energy vs. supply voltage. 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) input threshold (v) v hi v lo v dd = 18v 1.0 1.2 1.4 1.6 1.8 2.0 4 6 8 1012141618 supply voltage (v) input threshold (v) v hi v lo 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) enable threshold (v) v en_h v en_l v dd = 12v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) enable hysteresis (v) v dd = 12v 1e-09 1e-08 1e-07 1e-06 4 6 8 1012141618 supply voltage (v) crossover energy (a*sec) note: the values on this graph represent the loss seen by both drivers in a package during one complete cycle. for a single driver, divide the stated value by 2. for a signal transition of a single driver, divide the state value by 4. downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 11 mcp14e3/mcp14e4/mcp14e5 3.0 pin descriptions the descriptions of the pins are listed in table 3-1 . 3.1 control inputs a and b the mosfet driver inputs are a high-impedance ttl/ cmos compatible input. the inputs also have hystere- sis between the high and low input levels, allowing them to be driven from slow rising and falling signals and to provide noise immunity. 3.2 outputs a and b outputs a and b are cmos push-pull outputs that are capable of sourcing and sinking 4.0a of peak current (v dd = 18v). the low output impedance ensures the gate of the mosfet will stay in the intended state even during large transients. these outputs also have a reverse latch-up rating of 1.5a. 3.3 supply input (v dd ) v dd is the bias supply input for the mosfet driver and has a voltage range of 4.5v to 18v. this input must be decoupled to ground with a local ceramic capacitor. this bypass capacitor provides a localized low-imped- ance path for the peak currents that are to be provided to the load. 3.4 ground (gnd) ground is the device return pin. the ground pin(s) should have a low impedance connection to the bias supply source return. high peak currents will flow out the ground pin(s) when the capacitive load is being discharged. 3.5 enable a (enb_a) the enb_a pin is the enable control for output a. this enable pin is internally pulled up to v dd for active high operation and can be left floating for standard operation. when the enb_a pin is pulled below the enable pin low level input voltage (v en_l ), output a will be in the off state regardless of the input pin state. 3.6 enable b (enb_b) the enb_b pin is the enable control for output b. this enable pin is internally pulled up to v dd for active high operation and can be left floating for standard operation. when the enb_b pin is pulled below the enable pin low-level input voltage (v en_l ), output b will be in the off state regardless of the input pin state. 3.7 dfn exposed pad the exposed metal pad of the dfn package is not internally connected to any potential. therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board to aid in heat removal from the package. table 3-1: pin function table 8-pin pdip, soic 8-pin 6x5 dfn symbol description 1 1 enb_a output a enable 2 2 in a input a 3 3 gnd ground 4 4 in b input b 5 5 out b output b 66v dd supply input 7 7 out a output a 8 8 enb_b output b enable pad nc exposed metal pad note: duplicate pins must be connected for proper operation. downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 12 ? 2008 microchip technology inc. 4.0 application information 4.1 general information mosfet drivers are high-speed, high current devices which are intended to source/sink high peak currents to charge/discharge the gate capacitance of external mosfets or igbts. in high frequency switching power supplies, the pwm controller may not have the drive capability to directly drive the power mosfet. a mos- fet driver like the mcp14e3/mcp14e4/mcp14e5 family can be used to provide additional source/sink current capability. an additional degree of control has been added to the mcp14e3/mcp14e4/mcp14e5 family. there are separate enable functions for each driver that allow for the immediate terminatio n of the output pulse regardless of the state of the input signal. 4.2 mosfet driver timing the ability of a mosfet driver to transition from a fully off state to a fully on state are characterized by the drivers rise time (t r ), fall time (t f ), and propagation delays (t d1 and t d2 ). the mcp14e3/mcp14e4/ mcp14e5 family of drivers can typically charge and discharge a 2200 pf load capacitance in 15 ns along with a typical matched propagation delay of 50 ns. figure 4-1 and figure 4-2 show the test circuit and timing waveform used to verify the mcp14e3/ mcp14e4/mcp14e5 timing. figure 4-1: inverting driver timing waveform. figure 4-2: non-inverting driver timing waveform. 4.3 enable function the enb_a and enb_b enable pins allow for indepen- dent control of out a and out b respectively. they are active high and are internally pulled up to v dd so that the default state is to enable the driver. these pins can be left floating for normal operation. when an enable pin voltage is above the enable pin high threshold voltage, v en_h (2.4v typical), that driver output is enabled and allowed to react to changes in the input pin voltage state. likewise, when the enable pin voltage falls below the enable pin low threshold voltage, v en_l (2.0v typical), that driver output is dis- abled and does not respond the changes in the input pin voltage state. when the driver is disabled, the out- put goes to a low state. refer to table 4-1 for enable pin logic. the threshold voltages of the enable function are compatible with logic leve ls. hysteresis is provided to help increase the noise immunity of the enable function, avoiding false tr iggers of the enable signal during driver switching. for robust designs, it is recommended that the slew rate of the enable pin signal be greater than 1 v/ns. there are propagation delays associated with the driver receiving an enable signal and the output reacting. these propagation delays, t d3 and t d4 , are graphically represented in figure 4-3 . 0.1 f +5v 10% 90% 10% 90% 10% 90% 18v 1f 0v 0v mcp14e3 c l = 2200 pf input input output t d1 t f t d2 output t r v dd = 18v ceramic input (1/2 mcp14e5) 90% input t d1 t f t d2 output t r 10% 10% 10% +5v 18v 0v 0v 90% 90% 0.1 f 1f mcp14e4 c l = 2200 pf input output v dd = 18v ceramic input (1/2 mcp14e5) downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 13 mcp14e3/mcp14e4/mcp14e5 figure 4-3: enable timing waveform. 4.4 decoupling capacitors careful layout and decoupling capacitors are highly recommended when using mosfet drivers. large currents are required to charge and discharge capacitive loads quickly. for example, 2.5a are needed to charge a 2200 pf load with 18v in 16 ns. to operate the mosfet dr iver over a wide frequency range with low supply impedance, a ceramic and low esr film capacitor are recommended to be placed in parallel between the driver v dd and gnd. a 1.0 f low esr film capacitor and a 0.1 f ceramic capacitor should be used. these capacitors should be placed close to the driver to minimized circuit board parasitics and provide a local source for the required current. 4.5 pcb layout considerations proper pcb layout is important in a high current, fast switching circuit to provide proper device operation and robustness of design. pc b trace loop area and inductance should be minimized by the use of ground planes or trace under mosfet gate drive signals, separate analog and power grounds, and local driver decoupling. placing a ground plane beneath the mcp14e3/ mcp14e4/mcp14e5 will help as a radiated noise shield as well as providing some heat sinking for power dissipated within the device. 4.6 power dissipation the total internal power dissipation in a mosfet driver is the summation of three separate power dissipation elements. equation 4-1: 4.6.1 capacitive load dissipation the power dissipation caused by a capacitive load is a direct function of frequency, total capacitive load, and supply voltage. the power lo st in the mosfet driver for a complete charging and discharging cycle of a mosfet is: equation 4-2: table 4-1: enable pin logic mcp14e3 mcp14e4 mcp14e5 enb_a enb_b in a in b out a out b out a out b out a out b hhhhl lhhlh hhhl lhhl l l hhlhhl lhhh hhl lhhl lhl llxxllllll 5v0v enb_xv dd 0v out x v en_h v en_l 90% 10% t d3 t d4 p t p l p q p cc ++ = where: p t = total power dissipation p l = load power dissipation p q = quiescent power dissipation p cc = operating power dissipation p l fc t v dd 2 = where: f = switching frequency c t = total load capacitance v dd = mosfet driver supply voltage downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 14 ? 2008 microchip technology inc. 4.6.2 quiescent power dissipation the power dissipation associated with the quiescent current draw of the mcp14e3/mcp14e4/mcp14e5 depends upon the state of the input and enable pins. refer to the dc characteristic table for the quiescent current draw for specific combinations of input and enable pin states. the quiescent power dissipation is: equation 4-3: 4.6.3 operating power dissipation the operating power dissipation occurs each time the mosfet driver output transitions because for a very short period of time both mo sfets in the output stage are on simultaneously. this cross-conduction current leads to a power dissipation describes as: equation 4-4: p q i qh di ql 1 d C () + () v dd = where: i qh = quiescent current in the high state d = duty cycle i ql = quiescent current in the low state v dd = mosfet driver supply voltage p cc cc f v dd = where: cc = cross-conduction constant (a*sec) f = switching frequency v dd = mosfet driver supply voltage downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 15 mcp14e3/mcp14e4/mcp14e5 5.0 packaging information 5.1 package marking information (not to scale) legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example: mcp14e3 e/p^^256 0814 8-lead soic (150 mil) example: 256 mcp14e3 e 8-lead dfn-s (6x5) example : xxxxxxxxxxxxxx xxyyww nnn mcp14e3 e/mf^^ 0814 256 sn^^0814 3 e 3 e 3 e nnn xxxxxxxx xxxxyyww downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 16 ? 2008 microchip technology inc. 8-lead plastic dual flat, no lead package (mf) C 6x5 mm body [dfn-s] punch singulated notes: 1. pin 1 visual index feature may vary, but must be located within the hatched area. 2. package may have one or more exposed tie bars at ends. 3. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millimeters dimension limits min nom max number of pins n 8 pitch e 1.27 bsc overall height a C 0.85 1.00 molded package thickness a2 C 0.65 0.80 standoff a1 0.00 0.01 0.05 base thickness a3 0.20 ref overall length d 4.92 bsc molded package length d1 4.67 bsc exposed pad length d2 3.85 4.00 4.15 overall width e 5.99 bsc molded package width e1 5.74 bsc exposed pad width e2 2.16 2.31 2.46 contact width b 0.35 0.40 0.47 contact length l 0.50 0.60 0.75 contact-to-exposed pad k 0.20 C C model draft angle top C C 12 note 2 a 3 a2 a1 a note 1 note 1 exposed pad bottom vie 1 2 d2 2 1 e2 k l n e b e e1 d d1 n top vie microchip technology drawing c04-113b downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 17 mcp14e3/mcp14e4/mcp14e5 8-lead plastic dual in-line (p) C 300 mil body [pdip] notes: 1. pin 1 visual index feature may vary, but must be located with the hatched area. 2. significant characteristic. 3. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010" per side. 4. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units inches dimension limits min nom max number of pins n 8 pitch e .100 bsc top to seating plane a C C .210 molded package thickness a2 .115 .130 .195 base to seating plane a1 .015 C C shoulder to shoulder width e .290 .310 .325 molded package width e1 .240 .250 .280 overall length d .348 .365 .400 tip to seating plane l .115 .130 .150 lead thickness c .008 .010 .015 upper lead width b1 .040 .060 .070 lower lead width b .014 .018 .022 overall row spacing eb C C .430 n e1 note 1 d 12 3 a a1 a2 l b1 b e e e b c microchip technology drawing c04-018b downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 18 ? 2008 microchip technology inc. 8-lead plastic small outline (sn) C narrow, 3.90 mm body [soic] notes: 1. pin 1 visual index feature may vary, but must be located within the hatched area. 2. significant characteristic. 3. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.15 mm per side. 4. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millimeters dimension limits min nom max number of pins n 8 pitch e 1.27 bsc overall height a C C 1.75 molded package thickness a2 1.25 C C standoff a1 0.10 C 0.25 overall width e 6.00 bsc molded package width e1 3.90 bsc overall length d 4.90 bsc chamfer (optional) h 0.25 C 0.50 foot length l 0.40 C 1.27 footprint l1 1.04 ref foot angle 0 C 8 lead thickness c 0.17 C 0.25 lead width b 0.31 C 0.51 mold draft angle top 5 C 15 mold draft angle bottom 5 C 15 d n e e e1 note 1 12 3 b a a1 a2 l l1 c h h microchip technology drawing c04-057b downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 19 mcp14e3/mcp14e4/mcp14e5

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mcp14e3/mcp14e4/mcp14e5 ds22062b-page 20 ? 2008 microchip technology inc. notes: downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 21 mcp14e3/mcp14e4/mcp14e5 appendix a: revision history revision b (april 2008) the following is the list of modifications: 1. correct examples in product identification system page. revision a (september 2007) original release of this document. downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 22 ? 2008 microchip technology inc. notes: downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 23 mcp14e3/mcp14e4/mcp14e5 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: mcp14e3: 4.0a dual mosfet driver, inverting mcp14e3t: 4.0a dual mosfet driver, inverting tape and reel mcp14e4: 4.0a dual mosfet driver, non-inverting mcp14e4t: 4.0a dual mosfet driver, non-inverting tape and reel mcp14e5: 4.0a dual mosfet driver, complementary mcp14e5t: 4.0a dual mosfet driver, complementary tape and reel temperature range: e = -40c to +125c package: * mf = dual, flat, no-lead (6x5 mm body), 8-lead p = plastic dip, (300 mil body), 8-lead sn = plastic soic (150 mil body), 8-lead * all package offerings are pb free (lead free) examples: a) mcp14e3-e/mf: 4.0a dual inverting mosfet driver, 8ld dfn package. b) mcp14e3-e/p: 4.0a dual inverting mosfet driver, 8ld pdip package . c) mcp14e3-e/sn: 4.0a dual inverting mosfet driver, 8ld soic package . a) mcp14e4-e/mf: 4.0a dual non-inverting mosfet driver, 8ld dfn package. b) mcp14e4-e/p: 4.0a dual non-inverting mosfet driver, 8ld pdip package . c) mcp14e4t-e/sn: tape and reel, 4.0a dual non-inverting mosfet driver, 8ld soic package . a) mcp14e5t-e/mf: tape and reel, 4.0a dual complementary mosfet driver, 8ld dfn package. b) mcp14e5-e/p: 4.0a dual complementary mosfet driver, 8ld pdip package . c) mcp14e5-e/sn: 4.0a dual complementary mosfet driver, 8ld soic package . part no. x xx package temperature range device downloaded from: http:///
mcp14e3/mcp14e4/mcp14e5 ds22062b-page 24 ? 2008 microchip technology inc. notes: downloaded from: http:///
? 2008 microchip technology inc. ds22062b-page 25 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pro mate, rfpic and smartshunt are registered trademarks of microchip te chnology incorporated in the u.s.a. and other countries. filterlab, linear active thermistor, mxdev, mxlab, seeval, smartsensor and the embedded control solutions company are registered tradema rks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, application maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, in-circuit serial programming, icsp, icepic, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, pickit, picdem, picdem.net, pictail, pic 32 logo, powercal, powerinfo, powermate, powertool, real ice, rflab, select mode, total endurance, uni/o, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2008, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchips c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the companys quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001:2000 certified. downloaded from: http:///
ds22062b-page 26 ? 2008 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://support.microchip.com web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 kokomo kokomo, in tel: 765-864-8360 fax: 765-864-8387 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8528-2100 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-4182-8400 fax: 91-80-4182-8422 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-572-9526 fax: 886-3-572-6459 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 w orldwide s ales and s ervice 01/02/08 downloaded from: http:///

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