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for further information contact your local stmicroelectronics sales office. september 2012 doc id 023548 rev 2 1/11 11 EVAL6474PD stepper motor driver mounting the l6474 in a high power powerso package data brief features voltage range from 8 v to 45 v phase current up to 3 a r.m.s. spi with daisy chain feature socket for external resonator or crystal flag led indicator suitable for use in combination with steval- pcc009v2 description the EVAL6474PD demonstration board is a microstepping motor driver. in combination with the steval-pcc009v2 communication board and easyspin evaluation software, the board allows the user to investigate all the features of the l6474 device. the 4-layer layout and the powerso? package allow the highest thermal performance to be obtained. the EVAL6474PD supports the daisy chain configuration making it suitable for the evaluation of the l6474 in multi-motor applications. www.st.com
board description EVAL6474PD 2/11 doc id 023548 rev 2 1 board description figure 1. jumper and connector location table 1. EVAL6474PD specifications parameter value supply voltage (vs) 8 to 45 v maximum output current (each phase) 3 a r.m.s. logic supply voltage (vreg) externally supplied: 3.3 v internally supplied: 3 v typical logic interface voltage (vdd) externally supplied: 3.3 v or 5 v internally supplied: vreg low level logic input voltage 0 v high level logic input voltage vdd (1) 1. all logic inputs are 5 v tolerant. operating temperature -25 to +125 c l6474pd thermal resistance junction-to-ambient 12 c/w typical ph as e a connector power su pply connector ( 8 v - 45 v) m as t er s pi connector s ync o u tp u t flag led (red) jp1: vdd su pply from m as ter s pi connector jp2: vdd to vreg connection o s cin/o s cout connector jp 3 : d a i s y ch a in jp5: dir to s l a ve b o a rd jp6: s tck to s l a ve b o a rd termin a tion ph as e b connector s l a ve s pi connector applic a tion referenc e a re a am14 8 66v1
EVAL6474PD board description doc id 023548 rev 2 3/11 table 2. jumper and connector description name type function m1 power supply motor supply voltage m2 power output bridge a outputs m3 power output bridge b outputs cn1 spi connector master spi cn2 spi connector slave spi cn3 nm connector oscin and oscout pins cn4 nm connector sync output tp1 (vs) test point motor supply voltage test point tp2 (vdd) test point logic interface supply voltage test point tp6 (vreg) test point logic supply voltage/l6474 internal regulator test point tp4 tp5 (gnd) test point ground test point tp8 (stck) test point step-clock input test point tp3 (dir) test point busy/sync output test point tp9 (stby/res) test point standby/reset input test point tp7(flag) test point flag output test point table 3. master spi connector pinout (cn1) pin number type description 1 open drain output l6474 direction input 2 open drain output l6474 flag output 3 ground ground 4 supply ext_vdd (can be used as external logic power supply) 5 digital output spi master in slave out signal (connected to l6474 sdo output through daisy chain termination jumper jp2) 6 digital input spi serial clock signal (connected to l6474 ck input) 7 digital input spi master out slave in signal (connected to l6474 sdi input) 8 digital input spi slave select signal (connected to l6474 cs input) 9 digital input l6474 step-clock input 10 digital input l6474 standby/reset input
board description EVAL6474PD 4/11 doc id 023548 rev 2 table 4. slave spi connector pinout (cn2) pin number type description 1 open drain output l6474 direction input 2 open drain output l6474 flag output 3 ground ground 4 supply ext_vdd (can be used as external logic power supply) 5 digital output spi master in slave out signal (connected to pin 5 of j10) 6 digital input spi serial clock signal (connected to l6474 ck input) 7 digital input spi master out slave in signal (connected to l6474 sdo output) 8 digital input spi slave select signal (connected to l6474 cs input) 9 digital input l6474 step-clock input 10 digital input l6474 standby/reset input
EVAL6474PD board description doc id 023548 rev 2 5/11 figure 2. EVAL6474PD schematic vdd vreg v s s pi_in s pi_out gnd applic a tion reference flag dir s tby/re s s tck 1a 2a 1b 2b v s gnd s ync option gnd s tck dir nc s ck s di s do adcin dir flag ck nc s s tby_re s et s tck mi s o s di s tby_re s et s do mi s o ck flag s tby_re s et nc s s do mi s o s tck dir flag v s vreg vdd vreg vdd vdd vreg ext_vdd v s ext_vdd vreg vdd ext_vdd vdd vdd v s tp 3 1 m1 1 2 + c1 100 u f/6 3 v jp 3 1 2 c7 10 u f/6. 3 v jp5 1 2 cn2 1 2 3 4 5 6 7 8 9 10 tp1 1 cn4 n.m. 1 m2 1 2 r5 3 9k c 3 10nf/50v c6 100nf/50v tp4 1 c5 47 u f/6. 3 v c11 1nf/6. 3 v c 8 220nf/16v m 3 1 2 cn 3 n.m. 1 2 c12 3 . 3 nf/6. 3 v tp5 1 c15 100nf/50v dl1 red 2 1 jp4 1 2 tp 8 1 r1 3 9k c1 3 100nf/50v tp2 1 tp7 1 c14 100nf/50v r4 3 9k tp6 1 tp9 1 jp1 1 2 + c1a 100 u f/6 3 v r2 470 d1 bav99 1 2 3 c10 1nf/6. 3 v c2 100nf/50v r 3 3 9k u1 l6474pd vdd 24 vreg 9 o s cin 10 o s cout 11 cp 1 3 vboot 14 adcin 8 v s a 4 v s a 5 v s b 15 v s b 16 pgnd 1 out1a 2 out2a 3 5 out1b 17 out2b 20 agnd 12 dir 7 dgnd 2 8 s ync 29 flag 3 1 s do 25 s di 27 ck 26 c s 3 0 s tby_re s 6 s tck 3 2 out1a 3 out1b 1 8 out2b 21 out2a 3 6 v s b 22 v s b 2 3 v s a 33 v s a 3 4 pgnd 19 e_pad ep c4 100nf/50v jp2 1 2 tr1 50k 1 3 2 c9 1nf/6. 3 v cn1 1 2 3 4 5 6 7 8 9 10 am14 8 67v1
board description EVAL6474PD 6/11 doc id 023548 rev 2 table 5. bill of material index quantity reference value package 1 1 c1 220 nf/16 v capc-0603 2 1 c2 47 f/6.3 v capc-3216 3 1 c3 100 nf/6.3 v capc-0603 4 1 c4 10 f/4 v capc-3216 5 1 c5 100 nf/4 v capc-0603 6 4 c6, c7, c8, c10 100 nf/50 v capc-0603 7 1 cn1 10-pole polarized idc male header 2.54 mm vertical black con-flat-5x2-180m 8 1 cn2 10-pole polarized idc male header 2.54 mm vertical gray con-flat-5x2-180m 9 1 cn3 n.m strip254p-m-2 10 1 cn4 n.m tpth-ring-1mm 11 1 c1a 100 uf/63 v cape-r10hxx-p5 12 1 c1 100 uf/63 v capes-r10hxx 13 6 c2,c4,c6,c13,c14 ,c15 100 nf/50 v capc-0603 14 1 c3 10 nf/50 v capc-0603 15 1 c5 47 uf/6.3 v capc-1206 16 1 c7 10 uf/6.3 v capc-0805 17 1 c8 220 nf/16 v capc-0603 18 3 c9, c10, c11 1 nf/6.3 v capc-0603 19 1 c12 3.3 nf/6.3 v capc-0603 20 1 dl1 led red ledc-0805 21 1 d1 bav99 sot-23 22 1 jp1 jumper open jp2so 23 4 jp2, jp3, jp4, jp5 jumper closed jp2so 24 3 m1, m2, m3 screw connector 2 poles morsv-508-2p
EVAL6474PD board description doc id 023548 rev 2 7/11 figure 3. EVAL6474PD - silkscreen figure 4. EVAL6474PD - layout (top layer) am14 8 6 8 v1 am14 8 69v1
board description EVAL6474PD 8/11 doc id 023548 rev 2 figure 5. EVAL6474PD - layout (inner layer2) figure 6. EVAL6474PD - layout (inner layer3) am14 8 70v1 am14 8 71v1
EVAL6474PD board description doc id 023548 rev 2 9/11 1.1 thermal data figure 7. EVAL6474PD - layout (bottom layer3) am14 8 72v1 figure 8. thermal impedance graph 10 1 100 1000 zth time ( s econd s ) 25 20 15 10 5 zth 0 ( c/w) am14 8 7 3 v1
revision history EVAL6474PD 10/11 doc id 023548 rev 2 2 revision history table 6. document revision history date revision changes 07-aug-2012 1 initial release. 07-sep-2012 2 in cover page, dspin has been changed into easyspin.
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