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lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 1 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 description the lx1677 is a highly integrated vrm power supply controller ic featuring two pwm switching regulator stages. the two constant frequency voltage-mode pwm phases are configured as a single biphase high current output core supply. in biphase operation, the high current (>35a) output is generated by a loadshare tm ? technique that balances the currents in the two phases. power loss and noise, due to the esr of the input capacitors, are minimized by operating the pwms 180 out of phase. a synchronized transient correction loop? provides exceptional control of the output droop and overshoot during very high di/dt load changes, the circuit can be configured for droop only, overshoot only or both. this architecture also minimizes capacitor requirements while maximizing regulator response. a true differential input amplifier is used for remote voltage sensing at the processor core. a vid code generator provides an internal reference that will set the output voltage. this vid code can be changed during operation and the reference will slew the output voltage to its new setting at a preset rate. during vid changes on the fly the power good indication will stay valid. the current through the lower phase 1 mosfet will be sampled using its r ds(on) for current limit and shut down. for further protection, an over voltage circuit will trip at a specified setting and clamp the output by turning off the upper mosfets and turning on the lower mosfets. the upper mosfet drivers use a bootstrap capacitor to provide the upper drive voltage over the input voltage range of 6 to 24 volts. important: for the most current data, consult microsemi ?s we bsite: http://www.microsemi.com ? patent numbers us6292378,us6285571,us6356063, us6605931 key features ? high current biphase operation ? outputs as low as 0.800v ? ? biphase loadshare tm ? ? transient correction loop reduces required capacitance ? differential amplifier for remote voltage sensing ? integrated high current mosfet drivers ? 200khz to 1mhz frequency operation ? programmable slew rate control for start-up sequence and vid change ? vid changes on the fly ? power good indicator ? short circuit protection ? output over voltage and under voltage protection ? no current-sense resistors applications ? amd athlon 64? and amd opteron? processors ? processor core voltage supply ? voltage regulator modules product highlight lx1677 5 bit vid 70nh transient corection loop vin 6 to 24 v vin 6 to 24 v vout vin +5 v package order info t j ( c) pw plastic tssop 38-pin lq plastic mlpq 38-pin 0 to 70 lx1677-cpw lx1677-clq note: available in tape & reel. append the letter ?t? to the part number. (i.e. lx1677-clqt) l l x x 1 1 6 6 7 7 7 7
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 2 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 absolute maximum ratings supply input voltage (vcc l, vcc)................................................-0.3v to 6.0v battery input voltage (vin) ..............................................................-0.3v to 36v current limit sense (ilim1, ilim3) ................................................-0.3v to 36v topside driver supply input volta ge (vc1, vc2, vc3)........ -0.3 to vs x + 6.0v topside driver return input voltage (vs1, vs2)................................-5v to 36v differential sense input voltage (fb+, fb-)....................................-0.3v to 6.0v vid0 ? vid4, input vo ltage ...............................................................-0.3v to 6v high side driver peak (<500 ns) current (ho1/2, i-max) ............................+ 1a low side driver peak (<500ns) sink current (lo1/2, i-min)....................+ 1.5a operating junction temperature.................................................................. 150 c storage temperat ure range...........................................................-65 c to 150 c lead temperature (solde ring 10 seconds) .................................................. 300 c note: exceeding these ratings could cause damage to the device. all voltages are with respect to ground. currents are positive into, negative out of specified terminal . x denotes respective pin designator 1, 2, or 3 thermal data lq plastic mlpq 38-pin thermal resistance - junction to c ase , jc 8 c/w thermal resistance - junction to a mbient , ja 35 c/w pw plastic tssop 38-pin thermal resistance - junction to c ase , jc 12.2 c/w thermal resistance - junction to a mbient , ja 38 c/w junction temperature calculation: t j = t a + (p d x ja ). the ja numbers are guidelines for the thermal performan ce of the device/pc-board system. all of the above assume no ambient airflow. package pin out 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 fb- dfout eo1 ea1- dacout pwgd gnd rosc ena vid4 vid3 pgn3 i-min vccl lo2 pgn lo1 vs1 ho1 vc1 vc3 i-max ilim3 ilim1 lp1 lp2 ea2- eo2 fb+ vid2 vid1 vid0 vs2 ho2 vc2 vcc vin vs3 connect bottom to power gnd lq p ackage (top view) 1 19 38 20 fb- dfout eo1 ea1- dacout pwgd gnd vin rosc ena vid4 vid3 vid2 vid1 vid0 vs2 h02 vc2 vcc pgn3 i-min vccl lo2 pgn lo1 vc1 vc3 vs3 ilim3 ilim1 lp1 lp2 ea2- eo2 fb+ vs1 ho1 i-max pw p ackage (top view) recommended operating conditions lx1677 parameter symbol min typ max units ` ic input supply voltage vcc 4.5 5.5 v battery input voltage vin 5.7 25.2 v biphase topside driver return voltage vs1, vs2 0 25.2 v transient correction phase driver return voltage vs3 0 5.5 v p p a a c c k k a a g g e e d d a a t t a a
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 3 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 functional pin description name description fb+ differential amplifier positive input ? feedback from output fb- differential amplifier negative input ? feedback from output dfout differential amplifier output ea1- phase 1 error amplifier negative input eo1 phase 1 error amplifier output gnd analog ground rosc a resister to ground sets pwm frequency ena enable input ? logic low disables all converter phases dacout dac output voltage ? 50ua bi-directional current source vid4 digital input for vid code ? has an internal pull-up resister vid3 digital input for vid code ? has an internal pull-up resister vid2 digital input for vid code ? ha s an internal pull-up resister vid1 digital input for vid code ? has an internal pull-up resister vid0 digital input for vid code ? has an internal pull-up resister pwgd power good output pin ? open drain output pin for power good indication. high = power good vcc ic supply voltage. nominal +5v vc3 supply for transient correction phas e upper mosfet driver, bootstrap voltage pgn3 power ground pin for transient correction loop driver i-min output driver for lower transient correction loop mosfet vs3 low side of upper driver for transient co rrection loop ? mosfet driver power return i-max output driver for upper tr ansient correction loop mosfet ilim3 transient correction loop current sense ? a resister se ts an upper limit for over current detection and shut down. lp1 phase 2 differential amplifier positive input, filtered feedback from phase 1 output ea2- negative input of phase 2 integrating amplifier eo2 output of phase 2 in tegrating amplifier lp2 phase 2 differential amplifier negative input, filtered feedback from phase 2 output vin battery voltage input. lo2 driver output for phase 2 lower mosfet vs2 low side of upper gate driver for phase 2. ho2 driver output for phase 2 upper mosfet vc2 supply for phase 2 upper mo sfet driver, bootstrap voltage pgn power ground pin for current sensing of lower mosfet r ds(on) for phase 1. lo1 driver output for phase 1 lower mosfet ilim1 over-current limit set ? a resister sets an up per limit for over current detection and shut down. vs1 low side of upper gate driver for phase #1. ho1 driver output for phase 1 upper mosfet vc1 supply for phase 1 upper mo sfet driver, bootstrap voltage vccl voltage bus for the lower mosfet drivers. nominal +5v p p a a c c k k a a g g e e d d a a t t a a
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 4 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 electrical characteristics unless otherwise specified, the following specificati ons apply over the operat ing ambient temperature 0 c t a 70 c except where otherwise noted and the following test conditions: vcc = 5v, vccl = 5v, vin = 12v, switching frequency = 500khz. lx1677 parameter symbol test conditions min typ max units ` regulator ena = vcc, fb+ = fb- 1 5 9 ma ic supply current i q(vcc) ena = gnd 1 a low side driver operating current i q(vccl) ena = vcc, fb+ = fb- 0.5 1 ma high side driver operating current i q(vc x ) ena = vcc, fb+ = fb- 2 4 ma ` error amplifier: phase 1 input offset voltage v os common mode voltage (v cm ) = 1.4v -6 6 mv input bias current i ea1 -100 100 na dc open loop gain 60 70 db input common mode range v icm cmrr > 50db 0.8 2.5 v v eo1(max) i ea1 = 2ma 4.0 output voltage swing v eo1(min) i ea1 = -20ua 0.15 0.5 v unity gain bandwidth ugbw 20 mhz ` differential amplifier input offset voltage v os v cm =1.4v -6 6 mv gain a da 0.99 1 1.01 v/v common mode rejection ratio cmrr da 0.8v < v cm < 2.5v 65 db input resistance r in measured at fb+ input 30 k ? input common mode range v cm 0 3 v source / sink current v dfout = 0v 5 ma v dfout(max) i dfout = 2ma 4.0 output voltage swing v dfout (min) i ea1 = -20ua 0.2 v unity gain bandwidth ugbw 10 mhz slew rate sr 5 v/ s ` oscillator maximum clock frequency f max r pwm =10k ? 0.9 1 1.1 mhz minimum clock frequency f min r pwm =50k ? 150 200 220 khz frequency stability 4 % ` pwm output during transient correction switching 100 maximum duty cycle dc max transient correction not switching 40 50 % minimum pulse width t pwm(min) 3000pf load 60 ns dead time 3000pf load at 50% of vccl 50 80 200 ns vin = 6v 0.70 vin = 12 1.40 ramp amplitude v ramp vin = 24 v 2.80 v ` phase 2 integrating amplifier input offset voltage v os v cm =1.4v -6 6 mv dc open loop gain 70 db v eo2(max) i ea2 = 2ma 4.0 output voltage swing v eo2(min) i ea2 = -20ua 0.15 0.5 v unity gain bandwidth ugbw 20 mhz e e l l e e c c t t r r i i c c a a l l s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 5 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 electrical characteristics (cont) unless otherwise specified, the following specificati ons apply over the operat ing ambient temperature 0 c t a 70 c except where otherwise noted and the following test conditions: vcc = 5v, vccl = 5v, vin = 12v, switching frequency = 500khz. lx1677 parameter symbol test conditions min typ max units ` phase 2 differential amplifier input offset voltage v os lp1=lp2 -6 6 mv gain a da 0.98 1 1.02 v/v common mode rejection ratio cmrr da common mode voltage = 0 to 2 v 60 db input resistance r b 180 k ? unity gain bandwidth ugbw 4 mhz ` transient control loop voltage droop sense propagation delay : fb+ and fb- to i-max 50 ns voltage overshoot sense propagation delay : fb+ and fb- to i-min 50 ns voltage droop sense threshold v dfout rising 3000pf load 40 mv voltage overshoot sense threshold v dfout falling 3000pf load 40 mv ` output drivers driver ? rise time ? fall time t rise t fall cl = 3000pf, vc x - vs x = 5v 50 50 ns high side driver voltage: [v ho x - v vs x ] ? drive high ? drive low v ho x = 20ma, vc x - vs x = 5.0 v v ho x = -20ma, vc x - vs x = 5.0 v 4.8 4.9 0.1 0.2 v low side driver voltage: [v lo x ? v pgn ] ? drive high ? drive low v lo x = 20ma, vccl - vpgn = 5.0 v v lo x = -20ma, vccl - vpgn = 5.0 v 4.8 4.9 0.1 0.2 v high side driver current i ho x vc x - vs x = 5.0 v, load = 3300pf at <500nsec 1 a lower mosfet driver current i lo x vccl - pgn = 5.0 v, load = 3300pf at <500nsec 1.5 a ` phase 1 over current protection current sense bias current i ilim1 44 50 60 a current sense delay t csd(ilim1) 200 400 500 ns ` transient correction loop over current protection current sense bias current i ilim3 40 50 60 a current sense delay t csd(ilim3) 200 400 500 ns ` enable input / voltage identification (vid) logic low threshold 1.5 v hysteresis 0.3 v pullup resistance 100 k ? ` power good low output voltage v pwgd i pwgd = -3ma 0.5 v e e l l e e c c t t r r i i c c a a l l s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 6 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 electrical characteristics (cont) unless otherwise specified, the following specificati ons apply over the operat ing ambient temperature 0 c t a 70 c except where otherwise noted and the following test conditions: vcc = 5v, vccl = 5v, vin = 12v, switching frequency = 500khz. lx1677 parameter symbol test conditions min typ max units ` uvlo vcc ? threshold ? hysteresis vcc rising 4.2 0.3 vin ? threshold ? hysteresis vin rising 5.5 0.3 v ` over voltage protection over voltage threshold - 1.85 v ` under voltage protection under voltage threshold 0.725 v ` dac 1 v dacout 1.4 1 initial dacout accuracy 0.925 v dacout < 1 1.4 < v dacout 2 2 % high side driver current i ho x vc x - vs x = 5.0 v, load = 3300pf at <500nsec 1 a lower mosfet driver current i lo x vccl - pgn = 5.0 v, load = 3300pf at <500nsec 1.5 a vid logic high threshold 0.5 1.3 2 v vid hysteresis 0.3 v voltage identification (vid) code vid[4:0] v out (v) vid[4:0] v out (v) 00000 1.550 10000 1.150 00001 1.525 10001 1.125 00010 1.500 10010 1.100 00011 1.475 10011 1.075 00100 1.450 10100 1.050 00101 1.425 10101 1.025 00110 1.400 10110 1.000 00111 1.375 10111 0.975 01000 1.350 11000 0.950 01001 1.325 11001 0.925 01010 1.300 11010 0.900 01011 1.275 11011 0.875 01100 1.250 11100 0.850 01101 1.225 11101 0.825 01110 1.200 11110 0.800 01111 1.175 11111 shutdown e e l l e e c c t t r r i i c c a a l l s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 7 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 simplified block diagram 1 38 5 15 6 8 9 7 22 28 27 26 25 24 18 17 16 23 34 35 29 30 31 21 20 + - 2 0.85 2.35 + - 4 3 + - uv ov band- gap uvlo vcc vin + - r s s r gm 37 36 imax imin 10 gnd vcc rosc v in pwgd vid_4 vid_3 vid_2 vid_1 vid_0 dacout fb + fb - vccl vc1 ho1 lo1 vs1 pgn ho2 vs2 lo2 vccl pgood srs s s 0 lp2 lp1 ena ena vc3 i-max vs3 i-min pgn3 eo1 ea1 - dfout eo2 ea2 - 50 a vc2 + - + - bandgap 180 dacout - 30mv + + + _ _ 35mv offset dacout dac amp frq osc v in 180 0 + _ _ + 19 14 13 12 11 diff amp phase 1 error amp phase 2 differential amp phase 2 integrating amp s dacout 35mv offset 100k 90k 90k 90k 90k por pgood q q i-max i-max i-min i-min ilim ilim 32 33 ilim ilim3 ilim1 pgn vs3 fault _ e e l l e e c c t t r r i i c c a a l l s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 8 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 application circuits c4 0.22 +5vp vbat +5vp vbat +5vp +5vp +5vp +5vp +5vp vbat vbat vbat vbat batt rtn +batt in +5 rtn +5 vin 25v 25v 25v 25v 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v 25v 25v enable vid 0 vid 0 vid 0 vid 0 vid 0 pwrgd 6.3v 25v 25v 25v 25v 25v 25v 25v rtn vcore 2v 2v c2 4700pf l1 2.2uh q7 nds7002a c5 0.22 r4 6.04k cr5 1n5817 c34 10uf r12 100k + c19 270uf r8 100k l2 2.2uh c6 0.22 q1 si4842dy r3 61.9k r19 10k cr4 1n5817 c13 4.7uf c22 10uf + c21 270uf cr2 sk32 c3 4700pf r1 2.00k cr1 sk32 q12 n/u c32 10uf r13 100k c9 4700pf r7 4.02k q6 irlr8203 c15 10uf q4 irlr8203 c16 10uf r10 1.00k c26 0.22uf r2 61.9k c17 10uf c30 10uf l3 70nh u1 lx1677 lq fb- 1 dfout 2 eo1 3 ea1- 4 dacout 5 pwrgd 6 gnd 7 vin 8 rosc 9 ena 10 vid4 11 vid3 12 vid2 13 vid1 14 vid0 15 vs2 16 ho2 17 vc2 18 vcc 19 vs3 31 i-max 30 vc3 29 vc1 28 ho1 27 vs1 26 lo1 25 pgn 24 lo2 23 vccl 22 i-min 21 pgn3 20 fb+ 38 eo2 37 ea2- 36 lp2 35 lp1 34 ilim 33 ilim3 32 c35 10uf q13 irlr8203 c36 10uf c1 4700pf r14 100k + c18 270uf c11 47uf 6.3v 2v c10 10uf c25 4.7uf q2 si4842dy c33 10uf r9 45.3k r22 1.00k r6 10.0 c24 4.7uf q10 n/u q3 irlr8203 c28 10uf 25v r5 4.02k q5 irlr8203 c23 10uf c8 4.7uf c7 4.7uf c14 4.7uf r15 100k c29 10uf 25v c12 47uf c31 10uf r11 100k 2v r23 1.00k cr3 1n5817 + c20 270uf q8 nds7002a q11 irlr8203 figure 2 ? typical vrm application a a p p p p l l i i c c a a t t i i o o n n s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 9 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 theory of operation g eneral d escription the lx1677 is a voltage-mode pulse-width modulation controller integrated circuit. the pwm frequency is programmable from 200khz to 1mhz. the device has external compensation, for more flexibility of the loop response. the lx1677 also makes use of a true differential input amplifier for remote voltage sensing at the actual processor core. this is a very important feature now that the core voltages are in the 1 to 2 volt range. the reference for the biphase pwm output is a 5 bit vid code dac. the vid code dac can generate a reference voltage of 0.925 to 2.000 volts. the output of the dac is a bi-directional current source and is conn ected to the dacout pin. connecting a capacitor from this pin to ground will generate a linear ramp, which will determine the rate of change of the output voltage. the rate of change can be set so that the current required to charge the total output capacitance is below the maximum current limit trip point. this will allow vid changes on the fly without tripping the over current sensor. p ower up and i nitialization at power up, the lx1677 monitors the supply voltage to vcc and vin, before both supplies reach their under- voltage lock-out (uvlo) thresholds, a power on reset condition will prevent soft-start from beginning, the oscillator is disabled and all mosfets are kept off. s oft -s tart once the supplies are above the uvlo threshold and the enable pin is brought high, the soft-start capacitor begins to be charged up by the reference dac through the dacout pin. the capacitor voltage at the dacout pin rises as a linear ramp. the dacout pin is connected to the error amplifier?s non-inverting input which controls the output voltage. the output voltage will follow the dacout pin voltage. phase 3 (hysteretic phase) is disabled during soft-start. o ver -c urrent p rotection there are two separate current limit circuits in the lx1677. one looks at the phase 1 lower mosfet drain current and the second looks at the phase 3 upper mosfet drain current. both circuits have a 400 ns delay before a current limit command is issued to the current limit latch, once set the current limit latch will hold all three phases off until it is reset. the over-current protection is disabled during positive vid changes. to reset the current limit latch either the enable command (ena) must be cycled low th en back high or the input power must cycle off and then back on. o ver -c urrent p rotection (p hase 1) the phase 1 current limit us es the rds(on) of the lower mosfet, together with a resistor (rset) to set the actual current limit point. the current limit comparator senses the current 400 ns after the lower mosfet is switched on. a current sour ce supplies a current (iset), of 50a which flows into rset and determines the current limit trip point. the value of rset is selected to set the current limit for the application. phase 1 rset is calculated by: a 50 r ilimit r ds(on) set ? = the current limit comparator will trip when the drop across rset equals the drop across the lower mosfet rds(on)., at this time the comparator outputs a signal to set the i limit latch and removes the enable command. the over-current sensing is done on phase 1 only because phase 2 current is always being forced to equal the phase 1 current, therefore the current trip point is set at half of the desired current limit. for an output current limit setting of 30 amps, the current trip point for phase 1 is set at 15 amps. when the phase 1 over current latch is set all three phases are disabled, all mosfets are turned off. vout 50 ua + _ r set q2 q2 current flow + + _ _ iout current limit comparator q1 vin r ds(on) 400nsec delay figure 3 ? phase 1 current limit the delay before current limit is activated will result in current pulses exceeding the calculated values during the delay period if a short circuit is applied during that time. a a p p p p l l i i c c a a t t i i o o n n s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 10 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 theory of operation (continued) o ver -c urrent p rotection (p hase 3) the hysteretic phase has its own current limit protection because with it?s very fast response time with a 100 nh inductor the upper mosfet cannot be allowed to stay on during an output short circuit condition. the phase 3 over- current sensing uses the rds(on) of the upper mosfet with a resistor rset to determine the over current limit point. a current source draws 50ua through rset which determines the required drop across the mosfet rds(on) to initiate a current limit condition. 50 ua + _ r set q2 + + _ _ current limit comparator q1 vin r ds(on) vout 400ns delay ilim3 vs3 figure 4 ? phase 3 current limit phase 3 rset is calculated by: ua 50 rdson ilimit rset ? = o ver v oltage p rotection an over voltage protection circuit monitors the output voltage and will latch all three phases off if an over voltage condition (greater than 2.35 v) is detected. both mosfets for phase 3 will be held off and the lower mosfets for phase 1 and 2 will be held on to discharge the output capacitor till the output voltage drops below .85 volt, at .85 volts all mosfets will be turned off. f ault l ogic there are a number of possible states that will cause a fault condition that will disable the output mosfet drivers. a fault condition will be caused by the following: ? enable (ena) pin being pulled low ? over-current condition on either phase 1 or phase 3 ? over voltage output > 1.85v ? under voltage output < 0.725v in all cases except over voltage all mosfet drivers will be latched off. for an over voltage fault the lower mosfets for phase 1 and 2 will be held on to discharge the bulk capacitance on the output till a lower limit of 0.725 volts is reached then all mosfets will be turned off. to reset a fault it necessary to cycle the ena pin low then back high or remove and reapply the input voltage vin. the under voltage monitor is not enabled until the output voltage has ramped up to the level commanded by the dacout pin and the pwgd output in high. pwm f requency an external resistor sets the pwm frequency from the rosc pin to ground. the equation for rosc is: () 9 e 100 f k 1 rosc ? + ? = where rosc is in ? , f is in hz, k=105e-12 a a p p p p l l i i c c a a t t i i o o n n s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 11 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 theory of operation (continued) t heory of o peration for a b i -p hase , l oad share tm c onfiguration the basic principle used in loadshare tm in a multiple phase buck converter topology is that if multiple, identical, inductors have the same iden tical voltage impressed across their leads, they must then ha ve the same identical current passing through them. the current that we would like to balance between inductors is mainly the dc component along with as much as possible the transient current. all inductors in a multiphase buck converter topology have their output side tied together at the output filter capacitors. therefore this side of all the inductors has the same identical voltage. if the input side of the inductors can be forced to have the same equivalent dc potential on this lead, then they will have the same dc current flowing. to achieve this requirement, phase 1 will be the control phase that sets the output operating voltage, under normal pwm operation. to force the current of phase 2 to be equal to the current of phase 1; a second feedback loop is used. phase 2 has a low pass filter connected from the in put side of each inductor. this side of the inductors has a square wave signal that is proportional to its duty cycle. the output of each lpf is a dc (+ some ac) signal that is proportional to the magnitude and duty cycle of its respective inductor signal. the second feedback loop will use the output of the phase 1 lpf as a reference signal for an error amplifier that will compare this reference to the output of the phase 2 lpf. this error signal will be amplified and used to control the pwm circuit of phase 2. therefore, the duty cycle of phase 2 will be set so that the equivalent voltage potential will be forced across the phase 2 inductor as compared to the phase 1 inductor. this will force the current in the phase 2 inductor to follow and equal the phase 1 inductor current. with the loadshare tm topology it is possible to imbalance the phases so that one phase will supply more current than the other under unique situations. the lx1677 will normally be used with the same supply voltages on phase 1 and 2 pwm inputs and will have equal currents in both phases. + - lp2 lp1 phase 1 comparator + _ + _ + - gm phase 2 comparator 0 180 phase 2 integrating amp differential amp + - dc bias phase 1 error amp + - pwm pwm ho1 ea - eo2 lo1 lo2 ho2 phase 1 low pass filter phase 2 low pass filter vout dc bias dc bias dacout differential feedbach from vout phase 1 diff amp ramp .75 v to 3 v both pwms figure 5 ? loadshare control loop a a p p p p l l i i c c a a t t i i o o n n s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 12 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 theory of operation (continued) l oop g ain a utomatic compensation the pwm ramp shown in figure 5 is automatically adjusted to keep its amplitude a fixed percentage of vin over the range of 6 to 24 v input. this maintains a constant loop gain that is set by the feedback networks around the error amplifiers independent of pwm input voltage. t ransient c orrection l oop phase 3 is a transient correction loop that can sum a large amount of current into the output node when required by an out of range condition. the differential feedback summing amplifier is connected directly to the output terminals and has sufficient bandwidth to follow any fast changes in output voltage. th e feedback error voltage is compared to the commanded reference voltage (dacout) by two high speed comparators, i-max and i-min. the other inputs of these comparators are offset from the dacout as shown in fig 6. if the error in output voltage exceeds the offset in either direction the appropriate mosfet will be turned on to fo rce current into or out of the output node to correct the voltage error. the very low value inductor (100nh) allows large amounts of current to be forced into or out of the output node very quickly. when the transient correction loop is switching it forces the appropriate upper or lower mosfets in phases 1 and 2 to stay on (100% or 0% duty cycle) until the error is corrected. the two drivers for the tran sient correction loop have outputs (i-max) and (i-min) that may be used to drive a half bridge to correct for both low and high output voltage conditions. this permits pulling the output low if an overshoot occurs due to a rapid reduction in load current. with a conventional buck regulator rapid changes in the negative direction are not possible due to the low voltage available as a forcing function. the two outputs (i-max and i-min) are completely independent. a single mosfet and diode can be used to correct for voltage droop only or voltage overshoot only when driven by the appropriate output. if the i-max driver is not used the vc3 and vs3 pins must be connected to +5 volts. under normal operation the transient correction phase is only active for a very brief time during high di/dt loads on the output. vc3 i-min pgn3 vout + - + - 35mv 35mv 70nh vs3 i-max vccl i-min comparator i-max comparator +5v fb - fb + + - dacout figure 6 ? phase 3 transient correction loop a a p p p p l l i i c c a a t t i i o o n n s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 13 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 application note o utput i nductor the output inductor should be selected to meet the requirements of the output voltage ripple in steady-state operation and the inductor current slew-rate during transient. the peak-to-peak output voltage ripple is: ripple ripple i esr v = where s d l v v ? i out in f ? = ? i is the inductor ripple current, l is the output inductor value and esr is the effec tive series resistance of the output capacitor. ? i should typically be in the range of 20% to 40% of the maximum output current. higher inductance results in lower output voltage ripple, allowing slightly higher esr to satisfy the transient specificati on. higher inductance also slows the inductor current slew rate in response to the load- current step change, ? i, resulting in more output-capacitor voltage droop. when using electrolytic capacitors, the capacitor voltage droop is usually negligible, due to the large capacitance the inductor-current rise and fall times are: () out in rise v v ? i l t ? = and out fall v ? i l t = . the inductance value can be calculated by: s d ? i v v l out in f ? = o utput c apacitor the output capacitor is sized to meet ripple and transient performance specifications. e ffective series resistance (esr) is a critical parameter. when a step load current occurs, the output voltage will have a step that equals the product of the esr and the current step, ? i. in an advanced microprocessor power supply, the output capacitor is usually selected from esr inst ead of capacitance or rms current capability. a capacitor that satisfies the esr requirements usually has a la rger capacitance and current capability than strictly needed the allowed esr can be found by: ( ) ex ripple v ? i i esr < + where iripple is the inductor ripple current, ? i is the maximum load current step change, and vex is the allowed output voltage excursion in the transient. electrolytic capacitors can be used for the output capacitor, but are less stable with age than tantalum capacitors. as they age, their esr degrades, reducing the system performance and increasing the risk of failure. it is recommended that multiple parallel capacitors be used, so that, as esr increase with ag e, overall perf ormance will still meet the processor?s requirements. there is frequently strong pressure to use the least expensive components possible, however, this could lead to degraded long-term reliability, especially in the case of filter capacitors. microsemi?s demonstration boards use the cde polymer al-el (esre) filter capacitors, which are aluminum electrolytic, and have demonstrated reliability. the os-con series from sanyo generally provides the very best performance in terms of long term esr stability and general reliability, but at a substantial cost penalty. the cde polymer al-el (esre) filter series provides excellent esr performance at a reasonable cost. beware of off-brand, very low-cost filter capacitors, which have been shown to degrade in both esr and general electrolytic characteristics over time. i nput c apacitor the input capacitor and the in put inductor, if used, are to filter the pulsating current generated by the buck converter to reduce interference to other circuits connected to the same 5v rail. in addition, the input capacitor provides local de-coupling the buck converter. the capacitor should be rated to handle the rms current requirements. the rms current is: d) 5 . 0 d( i i l rms ? = for d < 0.5 where i l is the inductor current an d d is the duty cycle. the maximum rms value of 0.25i l will occur when d = 25% or 75%. a a p p p p l l i i c c a a t t i i o o n n s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 14 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 application note (continued) s oft -s tart c apacitor an external soft-start capacitor is connected to the dacout pin and will be charged, or discharged, at a linear rate by the internal 50ua bi-directional current source after the uvlo circuit has b een satisfied. whenever the vid code is changed during normal operation the soft-start capacitor will determine the rate of change at the output. p rogramming t he o utput v oltage output voltage is determined by the internal 5 bit dac. the dac inputs are the volta ge identification (vid) 0-4 lines, the vid table lists the available output voltages for the corresponding vid codes. there are no external resistor dividers to program output voltage and only the steps listed are available. a a p p p p l l i i c c a a t t i i o o n n s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 15 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 package dimensions lq 38-pin micro leadframe package (mlpq) g h a p d f e i b c c 1 2 3 m illimeters i nches dim min max min max a 0.20 ref 0.0078 ref b .18 .30 0.007 0.011 c .18 .18 0.007 .007 d 5.00 bsc .196 bsc e 3.00 3.25 0.118 0.127 f 5.00 5.25 .196 .206 g 0.50 bsc 0.019 bsc h 0 0.05 0 0.019 i 0.70 0.80 0.027 0.031 note: dimensions do not include mold flash or pr otrusions; these shall not exceed 0.155mm(.006? ) on any side. lead dimension shall n ot include solder coverage. pw 38-pin thin small shrink outline (tssop) 1 19 38 20 g h a b c d e f l m p m illimeters i nches dim min max min max a 0.85 0.95 0.033 0.037 b 0.19 0.25 0.19 0.009 c 0.09 0.20 0.003 0.008 d 9.60 9.80 0.378 0.390 e 4.30 4.50 0.169 0.176 f 0.50 bsc 0.0196 bsc g 0.05 0.15 0.002 0.005 h ? 1.10 ? 0.043 l 0.50 0.75 0.020 0.030 m 0 8 0 8 p 6.25 6.50 0.246 0.256 *lc ? 0.10 ? 0.004 m m e e c c h h a a n n i i c c a a l l s s
lx1677 p reliminary d ata s heet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 16 www. microsemi . com amd64 processor vrm controller integrated products copyright ? 2000 rev 0.4, 2003-03-03 notes product preliminary data ? information contained in this document is pre-production data, and is proprietary to microsemi. it may not be modified in any way without the express written consent of microsemi. product referred to herein is not guaranteed to achieve preliminary or production status and product specifications, configurations, and availability may change at any time. n n o o t t e e s s

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