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HI-1582 mil-std-1553 / mil-std-1760 3.3v single transceiver description features the HI-1582 low power cmos transceiver is designed to meet the requirements of the mil-std-1553 and mil- std-1760 specifications. it is a pin-compatible, form and fit drop-in replacement for the data device corporation bu-63133l8. a transmitter inhibit control signal is provided. the receiver section converts the 1553 bus bi-phase data to complementary cmos / ttl data suitable for input to a manchester decoder. the receiver has a separate enable input pin, strobe, which, when low, forces the receiver outputs to logic "0". mil- std-1553 transceiver, the transmitter section of each bus takes complementary cmos / ttl manchester ii bi-phase data and converts it to differential voltages suitable for driving the bus isolation transformer. the HI-1582 is packaged in a 32-pin plastic chip-carrier package (qfn) with an integral exposed heatsink on the package bottom. the heatsink may be soldered to the pcb ground plane for optimal thermal dissipation. the HI-1582 is available in industrial (-40c to +85c) or extended (-55c to +125c) temperature range options. compliant to mil-std-1553a and b, mil-std-1760 and arinc 708a 3.3v single supply operation small 7mm x 7mm 32-pin plastic chip-scale package less than 0.5w maximum power dissipation single transceiver allows full dual redundancy drop in replacement for data device corporation bu-63133l8 april 2015 holt integrated circuits www.holtic.com (ds1582 rev. a) 04/15 pin configurations pin configurations 1 vcc 2 ground 3 sleep 4 -5 -6 vcc 7 rx data 8 tx data out 1582pci 1582pct 32 pin plastic 7mm x 7mm chip-scale package 24 - 23 tx data out 22 vcc 21 ground 20 tx data in 19 18 tx inhibit 17 tx data in rx data in strobe 9 10 -11 vcc 12 vcc 13 ground 14 ground 15 rx data in 16 rxdata 32 ground 31 30 ground 29 28 tx data out 27 ground 26 tx data out 25 ground tx data out tx data out
pin descriptions functional description the HI-1582 data bus transceiver contains differential volt- age source drivers and differential receivers. it is intended for applications using a mil-std-1553 a/b data bus. the device produces a trapezoidal output waveform during transmission. data input to the device?s transmitter section is from the complementary cmos inputs tx data in and . the transmitter accepts manchester ii bi-phase data and converts it to differential voltages on tx data out . the transceiver outputs are either di- rect-coupled or transformer-coupled to the mil-std-1553 data bus. both coupling methods produce a nominal volt- age on the bus of approximately 7.5 volts peak to peak at the mil-std-1553 bus. transmitter tx data in and the transmitter is automatically inhibited and placed in the high impedance state when both tx data in and are driven with the same logic input state. a logic ?1? ap- plied to the tx inhibit or sleep input forces the transmit- ter to the high impedance state, regardless of the state of tx data in and the sleep pin is logically ored with the tx inhibit pin. in the obsolete bu-63133l8, the sleep pin also reduced idle-state supply current from 30ma to 6ma maximum. the HI-1582 does not require supply current control; its idle- state (receive mode) current is 4 ma nominal, lower than bu-63133l8 sleep current. tx data out tx data in tx data in. receiver the receiver accepts bi-phase differential data from the mil-std-1553 bus through the same direct or transformer coupled interface at the rx data in and pins. the receiver?s differential input stage drives a filter and threshold comparator to produce cmos data at the rx data out and output pins. rx data in rx data out the receiver outputs are forced to a logic ?0? when the strobe pin is low. a direct-coupled interface (see figure 4) uses a 1:2.5 ratio isolation transformer and two 55 ohm isolation resistors between the transformer and the bus. the primary center- tap of the isolation transformer must be connected to vdd (3.3v). in a transformer-coupled interface (see figure 4), the transceiver is also connected to a 1:2.5 isolation transformer. the far end of the stub cable is connected to a 1:1.4 bus coupling transformer, which requires two coupling resistors equal to 75% of the bus characteristic impedence (zo) between the coupling transformer and the bus. mil-std-1553 bus interface pin symbol function description 1, 29, 31 analog output inverted transmitter output to mil-std-1553 bus isolation transformer. connect all three pins together. 2, 7, 12, 13, 22 vcc power supply +3.3v power. connect all five pins. 3, 14, 15, 21 ground power supply ground. connect all eight pins. 25, 27, 30, 32 4 sleep digital input 5, 6, 11, 24 - - not connected 8 rx data digital output receiver output 9 strobe 10 17 18 tx inhibit 19 20 tx data in digital input transmitter input. 23, 26, 28 tx data out analog output transmitter output to mil-std-1553 bus isolation transformer. connect all three pins together. tx data out rx data rx data in if high, inhibits transmitter. internal 80k pull-down digital input receiver strobe input. receiver outputs are both zero if strobe is low. internal 80k pull-up. digital output inverted receiver output 16 rx data in analog input receiver input from mil-std-1553 bus isolation transformer analog input inverted receiver input from mil-std-1553 bus isolation transformer digital input if high, inhibits transmitter. internal 80k pull-up digital input inverted transmitter input. internal 80k pull-down internal 80k pull-down tx data in HI-1582 holt integrated circuits 2
tx data in HI-1582 gnd isolation transformer shaping network shaping network filter limiter 1:2.5 short or long stub coupling mil-std-1553 bus rx data in tx data out tx data out rx data in tx data in tx data in tx inhibit sleep rx data out rx data out strobe +3.3v vdd HI-1582 figure 1. block diagram 0.1 f 10f tx data in tx data out - tx data out holt integrated circuits 3 figure 2. transmit waveform - example pattern
rx data out rx data out rx data out rx data out supply voltage temperature range industrial screening.........-40c to +85c hi-temp screening........-55c to +125c vdd....................................... 3.3v... 10% note: stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. these are stress ratings only. operation at the limits is not recommended. supply voltage ( logic input voltage range power dissipation at 25c 1.5 w derate 7mw/c solder temperature (reflow) 260c junction temperature 175c storage temperature -65c to +150c v ) -0.3vto+5v -0.3 v dc to +3.6 v driver peak output current +1.0 a cc recommended operating conditions absolute maximum ratings HI-1582 holt integrated circuits 4 receiver waveforms t rg t dr t rg t dr vbus (line to line) large amplitude small amplitude t rg t dr t rg t dr vbus (line to line) t pw t pw t pw t pw figure 3. receive waveform - example pattern
parameter symbol condition min typ max units operating voltage vdd 3.0 3.3 3.6 v total supply current icc1 not transmitting 4 10 ma icc2 transmit @ 100% duty cycle 0 ma transformer coupled 70 ohm resistive load power dissipation pd1 not transmitting 15 60 mw pd2 0.3 0.5 w min. input voltage (logic 1) v digital inputs 70% v max. input voltage (logic 0) v digital inputs 30% v input current ( ) i 20 100 a 20 max. input current ( ) i min. output voltage ( ) v i = -2.0ma, digital outputs v - 0.4 v max. output voltage ( ) v i = 2.0ma, digital outputs 0.4 v input resistance r differential (at chip pins) 20 kohm input capacitance c differential 5 pf common mode rejection ratio cmrr 40 db input level v differential 9 vp-p input common mode voltage v -10.0 10.0 v-pk threshold voltage - direct-coupled detect 1.15 vp-p threshold voltage - 800 90 transmit @ 100% duty cycle transformer coupled 70 ohm resistive load logic 1 a logic 0 -20 a -100 -20 a logic 1 logic 0 v measured at point ?a ? in figure 5 using pulse outputs present 1 mhz sinusoid across 35 ohm load at rx data out / no detect v no pulse outputs 0.28 vp-p at rx data out / transformer-coupled detect v 0.86 vp-p measured at point ?a ? in figure 6 using pulse outputs present 1 mhz sinusoid across 70 ohm load at rx data out/ no detect v no pulse outputs 0.20 vp-p at rx data out / ih il ih tx data in, tx data in, tx inhibit, sleep il oh out ih out d cc cc cc strobe tx data in, tx data in, tx inhibit, sleep strobe receiver (measured at point ?a ? in figure 5 unless otherwise specified) in in in icm thd thd d thnd t thnd rx data out rx data out rx data out rx data out vcc = 3.3 v, gnd = 0v, t = operating temperature range (unless otherwise specified). a dc electrical characteristics HI-1582 holt integrated circuits 5
HI-1582 holt integrated circuits 6 parameter symbol test conditions min typ max units receiver enable delay from strobe rising or falling edge to 40 ns rx data out or receiver (measured at point ?a ? in figure 6) t receiver delay (note 1) t from input signal zero crossing to corresponding 450 ns zero crossing in rx data out or note 4 t70ns (note 1) note 3 receiver gap time (note 1) t spacing between rx data out 90 430 ns and pulses note 2 note 3 t dr pw rg ren rx data out rx data out rx data out receiver output pulse width vcc = 3.3 v, gnd = 0v, t =operating temperature range (unless otherwise specified). a ac electrical characteristics transmitter (measured at point ?a ? in figure 6) t driver delay t tx data in, to 150 ns tx data out, rise time tr 70 ohm resistive load 100 300 ns fall time tf 70 ohm resistive load 100 300 ns transmit inhibit delay t disable bus output 100 ns t enable bus output 150 ns dt di-h di-l tx data in tx data out note 1. this parameter varies with receive signal amplitude. see receiver waveforms, figure 3. note 2. measured usin g a 1 mhz sinusoid, 20 v peak to peak, line-to-line at point "at" (guaranteed but not tested.) note 3. measured transformer-coupled mode usin g a 1 mhz sinusoid, 860 mv peak to peak line-to-line at point "at" (100% tested). note 4. measured transformer-coupled mode usin g a 1 mhz sinusoid 860 mv peak to peak, line-to-line at point "at". ` transmitter (measured at point ?a ? in figure 5 unless otherwise specified) d d t d t output voltage direct coupled v 35 ohm load 6.0 9.0 vp-p (measured at point ?a ? in figure 5) transformer coupled v 70 ohm load 20.0 27.0 vp-p (measured at point ?a ? in figure 6) output noise v differential, inhibited 10.0 mvp-p output dynamic offset voltage direct coupled v 35 ohm load -90 90 mv (measured at point ?a ? in figure 5) transformer coupled v 70 ohm load -250 250 mv (measured at point ?a ? in figure 6) output resistance r differential, not transmitting 10 kohm output capacitance c 1 mhz sine wave 15 pf out out on dyn dyn out out vcc = 3.3 v, gnd = 0v, t =operating temperature range (unless otherwise specified). a dc electrical characteristics (cont.)
HI-1582 HI-1582 HI-1582 mil-std-1553 stub coupler mil-std-1553 bus a or b (direct coupled) mil-std-1553 bus a or b (transformer coupled) isolation transformer 52.5 55 bus a b or 52.5 55 bus a or b bus a b or bus a or b 1:1.4 1:2.5 1:2.5 isolation transformer figure 4. bus connection examples using HI-1582 isolation transformer gnd v dd mil-std-1553 transceiver point ?at? 1:2.5 HI-1582 figure 6. transformer coupled test circuit isolation transformer gnd rx data out tx data in tx data in rx data out v dd mil-std-1553 transceiver 55 35 55 point ?ad? 1:2.5 HI-1582 figure 5. direct coupled test circuit vcc vcc vcc vcc rx data out tx data in tx data in rx data out bus a b or bus a or b bus a b or bus a or b holt integrated circuits 7
applications note holt applications note an-500 provides circuit design notes regarding the use of holt's family of mil-std-1553 transceivers. layout considerations, as well as recommended interface and protection components are included. heat sink - chip-scale package the HI-1582pci/t/m uses a 32-pin thermally enhanced qfn package. the package includes a metal heat sink located on the bottom surface of the device. this heat sink may be soldered down to the printed circuit board for optimum thermal dissipation. the heat sink is electrically isolated and may be soldered to any convenient power or ground plane. HI-1582 holt integrated circuits 8 t a =25c t a =85c t a =125c HI-1582pci / t / m data taken at vdd=3.3v, continuous transmission at 1mbit/s, single transmitter enabled. 150c package style condition ? ja junction temperature part number 32-pin plastic chip- scale package heat sink unsoldered 49c/w 50c 110c thermal characteristics manufacturer part number application turns ratio dimensions premier magnetics pm-db2791s isolation single 1:2.5 .400 x .400 x .185 inches premier magnetics pm-db2756 isolation dual 1:2.5 .930 x .575 x .185 inches premier magnetics pm-db2702 stub coupling 1:1.4 .625 x .500 x .250 inches recommends the premier magnetics parts as offering the best combination of electrical performance, low cost and small footprint. recommended transformers the HI-1582 transceiver has been characterized for compliance with the electrical requirements of mil-std- 1553 when used with the following transformers. holt
hi - 1582 pc x f part package number description pc 32 pin plastic chip-scale package lpcc (32pcs7) part temperature burn number range flow in i -40c to +85c i no t -55c to +125c t no m -55c to +125c m yes part lead number finish f nipdau (pb-free rohs compliant) ordering information HI-1582 holt integrated circuits 9
HI-1582 holt integrated circuits 10 document rev. date description of change ds1582 new. 05/23/14 initial release. a 03/12/15 change internal pull-down on tx inhibit pin from 80 pull-down to 80 pull-up. clarify bus labels on figures 4 and 5. kk revision history
package dimensions 32-pin plastic chip-scale package (qfn) package type: 32pcs7 5.400 0.050 (0.213 0.002) 0.400 0.050 (0.016 0.002) 0.300 (0.012) 0.65 (0.026) 0.200 (0.008) 1.00 (0.039) 7.000 (0.276) bsc 5.400 0.050 (0.213 0.002) typ typ bottom view top view bsc 7.000 (0.276) bsc max millimeters (inches) bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) electrically isolated heat sink pad on bottom of package connect to any ground or power plane for optimum thermal dissipation . . holt integrated circuits 11

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