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n1611 sy 20111019-s00003 no.a1998-1/23 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 LV8727 overview the LV8727 is a pwm curr ent-controlled micro step bipolar stepping motor driver. this driver can do eight ways of micro step resolution of half, 1/8, 1/16, 1/32, 1/64, 1/128, 1/10, 1/20 step, and can drive simply by the step input. features ? single-channel pwm current control stepping motor driver. ? output on-resistance (upper side : 0.25 ; lower side : 0.15 ; total of upper and lower : 0.4 ; ta = 25 c, i o = 4.0a) ? half, 1/8, 1/16, 1/32, 1/64, 1/128, 1/10, 1/20 step are selectable. ? advance the excitation step with the only step signal input. ? bicdmos process ic. ? available forward reverse control. ? i o max=4.0a ? thermal shutdown circuit. ? input pull down resistance ? with reset pin and enable pin. specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage v m max 50 v output current i o max 4a output peak current i o peak tw 10ms, duty 20% 4.6 a logic input voltage v in max 6v vref input voltage vref max 6v mo / down pin input voltage v mo /v down max 6v allowable power dissipation pd max indipendent ic 2.45 w operating temperature topr -30 to +85 c storage temperature tstg -55 to +150 c caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. bi-cmos lsi pwm current control stepping motor driver orderin g numbe r : ena1998 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LV8727 no.a1998-2/23 recommendation operating ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage range v m 9 to 45 v logic input voltage v in 0 to 5 v vref input voltage range vref 0 to 3 v electrical characteristics at ta = 25c, v m = 24v, vref = 1.5v ratings parameter symbol conditions min typ max unit standby mode current drain i m st st = ?l? 70 100 a current drain im st = ?h?, oe = ?h?, no load 3.5 4.9 ma thermal shutdown temperature tsd design guarantee 150 180 200 c thermal hysteresis width tsd design guarantee 40 c i in l v in = 0.8v 3 8 15 a logic pin input current i in h v in = 5v 30 50 70 a logic high-level input voltage v in h 2.0 v logic low-level input voltage v in l 0.8 v fdt pin high-level voltage vfdth 3.5 v fdt pin middle-level vo ltage vfdtm 1.1 3.1 v fdt pin low-level voltage vfdtl 0.8 v chopping frequency fch cosc1 = 100pf 70 100 130 khz osc1 pin charge/discharge current iosc1 7 10 13 a vtup1 0.8 1 1.2 v chopping oscillation circuit threshold voltage vtdown1 0.3 0.5 0.7 v vref pin input voltage ir ef vref = 1.5v -0.5 a down output residual voltagr v o 1down idown = 1ma 50 200 mv mo pin residual voltage v o 1mo imo = 1ma 50 200 mv hold current switching frequency f down cosc2 = 1500pf 1.12 1.6 2.08 hz osc2 pin charge/discharge current iosc2 7 10 13 a vtup2 0.8 1 1.2 v hold current switching frequency threshold voltage vtdown2 0.3 0.5 0.7 v ronu i o = 4.0a, high-side on resistance 0.25 0.325 ? output on-resistance rond i o = 4.0a, low-side on resistance 0.15 0.195 ? output leakage current i o leak v m = 50v 50 a diode forward voltage vd i d = -4.0a 1 1.3 v current setting reference voltage vrf vref = 1.5v, current ratio 100% 0.485 0.5 0.515 v
LV8727 no.a1998-3/23 package dimensions unit : mm (typ) 3236a sanyo : hzip25 2.0 29.2 25.6 (22.8) (2.6) (5.0) (12.3) (1.0) 0.52 (r1.7) 0.4 18.6 max (14.4) 4.5 (11.0) 3.5 21.7 14.5 4.2 4.0 (8.5) ( 2.5) 125 2.0 pd max - ta 0 1.0 2.0 3.0 2.45 ? 30 60 90 30 0 120 1.27 allowable power dissipation, pd max - w ambient temperature, ta - c
LV8727 no.a1998-4/23 block diagram osc1 oe mo rst step fr md3 md2 md1 osc2 st tsd vref sgnd pgnd1 rf1 out1a out1b out2a out2b rf2 vm2 vm1 + - + - + - + - down pgnd2 fdt decay mode setting circuit current select circuit output pre stage output control logic current select circuit oscllator regulator 1 regulator 2 output pre stage output pre stage output pre stage
LV8727 no.a1998-5/23 pin assignment pin functions pin no. pin name pin functtion equivalent circuit 7 8 9 10 11 12 13 md1 md2 md3 oe rst fr step excitation mode switching pin excitation mode switching pin excitation mode switching pin output enable signal input pin reset signal input pin forward / reverse signal input pin clock pulse signal input pin gnd internal 5v regulator 6 st chip enable input pin. gnd internal 5v regulator 1 2 3 4 5 21 22 23 24 25 out1b rf1 pgnd1 out1a v m 1 v m 2 out2b pgnd2 rf2 out2a channel 1 outb output pin. channel 1 current-sense resistor connection pin. channel 1 power gnd channel 1 outa output pin. channel 1 motor supply connect pin channel 2 motor supply connect pin channel 2 outb output pin. channel 2 power gnd channel 2 current-sense resistor connection pin. channel 2 outa output pin. gnd 1 22 5 21 25 4 2 24 23 3 continued on next page. out1b rf1 pgnd1 out1a vm1 st md1 md2 md3 oe rst out2a fr step rf2 osc1 osc2 vm2 fdt down pgnd2 mo out2b vref sgnd top view LV8727 1 2 10 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
LV8727 no.a1998-6/23 continued from preceding page. pin no. pin name pin functtion equivalent circuit 19 vref constant-curr ent control reference voltage input pin. gnd internal 5v regulator 17 18 down mo holding current output pin. position detecting monitor pin. gnd internal 5v regulator 14 15 osc1 osc2 chopping frequency setting capacitor connection pin. holding current detection time setting capacitor connection pin. gnd internal 5v regulator 16 fdt decay mode select voltage input gnd internal 5v regulator
LV8727 no.a1998-7/23 reference describing operation (1) stand-by function when st pin is at low levels, the ic enters stand-by mode, all logic is reset and output is turned off. when st pin is at high levels, the stand-by mode is released. (2) step pin function step input advances electrical angle at ever y nising edge (advances step by step). input st step operating mode low * standby mode high excitation step proceeds high excitation step is kept (3) excitation setting method set the excitation setting as shown in the following table by setting md1 pin, md2 pin and md3 pin. input initial position md3 md2 md1 mode (excitation) 1ch current 2ch current low low low half 100% 0% low low high 1/8 100% 0% low high low 1/16 100% 0% low high high 1/32 100% 0% high low low 1/64 100% 0% high low high 1/128 100% 0% high high low 1/10 100% 0% high high high 1/20 100% 0% the initial position is also the default state at start-up and excitation position at counter-reset in each micro step resolution. (4) mo output pin mo output pin serves as open-drain connection. if mo pin will be in the state of an initial position, it is turned on, and it outputs a low level. excitation position mo initial position low other initial position open (5) output current setting output current is set shown below by the vref pin (applied voltage) and a resistance value between rf1(2) pin and gnd. i out = ( vref / 3 ) / rf1 (2) resistance * the setting value above is a 100% output current in each excitation mode. (example) when vref = 0.9v and rf1 (2) resistance is 0.1 ? , the setting is shown below. i out = ( 0.9v / 3 ) / 0.1 ? = 3a
LV8727 no.a1998-8/23 (6) output enable function when the oe pin is set low, the output is forced off and go es to high impedance. however, the internal logic circuits are operating, so the excitation position proceeds when the stp is input. therefore, when oe pin is returned to high, the output level conforms to the excitation position proceeded by the step input. oe operation mode l output: off h output: on (7) reset function when the rst pin is set low, the output goes to initial mode and excitation position is fixed in the initial position for step pin and fr pin input. mo pin outputs at low le vels at the initial position. (open drain connection) rst operation mode h normal operation l reset state oe power save mode 0% step mo 1ch output 2ch output output is high-impedance rst reset 0% step mo 1ch output 2ch output initial state
LV8727 no.a1998-9/23 (8) forward / reverse switching function fr operating mode low clockwise (cw) high counter-clockwise (ccw) the internal d/a converter proceeds by a b it on the rising edge of the step sign al input to the step pin. in addition, cw and ccw mode are switched by fr pin setting. in cw mode, the channel 2 current phase is delayed by 90 relative to the channel 1 current. in ccw mode, the channel 2 current phase is adva nced by 90 relative to the channel 1 current. (9) decay mode setting current decay method is selectable as shown below by applied voltage to the fdt pin. fdt voltage decay method 3.5v to slow decay 1.1v to 3.1v or open mixed decay to 0.8v fast decay (10) chopping frequency setting function chopping frequency is set as shown below by a capacitor between osc1 pin and gnd. fcp = 1 / ( cosc1 / 10 10 -6 ) (hz) (example) when cosc1 = 180pf, the chopping frequency is shown below. fcp = 1 / ( 180 10 -12 / 10 10 -6 ) = 55.6(khz) fr cw mode cw mode ccw mode step excitation position 1ch output 2ch output (1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5)
LV8727 no.a1998-10/23 (11) output current in each micro step resolution output current vector locus (one step is normalized to 90 degrees) half, 1/8, 1/16, 1/32, 1/64, 1/128 step current setting ratio in each micro step resolution 1/128 ( % ) 1/64 ( % ) 1/32 ( % ) 1/16 ( % ) 1/8 ( % ) half ( % ) step 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 0 100 0 100 0 100 0 100 0 100 0 100 0 1 100 1 2 100 2 100 2 3 100 4 4 100 5 100 5 100 5 5 100 6 6 100 7 100 7 7 100 9 8 100 10 100 10 100 10 100 10 9 99 11 10 99 12 99 12 11 99 13 12 99 15 99 15 99 15 13 99 16 14 99 17 99 17 15 98 18 16 98 20 98 20 98 20 98 20 98 20 17 98 21 18 98 22 98 22 19 97 23 20 97 24 97 24 97 24 21 97 25 22 96 27 96 27 23 96 28 24 96 29 96 29 96 29 96 29 25 95 30 continued on next page. 0.0 33.3 66.7 100.0 0.0 33.3 66.7 100.0 channel 1 current ratio (%) channel 2 current ratio (%)
LV8727 no.a1998-11/23 continued from preceding page. 1/128 ( % ) 1/64 ( % ) 1/32 ( % ) 1/16 ( % ) 1/8 ( % ) halfe ( % ) step 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 26 95 31 95 31 27 95 33 28 94 34 94 34 94 34 29 94 35 30 93 36 93 36 31 93 37 32 92 38 92 38 92 38 92 38 92 38 33 92 39 34 91 41 91 41 35 91 42 36 90 43 90 43 90 43 37 90 44 38 89 45 89 45 39 89 46 40 88 47 88 47 88 47 88 47 41 88 48 42 87 49 87 49 43 86 50 44 86 51 86 51 86 51 45 85 52 46 84 53 84 53 47 84 55 48 83 56 83 56 83 56 83 56 83 56 49 82 57 50 82 58 82 58 51 81 59 52 80 60 80 60 80 60 53 80 61 54 79 62 79 62 55 78 62 56 77 63 77 63 77 63 77 63 57 77 64 58 76 65 76 65 59 75 66 60 74 67 74 67 74 67 61 73 68 62 72 69 72 69 63 72 70 64 71 71 71 71 71 71 71 71 71 71 71 71 65 70 72 66 69 72 69 72 67 68 73 68 67 74 67 74 67 74 69 66 75 70 65 76 65 76 71 64 77 72 63 77 63 77 63 77 63 77 73 62 78 74 62 79 62 79 75 61 80 76 60 80 60 80 60 80 77 59 81 78 58 82 58 82 79 57 82 80 56 83 56 83 56 83 56 83 56 83 81 55 84 82 53 84 53 84 83 52 85 84 51 86 51 86 51 86 85 50 86 86 49 87 49 87 87 48 88 88 47 88 47 88 47 88 47 88 89 46 89 90 45 89 45 89 continued on next page.
LV8727 no.a1998-12/23 continued from preceding page. 1/128 ( % ) 1/64 ( % ) 1/32 ( % ) 1/16 ( % ) 1/8 ( % ) half ( % ) step 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 91 44 90 92 43 90 43 90 43 90 93 42 91 94 41 91 41 91 95 39 92 96 38 92 38 92 38 92 38 92 38 92 97 37 93 98 36 93 36 93 99 35 94 100 34 94 34 94 34 94 101 33 95 102 31 95 31 95 103 30 95 104 29 96 29 96 29 96 29 96 105 28 96 106 27 96 27 96 107 25 97 108 24 97 24 97 24 97 109 23 97 110 22 98 22 98 111 21 98 112 20 98 20 98 20 98 20 98 20 98 113 18 98 114 17 99 17 99 115 16 99 116 15 99 15 99 15 99 117 13 99 118 12 99 12 99 119 11 99 120 10 100 10 100 10 100 10 100 121 9 100 122 7 100 7 100 123 6 100 124 5 100 5 100 5 100 125 4 100 126 2 100 2 100 127 1 100 128 0 100 0 100 0 100 0 100 0 100 0 100
LV8727 no.a1998-13/23 output current vector locus (one step is normalized to 90 degrees) 1/10, 1/20 step current setting ratio in each micro step resolution 1/10, 1/20 step 1/20 ( % ) 1/10 ( % ) step 1ch 2ch 1ch 2ch 0 100 0 100 0 1 100 8 2 99 16 99 16 3 97 23 4 95 31 95 31 5 92 38 6 89 45 89 45 7 85 52 8 81 59 81 59 9 76 65 10 71 71 71 71 11 65 76 12 59 81 59 81 13 52 85 14 45 89 45 89 15 38 92 16 31 95 31 95 17 23 97 18 16 99 16 99 19 8 100 20 0 100 0 100 0.0 33.3 66.7 100.0 0.0 33.3 66.7 100.0 channel 1 current ratio (%) channel 2 current ratio (%)
LV8727 no.a1998-14/23 (12) current wave example in each micro st ep resolution (half, 1/16, 1/128, 1/20 step) half step (cw mode) 1/16 step (cw mode) step mo i1 (%) -100 -100 100 (%) 100 0 0 i2 step mo i1 -100 (%) 100 50 -50 0 i2 -100 (%) 100 50 -50 0
LV8727 no.a1998-15/23 1/128 step ( cw mode ) 1/20 step ( cw mode ) step mo i1 -100 (%) 100 50 -50 0 i2 -100 (%) 100 50 -50 0 step mo i1 -100 (%) 100 50 -50 0 i2 -100 (%) 100 50 -50 0
LV8727 no.a1998-16/23 (13) current control operation slow decay current control operation when fdt pin voltage is a voltage over 3.5v, the constant-current control is operated in slow decay mode. ( sine-wave increasing direction ) ( sine-wave decreasing direction ) each of current modes operates with the follow sequence. the ic enters charge mode at a rising edge of the ch opping oscillation. ( a period of charge mode (blanking time) is forcibly present in approximately 1 s, regardless of the current value of the coil current (icoil) and set current (iref)). after the period of the blanking time, the ic operates in charge mode until icoil iref. after that, the mode switches to the slow decay mode and the coil current is attenuated until the end of a chopping period. at the constand-current in slow decay mode, following to the setting current from the coil current may take time (or not follow) for the current delay attenuation. slow charge slow charge step slow slow charge step blanking time blanking time blanking time blanking time setting current coil current current mode setting current setting current setting current coil current current mode chopping period chopping period chopping period slow
LV8727 no.a1998-17/23 fast decay current control operation when fdt pin voltage is a voltage under 0.8v, the constant-current control is operated in fast decay mode. (sine-wave inxreasing direction) (sine-wave decreasing direction) each of current modes operates with the follow sequence. the ic enters charge mode at a rising edge of the ch opping oscillation. ( a period of charge mode (blanking time) is forcibly present in approximately 1 s, regardless of the current value of the coil current (icoil) and set current (iref)). after the period of the blanking time, the ic operates in charge mode until icoil iref. after that, the mode switches to the fast decay mode and the coil current is attenuated until the end of a chopping period. at the constand-current control in fast decay mode, fo llowing to the setting current from the coil current take short-time for the current fast attenuation, bu t, the current ripple value may be higher. fast charge fast charge step fast step charge blanking time blanking time fast charge blanking time fast setting current coil current current mode chopping period setting current setting current setting current chopping period coil current current mode
LV8727 no.a1998-18/23 mixed decay current control operation when fdt pin voltage is a voltage between 1.1v to 3.1v or open, the constant-current control is operated in mixed decay mode. (sine-wave increasing direction) (sine-wave decreasing direction) each of current modes operates with the follow sequence. the ic enters charge mode at a rising edge of the ch opping oscillation. ( a period of charge mode (blanking time) is forcibly present in approximately 1 s, regardless of the current value of the coil current (icoil) and set current (iref)). in a period of blanking time, the coil current (icoil) and the setting curr ent (iref) are compared. if an icoil < iref state exists during the charge period: the ic operates in charge mode until icoil iref. after that, it switches to slow decay mode and then switches to fast decay mode in the last approximately 1 s of the period. if no icoil < iref state exists during the charge period: the ic switches to fast decay mode and the coil cu rrent is attenuated with the fast decay operation until the end of a chopping period. the above operation is repeated. normally, in the sine wa ve increasing direction the ic operates in slow (+ fast) decay mode, and in the sine wave decresing direction th e ic operates in fast decay mode until the current is attenuated and reaches the set value and the ic operates in slow (+ fast) decay mode. fast slow charge fast slow charge step fast slow fast slow charge step charge blanking time blanking time blanking time setting current coil current current mode chopping period setting current setting current setting current chopping period coil current current mode
LV8727 no.a1998-19/23 (13) output short-circuit protection circuit built-in output short-circuit protection circuit makes output to enter in stand-by mode. this function prevents the ic from damaging when the output shorts circuit by a voltage short or a ground short, etc. when output short state is detected, short-circuit detection circuit state the operating and output is once turned off. subsequently, the output is turned on again after the timer latch period ( typ. 256 s ). if the output remains in the short-circuit state, turn off the output, fix the output to the wait mode, and turn on the emo output. when output is fixed in stand-by mode by output short protection circuit, output is released the latch by setting st = ?l?. short-circuit short- circuit short-circuit detection state h-bridge output state internal counter 1st counter start 1st counter stop 1st counter start 1st counter end 2nd counter start 2nd counter end release output off output on output on standby state
LV8727 no.a1998-20/23 (15) down output pin the down output pin is an open-drain connection. this pin is turned on when no rising edge of step between the input signals while a period determined by a capacitor between osc2 and gnd, and outputs at low levels. the open-drain output in once turned on, is turned off at the next rising edge of step. holding current switching time ( tdown ) is set as shown below by a capacitor between osc2 pin and gnd. tdown = cosc2 0.4 10 9 (s) (example) when cosc2 = 1500pf, the step signal detection time is shown below. tdown = 1500pf 0.4 109 = 0.6 (s) by connecting circumference parts like th e example of the following circuit diag ram using a down pin, that is a step signal is not inputted more than detection time, it is a down output's turning on in the state of holding turning on electricity the position of a stepping motor, and setting current's fallin g because vref input voltage's falls, and stopping power consumption -- it can do. (example) when v1=5v, r1=27k ? , r2=4.7k ? , r3=1k ? , the vref input voltage is shown below. down output off: vref=v1 r2/(r1+r2)=0.741v down output on: vref=v1 (r2 U r3)/ (r1+(r2 U r3))=0.126v tdown off off low step input down output motor keep rotation rotation down vref r3 r1 r2
LV8727 no.a1998-21/23 application circuit example the above sample application circuit is set to the following conditions: ? constant-current setting i out =vref/3/rf (example) when is vref=0.9v i out =0.9v/3/0.1 ? =3a ? chopping frequency setting fchop=ichop/(cchop vt 2) =10a/(180pf 0.5v 2)=55.6khz + - m rf1 pgnd1 out1a vm1 st md1 md2 md3 oe rst out2a fr step rf2 osc1 osc2 vm2 fdt down pgnd2 mo out2b vref sgnd LV8727 1 2 10 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 out1b 180pf + - + - logic supply motor connect pin logic input
LV8727 no.a1998-22/23 hzip25 heat sink attachment heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to the outer environment and dissipating that heat. a. unless otherwise specified, for power ics with tabs and pow er ics with attached heat sinks, solder must not be applied to the heat sink or tabs. b. heat sink attachment use flat-head screws to attach heat sinks. use also washer to protect the package. use tightening torques in the ranges 39-59ncm(4-6kgcm) . if tapping screws are used, do not use screws with a diameter larger than the holes in the semiconductor device itself. do not make gap, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. take care a position of via hole . do not allow dirt, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. verify that there are no press burrs or screw-hole burrs on the heat sink. warping in heat sinks and printed circuit boards must be no more than 0.05 mm between screw holes, for e ither concave or co nvex warping. twisting must be limited to under 0.05 mm. heat sink and semiconductor device are mounted in parallel. take care of electric or compressed air drivers the speed of these torque wrench es should never exceed 700 rpm, and should typically be about 400 rpm. c. silicone grease spread the silicone grease evenly when mounting heat sinks. recommends yg-6260 (momentive performance materials japan llc) d. mount first mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board. when attaching a heat sink after mounting a semiconducto r device into the printed circuit board, when tightening up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin doesn't hang. e. when mounting the semiconductor device to the heat sink using jigs, etc., take care not to allow the device to ride onto the jig or positioning dowel. design the jig so that no unreas onable mechanical stress is not app lied to the semiconductor device. f. heat sink screw holes be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used. when using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used. a hole diameter about 15% larger than the diameter of the screw is desirable. when tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. a diameter about 15% smaller than the diameter of the screw is desirable. g. there is a method to mount the semiconductor device to the heat sink by using a spring band. but this method is not recommended because of possible displ acement due to fluctuation of the spring force with time or vibration. binding head machine screw countersunk head mashine screw heat sink gap via hole
LV8727 ps no.a1998-23/23 on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.

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