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1 for more information www.linear.com/ltm8601 typical application features description 32v , 2a module li-ion/ polymer battery charger the lt m ? 8061 is a high efficiency 32v, 2a module ? standalone li-ion battery charger. it is optimized for one and two-cell packs, with fixed float voltage options: 4.1v, 4.2v, 8.2v and 8.4v. the ltm8061 provides a constant-current/constant-voltage charge characteristic, with maximum charge current up to 2a. a precondition feature trickle charges a depleted battery , and bad battery detection provides a signal and suspends charging if a battery does not respond to preconditioning. the ltm8061 can be configured to terminate charging when charge current falls to one-tenth the programmed maximum current or to use an internal timer if a time- based termination scheme is desired. once charging is terminated, the ltm8061 enters a low current standby mode. an auto-restart feature starts a new charge cycle if the battery voltage drops 2.5% from the float voltage, or if a new battery is inserted into a charging system. the ltm8061 is packaged in a thermally enhanced, com - pact (9mm 15mm 4.32mm) over-molded land grid array (lga) package suitable for automated assembly by standard surface mount equipment. the ltm8061 is rohs compliant. standalone single cell 2a li-ion battery charger with c/10 termination from 6v to 32v input applications n wide input voltage range: 4.95v to 32v (40v absolute maximum) n float voltage options: 1-cell: 4.1v, 4.2v 2-cell: 8.2v, 8.4v n programmable charge current: up to 2a n user-selectable charge termination: c/10 or onboard termination timer n dynamic charge rate programming/soft-start pin n programmable input current limit n optional reverse input protection n ntc resistor temperature monitor n 0.5% float voltage accuracy n bad- battery detection with auto-reset n tiny , low profile (9mm 15mm 4.32mm) surface mount lga package n industrial handheld instruments n 12v to 24v automotive and heavy equipment n professional video/camera chargers v ina v inc /clp v in run rng/ss tmr ntc bat bias chrg fault gnd 8061 ta01a ltm8061-4.1 v in 6v to 32v 4.7f available options: 1-cell: 4.1v, 4.2v 2-cell: 8.2v, 8.4v single cell 4.1v battery + l, lt , lt c , lt m , linear technology, linear logo, module and polyphase are registered trademarks and powerpath is a trademark of linear technology corporation. all other trademarks are the property of their respective owners battery charging profile battery voltage (v) 0 0 charging current (ma) 500 1000 1500 2 2500 8061 ta01b 1 3 4 2000 normal charging termination precondition ltm8061 8061fa
2 for more information www.linear.com/ltm8601 pin configuration absolute maximum ratings v ina , v inc / clp , v in .................................................... 40 v run , chrg , fa u lt ................................... v in + 0.5, 40 v tmr , rng / ss , ntc ................................................. 2.5 v bias , bat .................................................................. 10 v internal operating temperature ( note 2) ................................................................. 125 c maximum body solder temperature ..................... 245 c (note 1) lga package 77-lead (15mm 9mm 4.32mm) bias rng/ss fault chrg ntc tmr run 1 2 3 4 5 6 7 a b c d e f g h j k l bank 3 bank 4 bank 5 v in v inc /clp v ina bank 1 gnd bank 2 bat t jmax = 125c, ja = 17.0c/w, jctop = 16.2c/w, jcbottom = 6.1c/w, jb = 11.2c/w, values determined per jedec 51-9, 51-12 weight = 1.7g order information lead free finish tray part marking* package description temperature range ltm8061ev-4.1#pbf ltm8061ev-4.1#pbf ltm8061v-41 77-lead (15mm 9mm 4.32mm) C40c to 125c ltm8061iv-4.1#pbf ltm8061iv-4.1#pbf ltm8061v-41 77-lead (15mm 9mm 4.32mm) C40c to 125c ltm8061ev-4.2#pbf ltm8061ev-4.2#pbf ltm8061v-42 77-lead (15mm 9mm 4.32mm) C40c to 125c ltm8061iv-4.2#pbf ltm8061iv-4.2#pbf ltm8061v-42 77-lead (15mm 9mm 4.32mm) C40c to 125c ltm8061ev-8.2#pbf ltm8061ev-8.2#pbf ltm8061v-82 77-lead (15mm 9mm 4.32mm) C40c to 125c ltm8061iv-8.2#pbf ltm8061iv-8.2#pbf ltm8061v-82 77-lead (15mm 9mm 4.32mm) C40c to 125c ltm8061ev-8.4#pbf ltm8061ev-8.4#pbf ltm8061v-84 77-lead (15mm 9mm 4.32mm) C40c to 125c ltm8061iv-8.4#pbf ltm8061iv-8.4#pbf ltm8061v-84 77-lead (15mm 9mm 4.32mm) C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ ltm8061 8061fa
3 for more information www.linear.com/ltm8601 electrical characteristics the l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at t a = 25c. run = 2v. parameter conditions min typ max units v in operating voltage 32 v v in start voltage ltm8061-4.1/ltm8061-4.2 ltm8061-8.2/ltm8061-8.4 l l 7.5 11.5 v v v in ovlo threshold v in rising 32 35 40 v v in ovlo hysteresis 1 v v in uvlo threshold ltm8061-4.1/ltm8061-4.2 ltm8061-8.2/ltm8061-8.4, v in rising 4.6 8.7 v v v in uvlo hysteresis 0.3 v v ina to v inc /clp diode forward voltage drop v ina current = 2a 0.55 v bat float voltage ltm8061-4.1 ltm8061-4.2 ltm8061-8.2 ltm8061-8.4 l l l l 4.08 4.06 4.18 4.16 8.16 8.12 8.36 8.32 4.1 4.2 8.2 8.4 4.12 4.14 4.22 4.24 8.24 8.28 8.44 8.48 v v v v v v v v maximum bat charge current (note 3) 1.70 2.0 a bat recharge threshold voltage ltm8061-4.1/ltm8061-4.2, relative to bat float voltage ltm8061-8.2/ltm8061-8.4, relative to bat float voltage C100 C200 mv mv bat precondition threshold voltage ltm8061-4.1/ltm8061-4.2 ltm8061-8.2 ltm8061-8.4 2.9 5.65 5.80 v v v bat precondition threshold hysteresis voltage 90 mv input supply current standby mode, not switching run = 0.4v 85 15 a a minimum bias voltage for proper operation 2.9 v v inc / clp threshold voltage 50 mv v inc / clp input bias current 200 na ntc range limit voltage (high) v ntc rising 1.25 1.36 1.45 v ntc range limit voltage (low) v ntc falling 0.265 0.29 0.315 v ntc threshold hysteresis for both high and low range limits 20 % ntc disable impedance (note 4) 250 500 k? ntc bias current v ntc = 0.8v 47.5 50 52.5 a rng/ss bias current 45 50 55 a current charge programming: v rng/ss / bat current 0.42 0.50 0.58 v/a run threshold voltage v run rising 1.15 1.20 1.25 v run hysteresis voltage 120 mv run input bias current 1 a chrg, fault output low voltage 10ma load on chrg, fault pins 0.4 v tmr charge/discharge current 25 a tmr disable threshold voltage 0.1 0.25 v c/10 termination current rng/ss open 200 ma operating frequency 0.9 1 1.1 mhz ltm8061 8061fa
4 for more information www.linear.com/ltm8601 efficiency vs i b at , 8.4v b at input current vs i b at , 4.1v b at input current vs i b at , 4.2v b at efficiency vs i b at , 4.1v b at efficiency vs i b at , 4.2v b at efficiency vs i b at , 8.2v b at electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm8061e is guaranteed to meet performance specifications from 0c to 125c. specifications over the C40c to 125c internal temperature range are assured by design, characterization and correlation with statistical process controls. ltm8061i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: the maximum bat charge current is reduced by thermal foldback. see the typical performance characteristics section for details. note 4: guaranteed by design and correlation. typical performance characteristics i bat (ma) 0 60 efficiency (%) 70 75 65 80 1000 90 8061 g01 500 1500 2000 85 v ina = 12v v ina = 24v i bat (ma) 0 60 efficiency (%) 70 75 65 80 1000 85 8061 g02 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 60 efficiency (%) 70 75 65 80 85 90 1000 95 8061 g03 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 75 efficiency (%) 79 81 77 83 85 87 1000 89 8061 g04 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 0 input current (ma) 200 300 100 400 500 600 700 800 1000 900 8061 g05 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 0 input current (ma) 200 300 100 400 500 600 700 800 1000 900 8061 g06 500 1500 2000 v ina = 12v v ina = 24v ltm8061 8061fa
5 for more information www.linear.com/ltm8601 typical performance characteristics input current vs i b at , 8.2v b at input current vs i b at , 8.4v b at i bias vs i b at , 4.1v b at rng/ss vs maximum i b at quiescent current vs v ina , run = 0v input standby current vs temperature, 4.1v b at i bias vs i b at , 4.2v b at i bias vs i b at , 8.2v b at i bias vs i b at , 8.4v b at i bat (ma) 0 0 input current (ma) 400 600 200 800 1000 1200 1400 1000 1600 8061 g07 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 0 i bias (ma) 5 10 15 20 1000 25 8061 g09 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 0 input current (ma) 400 600 200 800 1000 1200 1400 1000 1600 8061 g08 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 0 i bias (ma) 5 10 15 20 1000 30 25 8061 g10 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 0 i bias (ma) 5 10 15 20 1000 50 25 30 35 40 45 8061 g11 500 1500 2000 v ina = 24v v ina = 12v i bat (ma) 0 0 i bias (ma) 10 20 30 40 1000 60 50 8061 g12 500 1500 2000 v ina = 12v v ina = 24v bat current (ma) 0 0 rng/ss voltage (v) 0.2 0.4 0.6 0.8 1000 1.2 1.0 8061 g13 500 1500 2000 v ina (v) 0 0 quiescent current (a) 30 40 10 20 50 60 20 80 70 8061 g14 10 30 40 temperature (c) ?50 0 input standby current (ma) 1 2 3 4 50 6 5 8061 g15 0 100 v ina = 24v v ina = 12v ltm8061 8061fa
6 for more information www.linear.com/ltm8601 typical performance characteristics input standby current vs temperature, 4.2v b at input standby current vs temperature, 8.2v b at input standby current vs temperature, 8.4v b at temperature rise vs i b at , 4.1v b at temperature rise vs i b at , 4.2v b at temperature rise vs i b at , 8.2v b at temperature rise vs i b at , 8.4v b at temperature (c) ?50 0 input standby current (ma) 1 2 3 4 50 7 6 5 8061 g16 0 100 v ina = 24v v ina = 12v temperature (c) ?50 0 input standby current (ma) 1 2 3 4 50 9 6 5 8 7 8061 g17 0 100 v ina = 24v v ina = 12v temperature (c) ?50 0 input standby current (ma) 1 2 3 4 50 10 9 6 5 8 7 8061 g18 0 100 v ina = 12v v ina = 24v i bat (ma) 0 0 temperature rise (c) 5 10 15 20 25 1000 30 8061 g19 500 1500 2000 v ina = 24v v ina = 12v i bat (ma) 0 0 temperature rise (c) 5 10 15 20 25 1000 30 8061 g20 500 1500 2000 v ina = 24v v ina = 12v i bat (ma) 0 0 temperature rise (c) 5 10 15 20 25 1000 35 30 8061 g21 500 1500 2000 v ina = 12v v ina = 24v i bat (ma) 0 0 temperature rise (c) 5 10 15 20 25 1000 40 35 30 8061 g22 500 1500 2000 v ina = 12v v ina = 24v ltm8061 8061fa
7 for more information www.linear.com/ltm8601 pin functions gnd (bank 1): power and signal ground return. b at (bank 2): battery charge current output bus. the charge function operates to achieve the final float voltage at this pin. the auto-restart feature initiates a new charge cycle when the voltage at the bat pin falls 2.5% below the float voltage. once the charge cycle is terminated, the input bias current of the bat pin is reduced to minimize battery discharge while the charger remains connected. in most applications, connect bias to bat . v ina ( bank 3): anode of input reverse protection schottky diode. connect the input power here if input voltage pro - tection is desired. v inc /clp (bank 4): this pad bank connects to the cathode of the input reverse protection diode. in addition, system current levels can be monitored by connecting a sense resistor from this pin to the v in pin. additional system load is drawn from the v in pin connection, and maximum system load is achieved when v vinc/ clp C v vin = 50mv. the ltm8061 servos the charge current required to maintain programmed maximum system current. if this function is not desired, connect the v inc /clp pin to the v in pin (see the applications information section ). do not raise this pin above v in + 0.5v . v in (bank 5): charger input supply. apply c in here. con - nect the input power here if no input power rectification is required. bias ( pin g 7): the bias pin connects to the internal power bus. connect to a power source greater than 2.5v and less than 10v. in most applications, connect bias to bat . chrg (pin k7): open-collector charger status output. typically pulled up through a resistor to a reference volt- age. this status pin can be pulled up to voltages as high as v in and can sink currents up to 10ma. during a battery charge cycle, chrg is pulled low. when the charge cycle terminates, the chrg pin becomes high impedance. if the internal timer is used for termination, the pin stays low during the charge cycle until the charge current drops below a c/10 rate even though the charger will continue to top off the battery until the end-of-charge timer terminates the charge cycle. a temperature fault also causes this pin to be pulled low (see the applications information section). if run is low, or the ltm8061 is otherwise powered down, the state of the chrg pin is invalid. ntc (pin h6): battery temperature monitor pin. this pin is the input to the ntc (negative temperature coefficient) thermistor temperature monitoring circuit . this function is enabled by connecting a 10k, = 3380 ntc thermistor from the ntc pin to ground. the pin sources 50a, and monitors the voltage across the 10k thermistor. when the voltage on this pin is above 1.36v (t < 0c) or below 0.29v (t > 40c), charging is disabled and the chrg and fault pins are both pulled low. if internal timer termina - tion is being used, the timer is paused, suspending the charge cycle. charging resumes when the voltage on ntc returns to within the 0.29v to 1.36v active region. there is approximately 5c of temperature hysteresis associated with each of the temperature thresholds. the temperature monitoring function remains enabled while thermistor resistance to ground is less than 250k. if this function is not desired, leave the ntc pin unconnected. ltm8061 8061fa
8 for more information www.linear.com/ltm8601 pin functions rng/ss (pin h7): charge current programming/soft- start pin. this pin allows the maximum charge current to be reduced from the default 2a level, and can be used to employ a soft-start function. this pin has an effective range from 0v to 1v, with the maximum bat charge cur - rent determined by i bat . 50a is sourced from this pin, so the maximum charge current can be programmed by connecting a resistor (r rng/ss ) from rng/ss to ground, and the maximum battery charge current is: i bat = 2a ? v rng/ss i bat = 2a ? 50a ? r rng/ss where r rng/ss is less than or equal to 20k?. with the rng/ss pin left open, the charge current is 2a. soft-start functionality can be implemented by connect- ing a capacitor (c rng/ss ) from rng/ss to ground, such that the time required to charge the capacitor to 1v (full charge current) is the desired soft-start interval (t ss ). with no r rng/ss resistor applied, this capacitor value follows the relation: c rng/ss = 50a ? t ss the rng/ss pin is pulled low during fault conditions, allowing graceful recovery from faults should soft- start functionality be implemented. both the soft-start capaci - tor and the programming resistor can be implemented in parallel. all c/10 monitoring functions are disabled while v rng/ss is below 0.1v to accommodate long soft-start intervals . rng/ss voltage can also be manipulated using an active device, employing a pull-down transistor to disable charge current or to dynamically servo maximum charge current. manipulation of the rng/ss pin with active devices that have low impedance pull-up capability is not allowed (see the applications information section). fault (pin j7): open-collector fault status output. typi - cally pulled up through a resistor to a reference voltage. this status pin can be pulled up to voltages as high as v in , and can sink currents up to 10ma. this pin indicates charge cycle fault conditions during a battery charge cycle. a temperature fault causes this pin to be pulled low. if the internal timer is used for termination, a bad battery fault also causes this pin to be pulled low. if no fault condi - tions exist, the fault pin remains high impedance (see the applications information section). if run is low, or the ltm8061 is otherwise powered down, the state of the fault pin is invalid. tmr (pin j6): end-of-cycle timer programming pin. if a timer-based charge termination is desired, connect a capacitor from this pin to ground. full charge end-of cycle time (in hours) is programmed with this capacitor following the equation: t eoc = c timer ? 4.4 ? 10 6 a bad battery fault is generated if the battery does not reach the precondition threshold voltage within one - eighth of t eoc , or: t pre = c timer ? 5.5 ? 10 5 a 0.68f capacitor is typically used, which generates a timer eoc of three hours, and a precondition limit time of 22.5 minutes. if a timer-based termination is not desired, the timer function is disabled by connecting the tmr pin to ground. with the timer function disabled, charging terminates when the charge current drops below a c/10 rate, or i chg(max) /10. run (pin k6): precision threshold enable pin. the run threshold is 1.20v (rising), with 120mv of input hystere- sis. when in shutdown mode, all charging functions are disabled. the precision threshold allows use of the run pin to incorporate uvlo functions. if the run pin is pulled below 0.4v, the module enters a low current shutdown mode where the v in pin current is reduced to 15a. typical run pin input bias current is 1a. if the shutdown function is not desired, connect the pin to the v in pin. ltm8061 8061fa
9 for more information www.linear.com/ltm8601 block diagram 8061 bd v ina 8.2h sense resistor 10f 0.1f 0.1f run rng/ss tmr ntc bias gnd fault chrg v inc /clp v in bat current mode battery management controller internal compensation ltm8061 8061fa
10 for more information www.linear.com/ltm8601 applications information overview the ltm8061 is a complete monolithic, mid-power, li-ion battery charger, addressing high input voltage applications with solutions that use a minimum of external components . the product is available in four variants: 4.1v, 4.2v, 8.2v and 8.4v fixed float voltages, each using 1mhz constant- frequency, average current mode step- down architecture . a 2a power schottky diode is integrated within the module for reverse input voltage protection. a wide input range allows the operation to full charge from 6v to 32v for the ltm8061-4.1/ltm8061-4.2 and 11v to 32v for the ltm8061-8.2/ltm8061-8.4 versions. a precision thresh - old run pin allows incorporation of uvlo functionality using a simple resistor divider. the charger can also be put into a low current shutdown mode, in which the input supply bias is reduced to only 15a. the ltm8061 incorporates several degrees of charge current control freedom. the maximum charge current is internally set to approximately 2a. a maximum charge current programming pin (rng/ss) allows the charge current to be reduced from the default 2a level. the ltm8061 also incorporates an input supply current limit control feature (v inc /clp) that servos the battery charge current to accommodate overall system load requirements. the ltm8061 automatically enters a battery precondition mode if the sensed battery voltage is very low. in this mode, the charge current is reduced to 300ma. once the battery voltage climbs above the internally set precondition threshold (2.9v for the ltm8061-4.1/ltm8061-4.2, 5.65v for the ltm8061-8.2, and 5.8v for the ltm8061-8.4), the module automatically increases the maximum charge current to the full programmed value. the ltm8061 can use a charge current based c /10 termina - tion scheme, which ends a charge cycle when the battery charge current falls to one-tenth the programmed charge current. the ltm8061 also contains an internal charge cycle control timer, for timer- based termination. when using the internal timer, the charge cycle can continue beyond the c/10 level to top-off a battery . the charge cycle terminates when the programmed time elapses, typically chosen to be three hours. the chrg status pin continues to signal charging at a c/10 rate, regardless of which termination scheme is used. when the timer-based scheme is used, the device also supports bad battery detection, which triggers a system fault if a battery stays in precondition mode for more than one -eighth of the total programmed charge cycle time. once charging terminates and the ltm8061 is not actively charging, the device automatically enters a low current standby mode in which supply bias currents are reduced to 85a. if the battery voltage drops 2.5% from the full charge float voltage, the ltm8061 engages an automatic charge cycle restart. the device also automatically restarts a new charge cycle after a bad- battery fault once the failed battery is removed and replaced with another battery. the ltm8061 contains a battery temperature monitoring circuit . this feature, using a thermistor, monitors battery temperature and will not allow charging to begin, or will suspend charging, and signal a fault condition if the battery temperature is outside a safe charging range. the ltm8061 contains two digital open-collector outputs, which provide charger status and signal fault conditions. these binary coded pins signal battery charging, standby or shutdown modes, battery temperature faults and bad battery faults. for reference, c/10 and tmr based charging cycles are shown in figures 1 and 2. ltm8061 8061fa
11 for more information www.linear.com/ltm8601 8061 f01 battery voltage battery charge current run chrg fault maximum charge current precondition current c/10 0 amps float voltage recharge threshold precondition threshold 1 0 1 0 0 1 applications information 8061 f02 battery voltage battery charge current run chrg fault maximum charge current precondition current c/10 current automatic restart float voltage recharge threshold precondition threshold 1 0 1 0 0 < t eoc /8 t eoc 1 figure 1. typical c/10 terminated charge cycle (tmr grounded, time not to scale) figure 2. typical eoc ( timer-based) terminated charge cycle (capacitor connected to tmr, time not to scale) ltm8061 8061fa
12 for more information www.linear.com/ltm8601 applications information v in input supply the ltm8061 is biased directly from the charger input supply through the v in pin. this pin carries large switched currents, so a high quality, low esr decoupling capacitor is recommended to minimize voltage glitches on v in . a 4.7f capacitor is typically adequate for most charger applications. reverse protection diode the ltm8061 integrates a high voltage power schottky diode to provide input reverse voltage protection. the anode of this diode is connected to v ina , and the cath - ode is connected to v inc/clp . there is a small amount of capacitance at each end; please see the block diagram. bias pin considerations the bias pin is used to provide drive power for the internal power switching stage and operate other internal circuitry . for proper operation, it must be powered by at least 2.9v and no more than the absolute maximum rating of 10v. in most applications, connect bias to bat . when charging a 2-cell battery using a relatively high input voltage, the ltm8061 power dissipation can be reduced by connecting bias to a 3.3v source. b at decoupling capacitance in many applications, the internal bat capacitance of the ltm8061 is sufficient for proper operation. there are cases, however, where it may be necessary to add capacitance or otherwise modify the output impedance of the ltm8061. case 1: the module charger is physically located far from the battery and the added line impedance may interfere with the control loop. case 2: the battery esr is very small or very large; the ltm8061 controller is designed for a wide range, but some battery packs have an esr outside of this range. case 3: there is no battery at all. as the charger is designed to work with the esr of the battery , the output may oscillate if no battery is present. v in v inc /clp 8061 f03 ltm8061 input supply system load r clp figure 3. r clp sets the input supply current limit the optimum esr is about 100m?, but esr values both higher and lower will work. table 1 shows a sample of parts verified by linear technology: table 1. recommended b at capacitors part number description manufacturer 16tqc22m 22f, 16v, poscap sanyo 35svpd18m 18f, 35v, os-con sanyo tpsd226m025r0100 22f, 25v tantalum avx t495d226k025as 22f, 25v, tantalum kemet tpsc686m006r0150 68f, 6v, tantalum avx tpsb476m006r0250 47f, 6v, tantalum avx apxe100ara680me61g 68f, 10v aluminum nippon chemicon aps-150ell680mhb5s 68f, 25v aluminum nippon chemicon if system constraints preclude the use of electrolytic ca - pacitors, a series r-c network may be used. use a ceramic capacitor of at least 22f and an equivalent resistance of 100m?. clp : input current limit the ltm8061 contains a powerpath? control feature to support multiple load systems. the charger adjusts charge current in response to a system load if input supply current exceeds the programmed maximum value. maximum input supply current is set by connecting a sense resistor (r clp ) as shown in figure 3. the ltm8061 begins to limit the charge current when the voltage across the sense resistor is 50mv. the maximum input current is defined by: r clp = 0.05/(max input current) ltm8061 8061fa
13 for more information www.linear.com/ltm8601 figure 4. ltm8061 input current vs system load current with 1.5a input current limit 8061 f04 system load current ltm8061 input current (i vin ) ! 1.5a 1.0a 0.5a applications information a 1.5a system limit, for example, would use a 33m sense resistor. figure 4 gives an example of the system current for the situation where the input current happens to be 1a, and then gets reduced as the additional system load increases beyond 0.5a. the ltm8061 integrates the clp signal internally, so average current limiting is performed in most cases without the need for external filter elements. for example, to reduce the maximum charge current to 50% of the original value, set rng/ss to 0.5v. the neces - sary resistor value is: r rng/ss = 0.5v/50a = 10k this feature could be used, for example, to switch in a reduced charge current level. applying an active voltage can also be used to control the maximum charge current but only if the voltage source can sink current. figures 5 and 6 give two examples of circuits that control the charg - ing current by sinking current. active circuits that source current cannot be used to drive the rng/ss pin. care must be taken not to exceed the 2.5v absolute maximum voltage on the pin. rng/ss 8061 f05 ltm8061 logic high = half current 10k rng/ss 8061 f06 ltm8061 servo reference + ? figure 5. using the rng/ss pin for digital control of maximum charge current figure 6. driving the rng/ss pin with a current-sink active servo amplifier rng/ss: dynamic charge current adjust the ltm8061 gives the user the capability to reduce the maximum charge current dynamically through the rng/ ss pin. the maximum charge current of the ltm8061 is 2a and the control voltage range on the rng/ss pin is 1v, so the maximum charge current can be expressed as: i bat = 2a ? v rng/ss where i bat is the maximum charge current and v rng/ss is between 0v to 1v. voltages higher than 1v have no effect on the maximum charge current. the ltm8061 sources 50a from the rng/ss pin, such that a current control voltage can be set by simply connect - ing an appropriately valued resistor to ground, following the equation: r rng/ss = v rng/ss / 50a ltm8061 8061fa
14 for more information www.linear.com/ltm8601 applications information rng/ss: soft-start soft-start functionality is also supported by the rng/ss pin. 50a is sourced from the rng/ss pin, so connect - ing a capacitor from the rng/ss pin to ground (c rng/ss in figure 7) creates a linear voltage ramp. the maximum charge current follows this voltage. thus, the charge cur - rent increases from zero to the fully programmed value as the capacitor charges from 0v to 1v. the value of c rng/ ss is calculated based on the desired time to full current (t ss ) following the equation: c rng/ss = 50a ? t ss the rng/ss pin is pulled to ground internally when charg - ing terminates so each new charge cycle begins with a soft-start cycle. rng/ss is also pulled to ground during bad - battery and ntc fault conditions , producing a graceful recovery from a fault. if the battery is removed from an ltm8061 charger that is configured for c/10 termination, a low amplitude sawtooth waveform appears at the charger output, due to cycling between termination and recharge events. this cycling results in pulsing at the chrg output. an led connected to this pin will exhibit a blinking pattern, indicating to the user that a battery is not present. the frequency of this blinking pattern is dependent on the output capacitance. c/10 termination the ltm8061 supports a low current based termination scheme, where a battery charge cycle terminates when the charge current falls below one-tenth the programmed charge current, or about 200ma. this termination mode is engaged by shorting the tmr pin to ground. when c/10 termination is used, an ltm8061 charger sources battery charge current as long as the average current level remains above the c/10 threshold. as the full-charge float voltage is achieved, the charge current falls until the c/10 threshold is reached, at which time the charger terminates and the ltm8061 enters standby mode. the chrg status is high impedance when the charger is sourcing less than c/10. there is no provision for bad- battery detection if c/10 termination is used. timer termination the ltm8061 supports a timer- based termination scheme, where a battery charge cycle terminates after a specific amount of time elapses. timer termination is enabled by connecting a capacitor (c timer ) from the tmr pin to gnd. the timer cycle time span (t eoc ) is determined by c timer in the equation: c timer = t eoc ? 2.27 ? 10 C7 (hours) when charging at a 1c rate, t eoc is commonly set to three hours, which requires a 0.68f capacitor. the chrg status pin continues to signal charging, regard - less of which termination scheme is used. when timer termination is used, the chrg status pin is pulled low during a charge cycle until the charge current falls below the c/10 threshold. the charger continues to top off the battery until timer eoc, when the ltm8061 terminates the charge cycle and enters standby mode. rng/ss 8061 f07 ltm8061 c rng/ss figure 7. using the rng/ss pin for soft-start status pins the ltm8061 reports charger status through two open- collector outputs, the chrg and fault pins. these pins can accept voltages as high as v in , and can sink up to 10ma when enabled. the chrg pin indicates that the charger is delivering current at greater than a c/10 rate, or one-tenth of the programmed charge current. the fault pin signals bad- battery and ntc faults. these pins are binary coded as shown in table 2: table 2. status pin state chrg fault status high high standby, shutdown mode, or charging at less than c/10 high low bad- battery fault (precondition timeout/ eoc failure) low high normal charging at c/10 or greater low low ntc fault (pause) ltm8061 8061fa
15 for more information www.linear.com/ltm8601 applications information termination at the end of the timer cycle only occurs if the charge cycle was successful. a successful charge cycle occurs when the battery is charged to within 2.5% of the full-charge float voltage. if a charge cycle is not success - ful at eoc, the timer cycle resets and charging continues for another full timer cycle. when v bat drops 2.5% from the full-charge float voltage, whether by battery loading or replacement of the battery , the charger automatically resets and starts charging. preconditioning and bad-battery fault the ltm8061 has a precondition mode, in which charge current is limited to 15% of the maximum charge current, roughly 300ma. precondition mode is engaged if the volt - age on the bat pin is below the precondition threshold, or approximately 70% of the float voltage. once the bat voltage rises above the precondition threshold, normal full- current charging can commence. the ltm8061 incorporates 90mv hysteresis to avoid spurious mode transitions. bad- battery detection is engaged when using timer termina - tion. this fault detection feature is designed to identify failed cells. a bad- battery fault is triggered when the voltage on bat remains below the precondition threshold for greater than one-eighth of a full timer cycle (one-eighth eoc). a bad- battery fault is also triggered if a normally charging battery re-enters precondition mode after one-eighth eoc. when a bad- battery fault is triggered, the charge cycle is suspended, and the chrg status pin becomes high impedance. the fault pin is pulled low to signal that a fault has been detected. the rng/ss pin is also pulled low during this fault to accommodate a graceful restart in the event that a soft-start function is incorporated (see the rng/ss: soft-start section). cycling the chargers power or shutdown function initiates a new charge cycle, but the ltm8061 charger does not require a manual reset. once a bad- battery fault is detected, a new timer charge cycle initiates if the bat pin exceeds the precondition threshold voltage. during a bad- battery fault , a small current is sourced from the charger ; removing the failed battery allows the charger output voltage to rise above the preconditioning threshold voltage and initiate a charge cycle reset. a new charge cycle is started by con - necting another battery to the charger output. battery temperature fault: ntc the ltm8061 can accommodate battery temperature monitoring by using an ntc (negative temperature coef - ficient) thermistor close to the battery pack. the tem - perature monitoring function is enabled by connecting a 10k, = 3380 ntc thermistor from the ntc pin to ground. if the ntc function is not desired, leave the pin unconnected. the ntc pin sources 50a, and monitors the voltage dropped across the 10k thermistor. when the voltage on this pin is above 1.36v (0c) or below 0.29v (40c), the battery temperature is out of range, and the ltm8061 triggers an ntc fault. the ntc fault condition remains until the voltage on the ntc pin corresponds to a temperature within the 0c to 40c range. both hot and cold thresholds incorporate 20% hysteresis, which equates to about 5c. if higher operational charging temperatures are desired, the temperature range can be expanded by adding series resistance to the 10k ntc resistor. adding a 909 resistor will increase the effective temperature threshold to 45c, for example. during an ntc fault, charging is halted and both status pins are pulled low. if timer termination is enabled, the timer count is suspended and held until the fault condition is cleared. the rng/ss pin is also pulled low during this fault to accommodate a graceful restart in the event that a soft-start function is being incorporated (see the rng/ ss: soft-start section). thermal foldback the ltm8061 contains a thermal foldback protection fea - ture that reduces charge current as the internal temperature approaches 125c. in most cases, internal temperatures servo such that any overtemperature conditions are relieved with only slight reductions in maximum charge current. in some cases, the thermal foldback protection feature can reduce charge currents below the c/10 threshold. in applications that use c/10 termination (tmr = 0v), the ltm8061 will suspend charging and enter standby mode until the overtemperature condition is relieved. pcb layout ltm8061 8061fa
16 for more information www.linear.com/ltm8601 figure 8. layout showing suggested external components, power planes and thermal vias applications information most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of ltm8061 integration. the ltm8061 is nevertheless a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 8 for a suggested layout. ensure that the grounding and heat sinking are acceptable. 1. place the c in capacitor as close as possible to the v in and gnd connection of the ltm8061. 2. if used, place the c bat capacitor as close as possible to the bat and gnd connection of the ltm8061. 3. place the c in and c bat ( if used ) capacitors such that their ground current flows directly adjacent or underneath the ltm8061. 4. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8061. 5. for good heat sinking, use vias to connect the gnd cop - per area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 8. the ltm8061 can benefit from the heat-sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8061. however, these capacitors can cause problems if the ltm8061 is plugged into a live input supply (see application note 88 for a complete dis - cussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit , and the voltage at the v in pin of the ltm8061 can ring to more than twice the nominal c ss c bat bias rng/ss ntc tmr v in fault chrg v inc /clp v ina gnd thermal vias bat c in (optional) (optional) run clp sense resistor 8061 f08 ltm8061 8061fa
17 for more information www.linear.com/ltm8601 input voltage, possibly exceeding the ltm8061s rating and damaging the part. if the input supply is poorly con - trolled or the user will be plugging the ltm8061 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the v in net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filter - ing and can slightly improve the efficiency of the circuit , though it is physically large. thermal considerations the temperature rise curves given in the typical perfor - mance characteristics section gives the thermal perfor - mance of the ltm8061. these curves were generated by the ltm8061 mounted to a 58cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended sys - tems line, load and environmental operating conditions. the junction to air and junction to board thermal resistances given in the pin configuration diagram may also be used to estimate the ltm8061 internal temperature. these thermal coefficients are determined for maximum output power per applications information jesd 51-9, jedec standard, test boards for area array surface mount package thermal measurements through analysis and physical correlation. bear in mind that the actual thermal resistance of the ltm8061 to the printed circuit board depends upon the design of the circuit board. the internal temperature of the ltm8061 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8061. the bulk of the heat flow out of the ltm8061 is through the bottom of the module and the lga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. the ltm8061 is equipped with a thermal foldback that reduces the charge current as the internal temperature approaches 125c. this does not mean that it is impos - sible to exceed the 125c maximum internal temperature rating . the ambient operating condition and other factors may result in high internal temperatures. finally, be aware that at high ambient temperatures the internal schottky diode will have significant leakage current increasing the quiescent current of the ltm8061. ltm8061 8061fa
18 for more information www.linear.com/ltm8601 typical applications v ina v inc /clp v in run rng/ss tmr ntc bat bias chrg fault gnd 8061 ta02 ltm8061-8.4 v in 11.5v to 32v 4.7f 10k (1a charge current) two cell 8.4v battery + tw o cell 1a li-ion battery charger with c/10 termination and reverse input protection single cell 2a li-ion battery charger with 3 hour timer termination and reverse input protection v ina v inc /clp v in run rng/ss tmr ntc bat bias chrg fault gnd 8061 ta03 ltm8061-4.2 v in 6v to 32v 4.7f single cell 4.2v battery 0.68f + ltm8061 8061fa
19 for more information www.linear.com/ltm8601 package description notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 5. primary datum -z- is seating plane 6. t he total number of pads: 77 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature symbol aaa bbb eee tolerance 0.15 0.10 0.05 4.22 ? 4.42 detail b detail b substrate mold cap 0.27 ? 0.37 3.95 ? 4.05 // bbb z z 15 bsc package top view 9 bsc 4 pad 1 corner x y aaa z aaa z detail a 12.70 bsc 1.27 bsc 7.62 bsc l k j h g f e d c b package bottom view 3 pads see notes a 1 2 3 4 5 6 7 detail a 0.635 0.025 sq. 76x s y x eee suggested pcb layout top view 0.000 1.270 1.270 2.540 2.540 3.810 3.810 5.080 5.080 6.350 6.350 3.810 1.270 2.540 0.000 1.270 3.810 2.540 lga 77 1212 rev b pad 1 dia (0.635) 0.9525 1.5875 0.9525 1.5875 4.1275 3.4925 package in tray loading orientation ltmxxxxxx module tray pin 1 bevel component pin ?a1? lga package 77-lead (15mm 9mm 4.32mm) (reference ltc dwg # 05-08-1856 rev b) 7 package row and column labeling may vary among module products. review each package layout carefully ! 7 see notes ltm8061 8061fa
20 for more information www.linear.com/ltm8601 package description table 3. pin assignment table (arranged by pin number) pin number pin number pin number pin number pin number pin number a1 gnd b1 gnd c1 gnd d1 gnd e1 gnd f1 gnd a2 gnd b2 gnd c2 gnd d2 gnd e2 gnd f2 gnd a3 gnd b3 gnd c3 gnd d3 gnd e3 gnd f3 gnd a4 gnd b4 gnd c4 gnd d4 gnd e4 gnd f4 gnd a5 gnd b5 gnd c5 gnd d5 gnd e5 gnd f5 gnd a6 bat b6 bat c6 bat d6 bat e6 bat f6 bat a7 bat b7 bat c7 bat d7 bat e7 bat f7 bat pin number pin number pin number pin number pin number g1 gnd h1 gnd j1 gnd k1 v in l1 v in g2 gnd h2 gnd j2 gnd k2 v in l2 v in g3 gnd h3 gnd j3 gnd k3 v inc / clp l3 v inc / clp g4 gnd h4 gnd j4 gnd k4 v inc / clp l4 v inc / clp g5 gnd h5 gnd j5 gnd k5 v ina l5 v ina g6 gnd h6 ntc j6 tmr k6 run l6 v ina g7 bias h7 rng/ss j7 fault k7 chrg l7 v ina package photograph ltm8061 8061fa
21 for more information www.linear.com/ltm8601 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 2/14 input supply current; condition; added not switching 3 ltm8061 8061fa
22 for more information www.linear.com/ltm8601 ? linear technology corporation 2010 lt 0214 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltm8061 related parts typical application tw o cell 2a li-ion battery charger with thermistor, c/10 termination and reverse input protection v ina v inc /clp v in run rng/ss tmr ntc bat bias chrg fault gnd 8061 ta04 ltm8061-8.4 v in 11.5v to 32v 4.7f two cell 8.4v battery + t = 3380 thermistor part number description comments ltm4600 10a dc/dc module regulator basic 10a dc/dc module, 15mm 15mm 2.8mm lga ltm4600 hvmpv military plastic 10a dc/dc module regulator C55c to 125c operation, 15mm 15mm 2.8mm lga ltm4601/ ltm4601a 12a dc/dc module regulator with pll, output tracking /margining and remote v out sensing synchronizable, polyphase ? operation, ltm4601-1 version has no remote sensing ltm4602 6a dc/dc module regulator pin compatible with the ltm4600 ltm4603 6a dc/dc module regulator with pll and output tracking /margining and remote v out sensing synchronizable, polyphase operation, ltm4603-1 version has no remote sensing, pin compatible with the ltm4601 ltm4604 4a low v in dc/dc module regulator 2.375v v in 5v, 0.8v v out 5v, 9mm 15mm 2.3mm lga ltm4608 8a low v in dc/dc module regulator 2.375v v in 5v, 0.8v v out 5v, 9mm 15mm 2.8mm lga ltm8020 200ma, 36v dc/dc module regulator fixed 450khz frequency, 1.25v v out 5v, 6.25mm 6.25mm 2.32mm lga ltm8022 1a, 36v dc/dc module regulator adjustable frequency, 0.8v v out 5v, 9mm 11.25mm 2.82mm lga, pin compatible to the ltm8023 ltm8023 2a, 36v dc/dc module regulator adjustable frequency, 0.8v v out 5v, 9mm 11.25mm 2.82mm lga, pin compatible to the ltm8022 ltm8025 3a, 36v dc/dc module regulator 0.8v v out 24v, 9mm 15mm 4.32mm lga ltm8061 8061fa

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