cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 1/9 MTN8N50E3 cystek product specification n-channel enhancement mode power mosfet bv dss : 500v r ds(on) : 0.85 (max) i d : 8a MTN8N50E3 description the MTN8N50E3 is a n-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. the to-220 package is universally preferred for all commercial-industrial applications. features ? low on resistance ? simple drive requirement ? low gate charge ? fast switching characteristic ? rohs compliant package applications ? ballast ? inverter symbol outline to-220 MTN8N50E3 g gate d drain s source g d s
cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 2/9 MTN8N50E3 cystek product specification absolute maximum ratings (t c =25 c) parameter symbol limits unit drain-source voltage (note 1) v ds 500 v gate-source voltage v gs 30 v continuous drain current i d 8* a continuous drain current @t c =100c i d 4.8* a pulsed drain current @ v gs =10v (note 2) i dm 32* a single pulse avalanche energy (note 3) e as 290 mj avalanche current (note 2) i ar 8 a repetitive avalanche energy (note 2) e ar 12.5 mj peak diode recovery dv/dt (note 4) dv/dt 3.5 v/ns maximum temperature for solder ing @ lead at 0.125 in(3.175mm) from case for 10 seconds t l 300 c w total power dissipation (t c =25 ) linear derating factor above 25 p d 125 1.0 w/ c operating junction and storage temperature tj, tstg -55~+150 c *drain current limited by maximum junction temperature note : 1 . t j =+25 to +150 . 2 . repetitive rating; pulse width limited by maximum junction temperature. 3 . i sd =8a, di/dt<100a/ s, v dd cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 3/9 MTN8N50E3 cystek product specification characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 500 - - v v gs =0, i d =250 a ? bv dss / ? tj - 0.6 - v/ c reference to 25c, i d =250 a v gs(th) 2.0 - 4.0 v v ds = v gs , i d =250 a *g fs - 5 - s v ds =15v, i d =4a i gss - - 100 na v gs = 30 - - 1 v ds =500v, v gs =0 i dss - - 25 a v ds =400v, v gs =0, tj=125 c *r ds(on) - 0.78 0.85 v gs =10v, i d =4a dynamic *qg - 30 - *qgs - 5 - *qgd - 16 - nc i d =8a, v dd =250v, v gs =10v *t d(on) - 14 - *tr - 23 - *t d(off) - 49 - *t f - 20 - ns v dd =250v, i d =8a, v gs =10v, r g =10 ciss - 1300 - coss - 310 - crss - 120 - pf v gs =0v, v ds =25v, f=1mhz source-drain diode *v sd - - 1.5 v i s =8a, v gs =0v *i s - - 8 *i sm - - 32 a v d =v g =0, v s =1.3v *trr - 460 - ns *qrr - 4.2 - c v gs =0, i f =8a, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping marking MTN8N50E3 to-220 (rohs compliant) 50 pcs/tube, 20 tubes/box, 4 boxes / carton 8n50
cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 4/9 MTN8N50E3 cystek product specification typical characteristics typical output characteristics 0 4 8 12 16 20 0 102030405060 drain-source voltage -vds(v) drain current - id(a) vgs=4.5v 15v 10v 9v 5v 5.5v 6v 7v static drain-source on-resistance vs ambient temperature 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -100 -50 0 50 100 150 200 ambient temperature-ta(c) static drain-source on-state resistance-rds(on)() id=4a, vgs=10v static drain-source on-state resistance vs drain current 0 0.5 1 1.5 0.1 1 10 100 drain current-id(a) static drain-source on-state resistance-rds(on)() vgs=10v drain current vs gate-source voltage 0 4 8 12 16 20 0 5 10 15 20 gate-source voltage-vgs(v) drain current-id(on)(a) ta=25c v ds =30v v ds =10v static drain-source on-state resistance vs gate-source voltage 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 024681012 gate-source voltage-vgs(v) static drain-source on-state resistance-rds(on)() id=4a ta=25c forward drain current vs source-drain voltage 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 source drain voltage -vsd(v) forward current-if(a) vgs=0v ta=25c ta=150c
cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 5/9 MTN8N50E3 cystek product specification typical characteristics(cont.) capacitance vs reverse voltage 10 100 1000 10000 0 5 10 15 20 25 30 drain-to-source voltage-vds(v) capacitance-(pf) ciss coss crss f=1mhz brekdown voltage vs ambient temperature 450 500 550 600 650 -100 -50 0 50 100 150 200 ambient temperature-tj(c) drain-source breakdown voltage bvdss(v) id=250a, vgs=0v maximum safe operating area 0.01 0.1 1 10 100 1 10 100 1000 drain-source voltage -vds(v) drain current --- id(a) o p eration in this area is limited by rds(on) dc 100ms 10ms 1ms 100 s 10 s tc=25c, tj=150c single pulse gate charge characteristics 0 2 4 6 8 10 12 0 6 12 18 24 30 36 total gate charge---qg(nc) gate-source voltage---vgs(v) id=8a vds=90v vds=250v vds=360v maximum drain current vs case temperature 0 1 2 3 4 5 6 7 8 9 10 25 50 75 100 125 150 175 case temperature---tc(c) maximum drain current---id(a)
cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 6/9 MTN8N50E3 cystek product specification typical characteristics(cont.) transient thermal response curves 0.001 0.01 0.1 1 10 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) z jc (t), thermal response single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.z jc (t)=1 c/w max. 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *z jc (t)
cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 7/9 MTN8N50E3 cystek product specification test circuit and waveforms
cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 8/9 MTN8N50E3 cystek product specification test circuit and waveforms(cont.)
cystech electronics corp. spec. no. : c742e3 issued date : 2009.10.01 revised date : 2011.03.21 page no. : 9/9 MTN8N50E3 cystek product specification to-220 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.2441 0.2598 6.20 6.60 i - * 0.1508 - * 3.83 b 0.3386 0.3543 8.60 9.00 k 0.0299 0.0394 0.76 1.00 c 0.1732 0.1890 4.40 4.80 m 0.0461 0.0579 1.17 1.47 d 0.0492 0.0571 1.25 1.45 n - * 0.1000 - * 2.54 e 0.0142 0.0197 0.36 0.50 o 0.5217 0.5610 13.25 14.25 g 0.3858 0.4094 9.80 10.40 p a b e g i k m o p 3 2 1 c n h d 4 marking: cys 8n50 1 2 3 device name date code 3-lead to-220 plastic package cystek package code: e3 style: pin 1.gate 2.drain 3.source 4.drain 0.5787 0.6024 14.70 15.30 h - * 0.6398 - * 16.25 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: kfc ; pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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