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  may 2013 docid024196 rev 1 1/26 AN4242 application note new generation of 650 v sic diodes introduction for many years st has been a worldwide leader in high voltage rectifiers dedicated to energy conversion. during the last decade, el ectronic systems have followed a continuous trend towards higher power density and more energy savings driven by governments? environmental awareness. power-supply designers are permanently confronted with stringent efficiency regulations (energy star , 80plus, european efficiency?). they are forced to consider the use of new power conver ter topologies and more efficient electronic components such as high-voltage silicon-carbide (s ic) schottky rectifiers. to help them face this challenge, st developed in 2008 a first family of 600 v sic diodes. after having sold millions of pieces, st?s re liability and know-how is conf irmed on these new components using wide band gap materials. in hard-switching applications such as high end server and telecom power supplies, sic schottky diodes show significant power losses reduction and are commonly used. a growing use of those rectifiers is also reco rded in solar inverters, motor drives, usp and hev applications. however, the high cost of th is technology tends to drive designers to use it at high current-density levels (3 to 5 times higher than standard si diodes), inducing more constraints on the diode. indeed, the silicon-carbi de material features a positive thermal coefficient potentially leading to some inst ability and lower current- surge robust ness than silicon diodes. st decided to review the de sign and develop a seco nd generation of sic diodes offering an enhanc ed current capability while still feat uring an attractive switching-off behavior. the peak reverse voltage was also increased to 650 v in order to ensure a safer operation in certain designs. typical applications (non-exhaustive list) ? charging station ? atx power supply ? ac/dc power management unit, high voltage, and other topologies ? desktop and pc power supply ? server power supply ? uninterruptible power supply ? photovoltaic string and central inverter architecture ? photovoltaic power optimizer architecture ? photovoltaic microinverter grid-connected architecture ? photovoltaic off-grid architecture ? telecom power www.st.com
contents AN4242 2/26 docid024196 rev 1 contents 1 features of the sic diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 turn off behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.1 comparison with si bipolar diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.2 capacitive charge (qc) measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 other characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3.1 low leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3.2 ?c? thermal coefficient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 forward thermal runaway . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 thermal runaway risk in regular working mode . . . . . . . . . . . . . . . . . . . . . 8 2.2 thermal runaway risk in transient phase . . . . . . . . . . . . . . . . . . . . . . . . . .11 3 new 650 v jbs sic diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 device structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 comparison between first and second generation of sic diodes . . . . . . . 13 3.2.1 forward voltage comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2.2 ifsm pspice simulation: comparis on between 1st and 2nd generation 15 3.2.3 ifsm datasheet comparison between sic g2 and sic g1 . . . . . . . . . . 16 3.3 jbs structure trade-off: current surge capability versus qrr . . . . . . . . . . 17 3.3.1 forward characteristics comparis on between st?s sic 2nd generation and other jbs designs 17 3.3.2 no recovery charge area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3.3 pspice electro-thermal simulation result . . . . . . . . . . . . . . . . . . . . . . . . 19 4 efficiency measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1 di/dt optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.2 example of efficiency measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
docid024196 rev 1 3/26 AN4242 features of the sic diodes 1 features of the sic diodes 1.1 turn off behavior 1.1.1 comparison with si bipolar diode the benefits brought by silicon-carbide diodes on the switching losses in the applications working in continuous-conduction mode (such as pfc applications) are already well known. the capacitive nature of the re covery current allows constant turn-off characteristics when the temperature increases. in contrast the turn-off behavior of bipolar diodes is characterized by a strong dependency on ju nction temperature, di/dt slope and forward current level (see figure 1 ). thanks to their properties, sic diodes allow significant reduction of power losses in the associated mosfets when switched-on. they also permit new optimization options for the power converter (for example, increasing the switching frequency and speed, lowering the size of passive components, snubber-circuits and emi filters). figure 1. switching behavior comparison between si and sic diodes for t j =75 c and t j =125 c the capacitive recovery current is generated by the charge of the junction capacitance c j under a certain reverse voltage and corresponds to a quantity of stored charges qc. 1.1.2 capacitive charge (q c ) measurement some confusion exists about the measurement conditions of qc. a comparison between the switch-off behavior and the integral of the current used to estimate qc is shown in figure 2 . figure 2 a and figure 2 b show measurements at low forward current (i f =1 a) and low di/dt slope (50 a/s), with and without reverse voltag e across the diode. a certain inaccuracy of the measurement of qc can be observed. it is linked to the probe, which features its own equivalent capacitance. figure 2 c shows a measurement at i f =2 a and a high di/dt slope (200 a/s) without any probe voltage. with such a high value of current-slope some oscillations appear. taking into account the total capacitive current until t 0 when the reverse voltage reaches v r , qc measured by the integral of the current is similar to the one in figure 2 b. 8 a bipolar diode 8 a tandem (2 x 300 v diodes in series) 8 a sic diode v r =380 v, i f =8 a, di/dt=200 a/s, tj=125 c 20 ns/div 2 a/div v r =380 v, i f =8 a, di/dt=200 a/s, tj=75 c 20 ns/div 2 a/div 8 a bipolar diode 8 a tandem (2 x 300 v diodes in series) 8 a sic diode
features of the sic diodes AN4242 4/26 docid024196 rev 1 figure 2. qc measurement of a 6 a sic diode at i f = 1 a, t j = 25 c, v r = 400 v, di/dt = 50 a/s to avoid false readings due to some measurement inaccuracy, a theoretical approach is preferred. the quantity of charge q du ring a certain period of time [0-t 0 ] is delimited by the reverse voltage variation v across the junction capacitance c j between 0 and v r and is given by the following formulas: equation 1 with equation 2 qc = 19.6 nc qc = 24.2 nc qc=20.4nc voltage probe 0 t 0 a. with voltage probe b. without voltage probe c. i = 2 a, di/dt = 200 a/s f   0 qc dq = 0 t0 i(t) dt i(t) = c j dv(t) dt
docid024196 rev 1 5/26 AN4242 features of the sic diodes after simplification and introduction of the junction capacitance variation versus the reverse voltage c j (v), qc is defined by the following formula: equation 3 this relation demonstrates that qc is defined by the integral of the junction capacitance c j between 0 and v r , the voltage reapplied on the diode. this theoretical approach allows the direct and accurate evaluation of qc, avoi ding the inaccuracy introduced by potential measurement problems. the strict expression of the energy stocked in the junction capacitor for a given reverse voltage can be determined by: equation 4 due to the non-linearity of the junction capaci tance versus the reverse voltage, this relation is different from the traditional energy formula ? c v2 (or ? q v), which is valid only when considering a constant capacitance. 1.2 forward characteristics another main feature of sic diodes is t he variation of the forward voltage drop (v f ) with the junction temperature. figure 3 shows the forward current versus forw ard voltage drop characteristics for 3 different junction temperature levels. a crossing-point can be observed at a certain level of current i c . when the current is lower than this level, the temperature coefficient of the forward voltage drop ( ? v f ) is negative. when the current is higher, it becomes positive. the same crossing point exists for traditional silicon diodes, but it appears at a much higher current level (>10 times the nominal current). this is linked to the higher forward current density of sic diodes.  qc(v ) = r v r 0 cj(v) dv  qc(v ) = r v r 0 cj(v) v dv
features of the sic diodes AN4242 6/26 docid024196 rev 1 figure 3. st?s stpsc806 first generation: typical forward voltage drop versus forward current as a consequence, the working area of sic rectifiers usua lly corresponds to ? v f > 0, which leads to an increase of the forward voltage drop with the junction temperature, meaning an increase of the conduction power losses, hence an increase of the temperature and so on. this electro-thermal mechanism results in a ther mal runaway loop. the effect is explained in section 2 . 1.3 other characteristics 1.3.1 low leakage current the new generation of 650 v sic diode offers some low leakage current values similar to the 600 v si counterparts. therefore the reverse power losses defined in pfc by the equation 5 stays negligible as showed in table 1 . equation 5 with equation 6 0 2 4 6 8 10 12 14 16 0.0 i fm (a) t j =150 c t j t j t j t j =25 c t j =25 c v fm (v) =175 c 0.5 1.0 1.5 2.0 2.5 3.0 table 1. leakage current and reverse losses comparison in pfc @90vac between si and sic diode product i r @ v r = v rrm p rev in pfc @ v in = 90 v, v out = 400 v typical / maximum typical stth8r06d 35 / 400 a @ 125 c 0.011 stpsc806d 150 / 1000 a @ 125 c 0.047 stpsc8h06d 65 / 335 a @ 150 c 0.02 p (t) = v i (v ,t) rev j av r r r j   av = 1 - 2 2 v  in  v out
docid024196 rev 1 7/26 AN4242 features of the sic diodes 1.3.2 ?c? ther mal coefficient the ?c? thermal coefficient represents the leakage current dependence on the junction temperature. the leakage current increases by an exponential law with the junction temperature. knowing a reference point i r (v r ,t jref ) and the value of the thermal coefficient ?c?, one can easily calculate the leakage current at a given temperature t j using the following formula: equation 7 where v r is the reverse voltage applied across the diode. each diode has its own coefficient that can be calculated using two points as follows: equation 8 if the sic schottky diodes have low leakage currents and they ha ve also a smaller temperature dep endence compared to the si coun terparts. as illustrated in table 2 , typically the ?c? thermal coefficient should be around 2 times lower than the si diodes. the feature of low dependence with the t j is interesting to push back the limit of thermal runaway due to the powe r reverse losses. regarding the st ability criterion formula linked to p prev given by equation 9 , the interest for the use at high t j of small packages with high thermal resistance becomes certain. equation 9 table 2. ?c? thermal coefficient comparison between si and sic diode product i r 1 @ v r = 400 v, t j 1i r 2 @ v r = 400 v, t j 2 c coefficient stth8r06 8 a @ 125 c 50 a @ 150 c 0.070 stpsc8h065d 4 a @ 150 c 8.5 a @ 175 c 0.030 i (v ,t ) = i (v ,t ) e r r j r r jref c(t - t ) j jref c = 1 t-t jref2 jref1 ln i(v,t ) r r jref2 i(v,t ) r r jref1   
dp (t ) prev j dt j 1 r th(j-a)
forward thermal runaway AN4242 8/26 docid024196 rev 1 2 forward thermal runaway in some particular application conditions a thermal runaway loop can be triggered (see figure 4 ) and the thermal system of the diode may become unstable. figure 4. thermal runaway loop two kinds of application conditions can be linked to the thermal runaway risk: ? the stationary regime during the regular working mode ? the critical transient phases. 2.1 thermal runaway risk in regular working mode during the regular operating mode, the average current in the diode can modeled with a constant current generator as shown in figure 5 . figure 5. simple electrical model the electrical model given by equation 10 , simulates the variation of the forward voltage drop versus the junction temperature for a given current i 0 . equation 10 equation 11 equation 12 v t0 (t j ) is the v f value for a fixed t j when i f is null. the inverse function of r d (t j ) represents the straight slope between 2 forward curr ent levels and the threshold voltage v t0 for a fixed t j v f (t j ) losses p(t j ) positive loop 0 io r d (t j ) v t 0 (t j ) v (i ,t ) = v + (t - 150) + [r + (t - 150)] i f0 j t0 v j d r j 0 150 t0 d v (t ) = v + (t - 150) t0 j t0 v j 150 t0 r (t ) = r + (t - 150) dj d r j 150 d
docid024196 rev 1 9/26 AN4242 forward thermal runaway t j . ? v t0 and ? r d are thermal coefficients. they repres ent the junction temperature impact on v t0 and r d . using the electrical model previously de fined, the conduction power losses p(t j ) can be estimated. using the analogy be tween thermal and electrical units, a simple electro-thermal model is described in figure 6 . the thermal model is defined by the thermal resistance r th(j-a) and the thermal capacitance c th(j-a) junction to ambient. figure 6. simple electro-thermal model the resolution of the above electro-thermal system gives the t j (t) expression used to find the thermal runaway limit and to highlight th e stability condition of the diode. the equation giving the conduction po wer losses versus t j is the following: equation 13 with equation 14 and equation 15 a simplified version is: equation 16 the global system equation is defined by: equation 17 or again equation 18 solving the differential equation gives the stability conditi on on the junction temperature: t amb c th(j-a) t j r th(j-a) p(tj)=i 0 v f (tj,i 0 ) p(t ) = [v + (t - 150)] i + [r + (t - 150)] i jt0vj0drj0 2 150 t0 150 d a = i (v - 150 ) + i (r - 150 ) 0t0 v 0 2 dr 150 t0 150 d  i t + i t (i + i ) t b t 0v j0 2 rj = 0v 0 2 rj = j t0 d t0 d p(t ) = a + b t jj   
t=t + r j amb th p(t ) - c jth dt j dt t (1 - b r ) + r c jththth dt j dt =t +a r amb th
forward thermal runaway AN4242 10/26 docid024196 rev 1 equation 19 due to the exponential function in the expression of t j (t), if b r th - 1 > 0 then the limit leads to the diode destruction if the current i 0 is not interrupted. thus, the stability condition is given by: equation 20 so equation 21 the detailed expression gives: equation 22 note that the limit of thermal runaway can be directly found by: equation 23 numerical application: an application with an average current i 0 = 6 a using the stpsc6h065 is considered here. the typical forward voltage curve versus forward current of the stps6h065 datasheet is calculated between 3 a and 9 a and between 25 c and 150 c: v t0150c = 0.85 v, r d150c = 0.175 ? , ? v t0 = -800 v/c, ? r d = 600 ? /c. so, the ?b coefficient? is equal at 0.017 w/c, and the critical r th , beyond which the thermal runaway is reached, is r th > 59.5 c/w. considering the r th(j-a) of the to-220 package in air to be around 60 c /w, the stability condition will not be re spected since b r th(j-a) - 1 > 0 and thus the diode cannot be used without a heatsink for this value of current. the diode must be mounted on its own heatsink, in choosing the r th value checking b r th(j-a) - 1 < 0 and respecting t j < t jmax . in this case of a stable condition, if t j targeted is 125 c with t amb = 40 c, the heatsink should be chosen for an r th(j-a) value equal to 7.45 c/w.   
t (t) = j r (a + t b) th amb b r - 1 th e b r - 1 th c r th th t - t +a r amb th b r - 1 th lim t  tj(t)  b r - 1 < 0 th rth < 1 b rth < 1  v0r0 2 t0 d i + i dp (t ) tj dt j 1 r th(j-a) lim t  tj(t)  - t +a r amb th b r - 1 th
docid024196 rev 1 11/26 AN4242 forward thermal runaway 2.2 thermal runaway ri sk in transient phase the thermal runaway phenomenon can easily be observed with the short i fsm test waveform by sensing the forward voltage drop. i fsm is defined by a sine-wave of 10 ms shown in figure 7 and is described in the datasheet as the non-repetitive maximum surge forward current. figure 7. thermal runaway phenomenon during an i fsm -test waveform in standard applications, the current waveforms are either shorter or longer and more complex due to the switching frequency. however the i fsm parameter stays a reference that reflects the capability of the di ode to sustain a surge current. in an smps, during the transient phases such as the start-up phase, a power line drop-out, a lightning surge or a short circuit, experience shows that some high surge current stresses are applied to the diode. examples are shown in figure 8 . figure 8. inrush current proportional to dv out /dt during a start-up phase and a power line drop-out unlike the regular operating mode, the current stress duration is generally lower than 1 s. in this case a thermal runaway phenomenon can be triggered and the advised limit to avoid the destruction of the diode is the t jmax given in the datasheet. the estimation of t j during these transient conditions involves the transient thermal impedance: i fsm =38a v f = 11 v stpsc606d 2 ms/div 2 v/div 10 a/div 5 ms / div 5 a / div 100 v / div v out i line i dsic i i n n r r u u s s h h c c u u r r r r e e n n t t v out id bypass v out idsic 200 ms / div 5 a / div 100v / div 20 ms / div intc=id bypass idsic i i n n r r u u s s h h c c u u r r r r e e n n t t
forward thermal runaway AN4242 12/26 docid024196 rev 1 equation 24 in most cases, the complexity of the curren t waveform implies that the above equation is solved with help of an electro-thermal model as shown in figure 12 . to push back the thermal runaway limit and improve the capability of sic diodes to withstand high current surges, a second gener ation of sic diode has been developed by stmicroelectronics using a combination of a schottky diode and a pn diode. this new technology is usually called junction barrier schottky (jbs).    t(t) = p(t) zth (t) = p(t)zth (t - )d  0 t
docid024196 rev 1 13/26 AN4242 new 650 v jbs sic diodes 3 new 650 v jbs sic diodes 3.1 device structure figure 9. comparison between a pure sic schottky structure with the jbs sic structure the 2nd generation sic device is based on jbs (junction barrier schottky) concept. at high forward voltage drops, this structure benefits from the injection of minority carriers by the pn junctions inserted within the main schottky co ntact. thus in case of surges current, modulation of resistiv ity induces a lower v f and a smaller increase of t j . moreover, the pn grid supports the decrease the leakage current i r and to increase the breakdown voltage v br of the device. so, thanks to this new desi gn, the robustness of device is drastically increased compared to standard schottky diode. 3.2 comparison between first and second generation of sic diodes 3.2.1 forward voltage comparison the forward voltage characteristics of the first and the second generation are compared in figure 10 . the dotted line network corresponds to the linear characteristics of the pure sic schottky diode. the positive thermal coeffici ent is evident. those curves highlight the difficulties in characterizing the pure s ic schottky diode at high current with constant junction temperature due to the overheating linke d to the measurement. to limit this thermal effect, the tests are made with a short duration pulse t p = 50 s. the second generation of sic diodes also presents a linear characteristic up to a certain level of current. a clamping effect linked to the jbs structure then appears at higher current. this effect happens when schottky barrier guard ring 4h - sic epitaxy n-type 4h - sic epitaxy 4h - sic substrate n+ 4h - sic substrate schematic cross section of conventional sic schottky diode (1st generation device) schematic cross section of a jbs sic diode (2nd generation device) ohmic contact on p+ passivation top metal ohmic backside contact schottky barrier p+ p+ schottky on n-type schottky on p-type pn junction metal schottky area n - epitaxy n+ substrate p area
new 650 v jbs sic diodes AN4242 14/26 docid024196 rev 1 there is a bias of the merged pn junctions, ro ughly beyond 3 v, 10 a @ 175 c; 3.5 v, 15 a @ 125 c; 4 v, 25 a @ 75 c?. figure 10. forward voltage comparison between pure schottky sic diode and jbs sic diode figure 11 shows the characterization of the 2nd generation sic diode up to 100 a with a pulse duration t p = 1 s. this network of curves highlights two crossing points. first, ? v f is negative below 1.5 a, then positive up to ar ound 42 a, then once again negative. when the merged pn junction is biased, at high t j (>125 c) all the curves converge to one straight line giving a forward characteristics al most independent of the temperature. figure 11. forward voltage characteristic of jbs sic diode up to 100 a with t p = 1 s 25 c 175 c 75 c 125 c stpsc606d 1g ( sic schottky ) stpsc6h065d 2g ( sic jbs) thermal effect v f =f(i f ) versus tj ( t p =50 s) v f (v) i f (a) 8 7 6 5 4 3 2 1 0 01015202530 5 35 40 25 c 225 c stpsc6h065d 2g vf <0 vf >0 vf <0 vf >0 v f =f(i f ) versus tj ( t p = 1 s) v f (v) 8 7 6 5 4 3 2 1 0 02030405060 10 70 80 90 100 9 i f (a)
docid024196 rev 1 15/26 AN4242 new 650 v jbs sic diodes the jbs structure clamps the forward voltage at high current and high t j . this new technology thus avoids the thermal runaway phenomenon and the i fsm value can go up to 9 or 10 times the nominal current rating. 3.2.2 i fsm pspice simulation: comparison between 1st and 2nd generation the electro-thermal model simulates the variation of the forward voltage drop during a current spike and gives an estimate of the j unction temperature. the electro-thermal model of a 2nd generation 6 a sic diode is given in figure 12 . the model is composed of an electrical model based on the typical forward characteristics shown in figure 11 and a thermal model based on the typical transient thermal impedance junction-to-case curve given in the datasheet. figure 12. electro-thermal model of the 6 a /650 v sic g2 (stpsc6h065d) from stmicroelectronics figure 13 shows the result of a pspice simulation for an i fsm value of 42 a. with such a surge current, thermal instability is reached with the 1st generation device. the forward voltage drop and the junction temperature increase exponentially until the diode is destroyed. with the 2nd generation device, the jbs effect clamps the forward voltage drop and limits the increase of junction temperature.         !"  #$    !"  #$ % &  #$'('$ !"  !))  *#*+,-#*+,, !"  #$ #$ .!./!01 !23&3 #&432&3 5!2"4&4 5#&64"&4 #6))""& !64)&    7 .!./!01  44% 544& 8&)""&3 62 3&) 9& 6 &6 .!./!01 "") 4& 5&3)&3 8 622&4 &"24)&6 9"362& .!./!01 ! &3 266&3 # 324& 5!  6)&4 5# &)"62&2 8! &32&6 8#  224&) ! )63"& # 2 % !)3  3"3 !)4 2"" !)6 23) :)3 " :)2 2 :)4   :)) 64 !"3 )2) :)"  )4 !"2 642) :)6 3  !"4 4 :" )36 !") )  #2 2 i f t j t c thermal model electrical model
new 650 v jbs sic diodes AN4242 16/26 docid024196 rev 1 figure 13. result of i fsm pspice simulation: comparison between 6 a / 650 v sic 2nd generation (stpsc6h065d) and 6 a /600 v sic 1st generation (stpsc606d) 3.2.3 i fsm datasheet comparison be tween sic g2 and sic g1 the non-repetitive i fsm curves versus pulse duration presented in figure 14 come from the datasheet of the stpsc606 and the stpsc6h065. the graph, based on measurements, shows the improvement of the surge current ca pability with the second generation. thanks to the jbs structure, the i fsm values are more than doubled. figure 14. non repetitive i fsm versus t p comparison between 6 a sic 1st generation and 6 a sic 2nd generation 0 1 2 3 4 5 6 7 8 9 10 0 100 200 300 400 0 5 10 15 0 10 20 30 40 50 tj tj (c) 1g > 400 c thermal runaway phenomenon tj 200 c 2g v f typ 2g v f typ 1g i fsm = 42 a @ t c = 25 c i fsm (a) v f (v) time (ms) 1e-05 1e-04 1e-03 1e+03 1e-02 1e+02 1e+01 i fsm (a) t p (s) stpsc6h065 2nd generation stpsc606 1st generation
docid024196 rev 1 17/26 AN4242 new 650 v jbs sic diodes current stresses in the range of tens of mi croseconds are usually linked to the switching period. such a surge current can also happen during lightning surge tests. stresses in the range of tens of milliseconds are us ually related to line-dropout tests. 3.3 jbs structure trade-off: cu rrent surge capability versus q rr the efficiency of the jbs structure to sustain a current spike is linked to the bias current level of the merged pn juncti on. this level charac terizes ?the jbs positioning?. designing the diode with a higher bias current level leads to a higher forward voltage drop, and hence a higher t j for the same surge. likewise, the lowe r the bias current level, the lower the forward voltage drop at high current. however, the conduction of a pn junction implies some recovery charges (q rr ) when the diode switches and turns of f. this is linked to the minority carriers? recombination, which does not happen in a conventional sic scho ttky structure. as a consequence, a trade off between i fsm and q rr should be considered. 3.3.1 forward characteristics comparis on between st?s sic 2nd generation and other jbs designs figure 15 illustrates in dotted lines another dimensioning of the merged pn junction compared with st?s design. the dotted lines present forward voltage drops around 2 volts higher than st?s diode between 30 a and 70 a at 225 c. on the other hand, this characteristic indicates that the carrier injection phenomenon (q rr ) should appear at higher forward current levels. figure 15. forward voltage drop between stpsc6h065d and another jbs structure table 3. i fsm with t p = 10 ms and t j = 25c: comparison between first and second generation i fsm , sinusoidal, 10 ms, @ 25 c i f (a) 46810 sic 1st generation 14 27 30 40 sic 2nd generation 38 60 75 90 25 c 225 c stpsc6h065d 2g 75 c 125 c 175 c v f =f(i f ) versus tj with (tp=50 s) 02030405060 10 70 80 90 100 i f (a) v f (v) 8 7 6 5 4 3 2 1 0 9 10 11 other jbs technology
new 650 v jbs sic diodes AN4242 18/26 docid024196 rev 1 the characterization of the recovery charges for a given junction temperature versus the forward current allows the determination of the no recovery charges area. 3.3.2 no recovery charge area figure 16 illustrates the no-recovery-charges area fo r a 6 a sic 2nd genera tion diode in the reference plan of forward current versus junction temperature. st?s stpsc6h065d sic g2 was designed to be used without any recovery charges up to 2 i f(av) at 150 c or again 3i f(av) at 100c. the 2 osc illoscope traces illustrate the swit ch-off behavior of the diodes at i f = 12 a and i f = 18 a for t j = 150 c. at i f = 12 a, the behavior at 25c and 150c is stable confirming the absence of recovery charges. at i f = 18 a, recovery charges start to appear between 100 c and 125 c and become more significant at 150 c. the same characterization was made on a sample of diodes featuring another jbs technology (corresponding to the dotted lines in figure 15 ). this other jbs trade-off presents a larger no-recovery-charge area but compromises on the forward voltage drop, that is higher at high current levels. figure 16. comparison of no recovery charge area between st?s 6 a sic 2nd generation diode and another jbs technology in a pfc, the peak current flowing through the diode can be estimated by: equation 25 for example, in an 800 w server application with a pfc working at v in(min) = 90 v ac and an efficiency of 90%, the peak current re aches 14 a (it?s the same for a 1600 w pfc application working at 180 v ac). in this app lication the choice of a 6 a sic g2 working with a t j around 125 c is adapted. stpsc6h065d other jbs technology no recovery charge area 6 a sic 2nd generation diode working area i f (a) t j (c) 35 30 25 20 15 10 5 0 0 25 50 75 100 125 150 175 200 i= peak diode  2 p out v in(min) rms ;
docid024196 rev 1 19/26 AN4242 new 650 v jbs sic diodes 3.3.3 pspice electro-the rmal simulation result the interest of the dimensioning of the st ?s jbs structure compared to another jbs positioning can clearly be highlighted with the electro-thermal simulation. figure 17 and figure 18 present the result of the pspice simulation respectively for an i fsm waveform and a startup phase in a pfc application. the electrical model of the stpsc6h065d is compared to one of the other 6 a jbs technolo gies coupled with a thermal model similar to the one of the stpsc6h065d. figure 17 shows that the higher values of the forward characteristic of the other jbs technology in figure 15 lead to a much higher t j (+ 100c) compared to st?s product during a 42 a i fsm spike. figure 17. i fsm electro-thermal simulation with t j comparison between st?s 6 a sic g2 and another 6 a jbs technology 0 0 12345678910 100 200 300 350 0 0 2.0 6.0 8.0 10 20 30 40 tj (c) i f (a) v f (v) time (ms) 250 150 50 50 4.0 i fsm 42a @tc=25 c v f typ stpsc6h065 v f typ 6a other jbs techno tj other jbs techno =300 c tj stpsc6h065 =200 c
new 650 v jbs sic diodes AN4242 20/26 docid024196 rev 1 a second electro-thermal simulation was done during an smps start-up phase ( figure 18 ). it demonstrates once again the interest of correctly dimensioning the jbs structure. figure 18. electro-thermal simulation of a pfc start-up phase with t j comparison between st?s 6 a sic 2nd generation and another 6 a jbs technology the lower t j observed through the electro-thermal simulation on st?s jbs structure contributes to the robustness of the st?s product in the application. time (ms) 0a 20 a 40 a 60 a 5 10 15 20 25 30 120 160 200 240 215 c tj other 650 v sic jbs technology tj stpsc6h065 175c tj (c) 1000 w pfc start-up pspice simulation 90 v, 70 khz, cout = 600 f, l = 270 h, tc = 125 c i dsic
docid024196 rev 1 21/26 AN4242 efficiency measurement 4 efficiency measurement table 4 summarizes the key parameters for the 1st and 2nd generation of sic diodes. if the jbs structure improves the surg e current capability, it degrad es somewhat the values of forward voltage drop at low current level. in a typical pfc application, the efficiency will be affected by less than 0.1% between the 1st and 2nd generation. a first approximation demonstrated by the fo llowing equations shows that the efficiency difference in a pfc could be estimated by ? v f /v out . equation 26 with equation 27 and equation 28 then equation 29 with equation 30 table 4. comparison of key parameters between first generation and second generation of sic diodes product v rrm (v) i fsm , (a) sinusoidal, 10 ms v f (v) @ 6 a, 25 c typical / maximum v f (v) @ 6 a, 150 c typical / maximum 6 a sic, 1st gen stpsc606d 600 27 1.4 / 1.7 1.6 / 2.1 6 a sic, 2nd gen stpsc6h065d 650 60 1.5 / tbd 1.9 / tbd p cond p out v i av + r i t0 d rms 2 v i out out = i= av v out p out  v inpk ; i= rms 2 p out 16 v inpk 3 v  out p cond p out v + k i r t0 av d v i out out v f(ki av ) v out = = k = v 16 out 3 v inpk 2 ;
efficiency measurement AN4242 22/26 docid024196 rev 1 4.1 di/dt optimization the contribution of the sic diode in the switch ing cell is essential. its switching performance leads to new optimizations that can help to go a step forward in increasing the efficiency. it is well known that the mosfet switching speed (d i/dt) is an important parameter to optimize the efficiency. the di/dt slope (when the transi stor turns on and when the diode turns off) can be easily changed by tuning the value of the gate resistor r g of the transistor. figure 19 shows, the efficiency drop between sic diodes and silicon diodes for different di/dt slopes. this efficiency drop is defined by the total power losses due to the diode divided by p out . the conduction power losses, the switch-off power losses in the diode and the switch-on power losses in the transistor due to the q rr of the silicon diodes are taken into account. figure 19. comparison of efficiency drop in a 500 w pfc with v in = 90 v f = 100 khz, t j = 125 c with silicon bipolar rectifiers, there is an op timized di/dt slope to reduce the power losses. when the slope increases, the switching time decreases but the reverse recovery current increases. for low di/dt values, the impact of the switching time dominates, and for higher di/dt the impact of q rr may become more important. henc e, the switching power losses due to the recove ry charges (q rr ) decrease with the increase of di/dt until a certain point from which they start to increase again due to q rr . for those silicon diodes, the slope choice must also be made taking into account electrom agnetic considerations (emc) which sometimes impose a limitation of that slope. with sic diodes, the power losses continue to decrease whenever di/dt increases. being naturally soft (due to capacitive nature of the recovery curren t), they offer the possibility to switch the transistor more quickly and thus increase the efficiency of the converter. 8a tandem g2 8a tandem g1 8a ultrafast diode 6a sic g1 6a sic g2 ef?ciency (%) di/dt (a/s) 0 100 200 300 400 500 600 700 800 900 1000 1100 6 5 4 3 2 1 0
docid024196 rev 1 23/26 AN4242 efficiency measurement 4.2 example of efficiency measurements compared to the conventional ultrafast diode, us ing sic diodes we can expect, an efficiency gain of between 1% and 2%. an example of efficiency measurements in a 480 w pfc at v in = 115 v ac is presented in figure 20 . the efficiency gain with the sic diode compared to t he conventional 600 v silicon diodes reaches 1.2%. figure 20. typical efficiency measurement in a 480 w pfc at v in = 115 v, f sw = 100 khz, di/dt = 600 a/s new 8a 600v tandem g2 new 6a 650v sic g2 dcm mode ccm mode tj diode < 50 c tj diode < 120 c 8 a, 600 v turbo 2 diode 8 a, 600 v tandem g1 6 a, 600 v sic g1 ef?ciency (%) 95 94 93 92 91 load (%) 0 1020 30 40 5060 70 80 90100
conclusion AN4242 24/26 docid024196 rev 1 5 conclusion to keep its leadership in po wer rectifiers, st developed a complete portfolio of silicon carbide diodes that are more and more popular in power converters thanks to their very high switching performance. to help designers in their quest for more current density and helping them to reduce cost, stmicroelectronics developed a second generatio n of sic schottky rectifiers. the design of these new diodes provides increased robustne ss while not impacting their performance and blocks the effect of the positive thermal coeffi cient of the silicon carb ide material. these new diodes have already proven to be very efficient in high-power smps. to help designers reduce their time to ma rket, stmicroelectronics developed a complete electro-thermal model of the diode. combined with a model of the electrical circuit in which the sic rectifier is used, the mo del can simulate all the worst case conditions of the transient phases of the power-supply. this way, power-s upply designers can verify that the diode is completely safe in all conditions. supporting a wide range of applications, st?s s ic rectifiers are available in a variety of supported currents and package s, giving more flexibility on the power density/power dissipation trade-off.
docid024196 rev 1 25/26 AN4242 revision history 6 revision history table 5. document revision history date revision changes 30-may-2013 1 initial release.
AN4242 26/26 docid024196 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not authorized for use in weapons. nor are st products designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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