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this is information on a product in full production. april 2014 docid15676 rev 4 1/23 ld39100 1 a, low quiescent current, low-noise voltage regulator datasheet - production data features ? input voltage from 1.5 to 5.5 v ? ultra low-dropout voltage (200 mv typ. at 1 a load) ? very low quiescent current (20 a typ. at no load, 200 a typ. at 1 a load, 1 a max. in off mode) ? very low-noise with no bypass capacitor (30 v rms at v out = 0.8 v) ? output voltage tolerance: 2.0% @ 25 c ? 1 a guaranteed output current ? wide range of output voltages available on request: 0.8 v to 4.5 v with 100 mv step and adjustable from 0.8 v ? logic-controlled electronic shutdown ? stable with ceramic capacitors c out = 1 f ? internal current and thermal limit ? dfn6 (3x3 mm) package ? temperature range: - 40 c to 125 c applications ? printers ? personal digital assistants (pdas) ? cordless phones ? consumer applications description the ld39100 provides 1 a maximum current with an input voltage range from 1.5 v to 5.5 v and a typical dropout voltage of 200 mv. the device is stable with ceramic capacitors on the input and output. the ultra low drop voltage, low quiescent current and low-noise features make it suitable for low power battery-powered applications. power supply rejection is 70 db at low frequency and starts to roll off at 10 khz. enable logic control function puts the ld39100 in shutdown mode, allowing a total current consumption lower than 1 a. the device also includes short-circuit constant current limiting and thermal protection. dfn6 (3x3 mm) table 1. device summary order codes output voltages ld39100pur adj. from 0.8 v LD39100PU12R 1.2 v ld39100pu25r 2.5 v ld39100pu30r 3.0 v www.st.com
contents ld39100 2/23 docid15676 rev 4 contents 1 circuit schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.1 power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.2 enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.3 power good function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
docid15676 rev 4 3/23 ld39100 circuit schematics 23 1 circuit schematics figure 1. ld39100 schematic diagram (adjustable version) current limit thermal protection out gnd opamp in power-good signal pg internal enable in adj en bandgap reference current limit thermal protection out gnd opamp in power-good signal pg internal enable in in adj en bandgap reference figure 2. ld39100 schematic diagram (fixed version) current limit thermal protection out gnd opamp in power-good signal pg internal enable in nc en bandgap reference r 1 r 2 current limit thermal protection out gnd opamp in power-good signal pg internal enable in in nc en bandgap reference r 1 r 2
pin configuration ld39100 4/23 docid15676 rev 4 2 pin configuration figure 3. pin connection (top view) ld39100 (fixed version) en gnd pg v in nc v out en gnd pg v in adj v out ld39100 (adjustable version) table 2. pin description symbol pin function ld39100 (adjustable version) ld39100 (fixed version) en 1 1 enable pin logic input: low = shutdown, high = active gnd 2 2 common ground pg 3 3 power good v out 4 4 output voltage adj 5 - adjust pin v in 6 6 ldo input voltage nc - 5 not connected gnd exposed pad exposed pad has to be connected to gnd
docid15676 rev 4 5/23 ld39100 maximum ratings 23 3 maximum ratings note: absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. all values are referred to gnd. table 3. absolute maximum ratings symbol parameter value unit v in dc input voltage -0.3 to 7 v v out dc output voltage -0.3 to v in + 0.3 (7 v max.) v en enable pin -0.3 to v in + 0.3 (7 v max.) v pg power good pin -0.3 to 7 v adj adjust pin 4 v i out output current internally limited p d power dissipation internally limited t stg storage temperature range - 65 to 150 c t op operating junction temperature range - 40 to 125 c table 4. thermal data symbol parameter value unit r thja thermal resistance junction-ambient 55 c/w r thjc thermal resistance junction-case 10 c/w table 5. esd performance symbol parameter test conditions value unit esd esd protection voltage hbm 4 kv mm 0.4 kv
electrical characteristics ld39100 6/23 docid15676 rev 4 4 electrical characteristics t j = 25 c, v in = 1.8 v, c in = c out = 1 f, i out = 100 ma, v en = v in , unless otherwise specified. table 6. ld39100 electrical characteristics (adjustable version) symbol parameter test conditions min. typ. max. unit v in operating input voltage 1.5 5.5 v v adj v adj accuracy i out =10ma, t j = 25c 784 800 816 mv i out =10ma, -40c docid15676 rev 4 7/23 ld39100 electrical characteristics 23 t j = 25 c, v in = v out(nom) + 1 v, c in = c out = 1 f, i out = 100 ma, v en = v in , unless otherwise specified. v en enable input logic low v in =1.5v to 5.5v, -40c1.5v, i out =10ma, t j =25c -2.0 2.0 % v out >1.5v, i out =10ma, -40c 1.5v, -40c electrical characteristics ld39100 8/23 docid15676 rev 4 svr supply voltage rejection v out =1.5v v in =v out(nom) +0.5v+/-v ripple v ripple =0.1v, frequency=1khz i out =10ma 65 db v in =v out(nom) +0.5v+/-v ripple v ripple =0.1v, frequency=10 khz i out =100ma 62 i q quiescent current i out = 0 ma 20 a i out = 0 ma, -40c docid15676 rev 4 9/23 ld39100 typical performance characteristics 23 5 typical performance characteristics c in = c out = 1 f figure 4. v adj accuracy figure 5. v out accuracy figure 6. dropout voltage vs. temperature (v out = 2.5 v) figure 7. dropout voltage vs. temperature (v out = 1.5 v) figure 8. dropout voltage vs. output current figure 9. short-circuit current vs. drop voltage 0.74 0.76 0.78 0.8 0.82 0.84 0.86 -50 -25 0 25 50 75 100 125 150 t [c] v adj [v] v in = 1.8 v, v en = v in , i out = 10 ma 0.74 0.76 0.78 0.8 0.82 0.84 0.86 -50 -25 0 25 50 75 100 125 150 t [c] v adj [v] v in = 1.8 v, v en = v in , i out = 10 ma 2.44 2.46 2.48 2.5 2.52 2.54 2.56 -50 -25 0 25 50 75 100 125 150 t [c] v out [v] v in = 3.5 v, v en = v in , i out = 10 ma 2.44 2.46 2.48 2.5 2.52 2.54 2.56 -50 -25 0 25 50 75 100 125 150 t [c] v out [v] v in = 3.5 v, v en = v in , i out = 10 ma 0 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 150 t [c] dropout [mv] v en to v in , v out = 2.5 v, i out = 1 a 0 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 150 t [c] dropout [mv] v en to v in , v out = 2.5 v, i out = 1 a 0 50 100 150 200 250 300 350 400 -50 -25 0 25 50 75 100 125 150 t [c] dropout [mv] v en to v in , v out @ 1.5 v, i out = 1 a 0 50 100 150 200 250 300 350 400 -50 -25 0 25 50 75 100 125 150 t [c] dropout [mv] v en to v in , v out @ 1.5 v, i out = 1 a 0 0.05 0.1 0.15 0.2 0.25 0 200 400 600 800 1000 1200 i out [ma] dropout [v] v out @ 1.5 v v out = 2.5 v v en to v in 0 0.05 0.1 0.15 0.2 0.25 0 200 400 600 800 1000 1200 i out [ma] dropout [v] v out @ 1.5 v v out = 2.5 v v en to v in 0 0.5 1 1.5 2 2.5 3 3.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 vdrop [v] i sc [a] 125 c 85 c 55 c 25 c 0 c -25 c -40 c v in from 0 to 5.5 v, v en to v in , v out = 0.8 v 0 0.5 1 1.5 2 2.5 3 3.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 vdrop [v] i sc [a] 125 c 85 c 55 c 25 c 0 c -25 c -40 c v in from 0 to 5.5 v, v en to v in , v out = 0.8 v
typical performance characteristics ld39100 10/23 docid15676 rev 4 figure 10. output voltage vs. input voltage (v out = 0.8 v) figure 11. output voltage vs. input voltage (v out = 2.5 v) figure 12. quiescent current vs. temperature figure 13. v in input current in off mode vs. temperature figure 14. load regulation figure 15. line regulation v out =0.8 v 0 0.2 0.4 0.6 0.8 1 1.2 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 v in [v] v out [v] 125c 85c 55c 25c 0c -25c -40c v in from 0 to 5.5 v, v en to v in , v out = 0.8 v, i out = 1 a 0 0.2 0.4 0.6 0.8 1 1.2 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 v in [v] v out [v] 125c 85c 55c 25c 0c -25c -40c v in from 0 to 5.5 v, v en to v in , v out = 0.8 v, i out = 1 a 0 0.5 1 1.5 2 2.5 3 00.511.522.533.544.555.56 v in [v] v out [v] 125c 85c 55c 25c 0c -25c -40c v in from 0 to 5 v, v en to v in , v out = 2.5 v, i out = 1a 0 0.5 1 1.5 2 2.5 3 00.511.522.533.544.555.56 v in [v] v out [v] 125c 85c 55c 25c 0c -25c -40c v in from 0 to 5 v, v en to v in , v out = 2.5 v, i out = 1a 0 20 40 60 80 100 120 140 -50 -25 0 25 50 75 100 125 150 t [c] iq [a] no load i out = 1 a v in = 1.8 v, v en to v in , v out = 2.5 v 0 20 40 60 80 100 120 140 -50 -25 0 25 50 75 100 125 150 t [c] iq [a] no load i out = 1 a v in = 1.8 v, v en to v in , v out = 2.5 v 0 0.1 0.2 0.3 0.4 0.5 0.6 -50 -25 0 25 50 75 100 125 150 t [c] iq [a] v in = 3.5 v, v en to gnd, v out = 2.5 v 0 0.1 0.2 0.3 0.4 0.5 0.6 -50 -25 0 25 50 75 100 125 150 t [c] iq [a] v in = 3.5 v, v en to gnd, v out = 2.5 v -0.015 -0.01 -0.005 0 0.005 0.01 0.015 -50 -25 0 25 50 75 100 125 150 t [c] load [%/ma] v in = 3.5 v, i out = from 10 ma to 1 a, v en =v in , v out = 2.5 v -0.015 -0.01 -0.005 0 0.005 0.01 0.015 -50 -25 0 25 50 75 100 125 150 t [c] load [%/ma] v in = 3.5 v, i out = from 10 ma to 1 a, v en =v in , v out = 2.5 v -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 -50 -25 0 25 50 75 100 125 150 t [c] line [%/v] v in = from 1.8 v to 5.5 v, i out = 100 ma, v en = v in , v out = 0.8 v -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 -50 -25 0 25 50 75 100 125 150 t [c] line [%/v] v in = from 1.8 v to 5.5 v, i out = 100 ma, v en = v in , v out = 0.8 v
docid15676 rev 4 11/23 ld39100 typical performance characteristics 23 figure 16. line regulation v out =2.5 v figure 17. supply voltage rejection vs. temperature (v out = 0.8 v) figure 18. supply voltage rejection vs. temperature (v out = 2.5 v) figure 19. supply voltage rejection vs. frequency (v out = 0.8 v) figure 20. supply voltage rejection vs. frequency (v out = 2.5 v) figure 21. output noise voltage vs. frequency v in = 1.8 v, v out = 0.8 v, v en = v in -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 -50 -25 0 25 50 75 100 125 150 t [c] line [%/v] v in = from 3.5 v to 5.5 v, i out = 100 ma, v en = v in , v out = 2.5 v -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 -50 -25 0 25 50 75 100 125 150 t [c] line [%/v] v in = from 3.5 v to 5.5 v, i out = 100 ma, v en = v in , v out = 2.5 v 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 150 t [c] svr [db] freq.10 khz, i out = 100 ma freq.1 khz, i out = 10 ma v in from 1.7 v to 1.9 v, v en to v in , v out = 0.8 v 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 150 t [c] svr [db] freq.10 khz, i out = 100 ma freq.1 khz, i out = 10 ma v in from 1.7 v to 1.9 v, v en to v in , v out = 0.8 v 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 150 t [c] svr [db] freq. = 10 khz, i out = 100 ma freq. = 1 khz, i out = 10 ma v in from 2.9 v to 3.1 v, v en to v in , v out = 2.5 v 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 150 t [c] svr [db] freq. = 10 khz, i out = 100 ma freq. = 1 khz, i out = 10 ma v in from 2.9 v to 3.1 v, v en to v in , v out = 2.5 v 0 20 40 60 80 100 0 102030405060708090100110 freq [khz] svr [db] i out = 10 ma i out = 100 ma v in from 1.55 v to 2.05 v, v en to v in , v out = 0.8 v 0 20 40 60 80 100 0 102030405060708090100110 freq [khz] svr [db] i out = 10 ma i out = 100 ma v in from 1.55 v to 2.05 v, v en to v in , v out = 0.8 v 0 10 20 30 40 50 60 70 80 90 100 0 102030405060708090100110 freq [khz] svr [db] i out = 10 ma i out = 100 ma v in from 2.9 v to 3.1 v, v en to v in , v out = 2.5 v 0 10 20 30 40 50 60 70 80 90 100 0 102030405060708090100110 freq [khz] svr [db] i out = 10 ma i out = 100 ma v in from 2.9 v to 3.1 v, v en to v in , v out = 2.5 v 0.0 0.5 1.0 1.5 2.0 2.5 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 f [hz] en [v/sqrt(hz)] ap - iout = 100ma ap - iout = 10ma ap - iout = 1ma ap - iout = 0a
typical performance characteristics ld39100 12/23 docid15676 rev 4 figure 22. enable voltage vs. temperature figure 23. load transient (i out = from 10 ma to 1 a) v en = v in =3.5v, v out =0.8v, i out = from10ma to 1a, t r = t f =5 s figure 24. load transient (v out = 0.8 v) figure 25. load transient (v out = 2.5 v) v en = v in =3.5v, v out =0.8v, i out = from100 ma to 1a, t r = t f =5 s v en = v in =3.5v, v out =2.5v, i out = from10 ma to 1a, t r = t f =5 s figure 26. load transient (i out = from 100 ma to 1 a) figure 27. line regulation transient v en = v in =3.5v, v out =2.5v, i out = from100 ma to 1a, t r = t f =5 s v en = v in =1.8 v to 2.3 v, v out = 0.8v, i out =100 ma, t r = t f = 5 s 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -50 -25 0 25 50 75 100 125 150 t [c] v en [v] high low v in = 5.5 v i out = 100 ma, v out = 0.8 v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -50 -25 0 25 50 75 100 125 150 t [c] v en [v] high low v in = 5.5 v i out = 100 ma, v out = 0.8 v i out v out i out v out i out v out i out v out i out v out i out v out i out v out i out v out v in v out v in v out
docid15676 rev 4 13/23 ld39100 typical performance characteristics 23 figure 28. start-up transient figure 29. enable transient v en = v in = from 0.8 v, v out =0.8 v, i out = 100 ma v en = 0 to 2 v, v out =0.8 v, v in = 3.5 v, i out = 100 ma, t r = 5 s figure 30. esr required for stability with ceramic capacitors (v out = 0.8 v) figure 31. esr required for stability with ceramic capacitors (v out = 2.5 v) v in = v en = from 1.5 v to 5.5 v, v out = 0.8 v, i out = from 1 ma to 1 a v in = v en = from 3.5 v to 5.5 v, v out = 2.5 v, i out = from1 ma to 1 a v in v out v in v out v en v out v en v out 0 0.05 0.1 0.15 0.2 0.25 12345678910111213141516171819202122 c out [f] (nominal value) esr @ 100 khz [ohm] stable zone unstable zone 0 0.05 0.1 0.15 0.2 0.25 12345678910111213141516171819202122 c out [f] (nominal value) esr @ 100khz [ ] 0 0.05 0.1 0.15 0.2 0.25 12345678910111213141516171819202122 c out [f] (nominal value) esr @ 100khz [ ] stable zone unstable zone
application information ld39100 14/23 docid15676 rev 4 6 application information the ld39100 is an ultra low-dropout linear regulator. it provides up to 1 a with a low 200 mv dropout. the input voltage range is from 1.5 v to 5.5 v. the device is available in fixed and adjustable output versions. the regulator is equipped with internal protection circuitry, such as short-circuit current limiting and thermal protection. the regulator is stable with ceramic capacitors on the input and the output. the expected values of the input and output ceramic capacitors are from 1 f to 22 f with 1 f typical. the input capacitor has to be connected within 1 cm from v in terminal. the output capacitor has also to be connected within 1 cm from output pin. there isn?t any upper limit to the value of the input capacitor. figure 32 and figure 33 illustrate the typical application schematics: figure 32. typical application circuit for fixed output version 1 ,1 , ' ' 1 *1 * 9 9 1 ,1 , 1 (1 ( * 3* 3 9 9 7 7 8 28 2 9 9 7 7 8 28 2 && 7 8 2 & 1& 1 9 9 1 2 ) ) 21 2 ) ) 2 && 1 ,1 , ' /' /
docid15676 rev 4 15/23 ld39100 application information 23 regarding to the adjustable version, the output voltage can be adjusted from 0.8 v up to the input voltage, minus pmos voltage drop across (dropout voltage), by connecting a resistor divider between adj pin and the output, thus allowing remote voltage sensing. the resistor divider should be selected as follows: equation 1 v out = v adj (1 + r 1 / r 2 ) with v adj = 0.8 v (typ.) resistors should be used with values in the range from 10 k to 50 k . lower values can also be suitable, but they increase current consumption. 6.1 power dissipation an internal thermal feedback loop disables the output voltage if the die temperature rises to approximately 160 c. this feature protects the device from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without the risk of damaging the device. a good pc board layout should be used to maximize power dissipation. the thermal path for the heat generated by the device is from the die to the copper lead frame through the package leads and exposed pad to the pc board copper. the pc board copper acts as a heatsink. the footprint copper pads should be as wide as possible to spread and dissipate the heat to the surrounding ambient. feed-through vias to the inner or backside copper layers are also useful to improve the overall thermal performance of the device. the device power dissipation depends on the input voltage, output voltage and output current, and is given by: equation 2 p d = (v in -v out ) i out junction temperature of the device is: figure 33. typical application circuit for adjustable version v v n in i d n gd n g v v n in i n en e c n in i n n o o f f f of o g pg p j j d ad a v v t t u ou o v v t t u ou o r 1 c t t u ou o r 2 0 0 0 1 90 1 9 3 3 d ld l 6 1 2 5 4 3
application information ld39100 16/23 docid15676 rev 4 equation 3 t j_max = t a + r thja x p d where: t j_max is the maximum junction of the die,125 c t a is the ambient temperature r thja is the thermal resistance junction-to-ambient 6.2 enable function the ld39100 features the enable function. when en voltage is higher than 2 v, the device is on, and if it is lower than 0.8 v, the device is off. in shutdown mode, consumption is lower than 1 a. en pin has not an internal pull-up, so it cannot be left floating if it is not used. 6.3 power good function most applications require a flag showing that the output voltage is in the correct range. power good threshold depends on the adjust voltage. when it is higher than 0.92*v adj , power good (pg) pin goes to high impedance. if it is below 0.80*v adj pg pin goes to low impedance. if the device works well, power good pin is at high impedance. if the output voltage is fixed using an external or internal resistor divider, power good threshold is 0.92*v out . power good function requires an external pull-up resistor, which has to be connected between pg pin and v in or v out . pg pin typical current capability is up to 6 ma. a pull-up resistor for pg should be in the range from 100 k to 1 m . if power good function is not used, pg pin has to remain floating. figure 34. power dissipation vs. ambient temperature 0 0.5 1 1.5 2 2.5 3 3.5 -50 -30 -10 10 30 50 70 90 110 130 t a [c] p d [w] 0 0.5 1 1.5 2 2.5 3 3.5 -50 -30 -10 10 30 50 70 90 110 130 t a [c] p d [w]
docid15676 rev 4 17/23 ld39100 package mechanical data 23 7 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data ld39100 18/23 docid15676 rev 4 figure 35. dfn6 (3x3 mm) drawings b&
docid15676 rev 4 19/23 ld39100 package mechanical data 23 table 8. dfn6 (3x3 mm) mechanical data dim. mm min. typ. max. a0.80 1 a1 0 0.02 0.05 a3 0.20 b0.23 0.45 d 2.90 3 3.10 d2 2.23 2.50 e 2.90 3 3.10 e2 1.50 1.75 e0.95 l 0.30 0.40 0.50 figure 36. dfn6 (3x3 mm) recommended footprint
packaging mechanical data ld39100 20/23 docid15676 rev 4 8 packaging mechanical data figure 37. dfn6 (3x3 mm) tape b1
docid15676 rev 4 21/23 ld39100 packaging mechanical data 23 figure 38. dfn6 (3x3 mm) reel table 9. dfn6 (3x3 mm) tape and reel mechanical data dim. mm min. typ. max. a0 3.20 3.30 3.40 b0 3.20 3.30 3.40 k0 1 1.10 1.20 b1
revision history ld39100 22/23 docid15676 rev 4 9 revision history table 10. document revision history date revision changes 29-jul-2009 1 initial release. 16-apr-2010 2 modified figure 8 on page 9 . 11-oct-2011 3 document status promoted from preliminary data to datasheet. 24-apr-2014 4 part numbers ld39100xx, ld39100xx12 and ld39100xx25 changed to ld39100. updated table 1: device summary . updated the description in cover page section 1: circuit schematics , section 2: pin configuration , section 4: electrical characteristics , section 5: typical performance characteristics , figure 32: typical application circuit for fixed output version , section 7: package mechanical data . deleted previous section 8: different output voltage versions of the ld39100xx available on request . added section 8: packaging mechanical data . minor text changes.
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