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(1/ 10 ) 2002-10-11 (ver.1.1) toshiba matsushita display technology co., ltd product information features (1) 15.4wide-xga(1280x800 pixels) display size for notebook pc (2) lvds interface system (h-sync, v-sync) mechanical specifications item specifications dimensional outline (typ.) 344.5max( w ) x 222.5max ( h ) x 6.5max( d ) mm number of pixels 1280( w ) x 800( h ) pixels active area 332.2 ( w ) x 207.6( h ) mm pixel pitch 0.2595( w ) x 0.2595( h ) weight (approximately) 585 g(max) backlight single ccfl, sidelight type absolute maximum ratings item symbol min. max. unit checked terminal supply voltage v dd -0.3 +4.0 v v dd ? gnd input voltage of signals v in -0.3 v dd +0.3 v lvds interface operating ambient temperature t op 0 50 c operating ambient humidity h op 10 90 %(rh) storage temperature t stg -20 +60 c storage humidity h stg 10 90 %(rh) operating temperature for panel - 0 +60 c electrical specification(t.b.d) item symbol min. typ. max. unit remarks v dd 3.0 3.3 3.6 v supply voltage 1) v fl --- (920) --- v(rms) i fl =6.0ma(rms) fl start voltage ( t a=0 c) v sfl tbd --- tbd v(rms) differential input voltage 2) v id 100 - 600 mv common mode input voltage 2) v cm 1.0 - 2.4 ?( v id )/2 v i dd --- (335) --- ma current consumption i fl --- 6.0 6.0 ma(rms) power consumption --- (6.6) --- w i fl =6.0 ma(rms) *1) the module should be always operated within thes e ranges. the "typ." shows the recommendable value. *2) recommended lvds transmitter: ds90cf365 optical specification ( t a=25 c) (t.b.d) item min. typ. max. unit remarks contrast ratio ( cr ) (150) (400) --- --- response time ( t on + t off ) --- --- 40 ms @25deg brack <=> white luminance ( l ) (150) (190) --- cd/m 2 i fl =6.0ma(rms) *the information contained herein is presented only as a guide for the applications of our products. no responsibility is assum ed by toshiba matsushita display technology or ot her rights of the third parties which may re sult from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. *the information contained herein may be changed without prior notic e. it is therefore advisable to contact toshiba before proc eeding with the design of equipment incorporating this product. 39cm colour tft-lcd module (15.4 wide type) LTD154EX0S (p-si tft) tentative www..net www..net
(2/ 10 ) 2002-10-11 (ver.1.1) LTD154EX0S dimensional outline (front side) tentative unit : mm standard tolerance : 0.5 hj st 1 2 tentative 3.7+/-0.2 2.1+/-0.2 6.5(max) r2 r0.5 227 222 17.85 11+/-0.3 17.85 22 11 11 r1 2 - r 0 . 7 5 11+/-0.3 335+/-0.2 5.3+/-0.2 118.6 101.6 92.8 1.7 22 11 4- 3.2 m2(depth 2.5max) 227 232 240(max) 255(max) 113.6 118.6 106 5.65+/-0.2 99.15 2 1 6 . 1 5 2 . 5 ( m a x ) 2 2 ( m a x ) 11+/-1 2 1 0 . 7 + / - 0 . 2 10.5+/-0.3 1.7 6.1 4.7 1.8 0.7 54+/-0.2 1 4 4 . 3 + / - 0 . 2 1 9 8 + / - 0 . 2 11.85+/-0.2 172.8 2 2 2 i/f connector : jae fi-xb30srl-hf11 inv. connedtor : honda lvc-d20syg fl connector : jst bhsr-02vs-1 standard tolerance : +/-0.5mm note 332.2 207.6 www..net www..net (3/ 10 ) 2002-10-11 (ver.1.1) LTD154EX0S dimensional outline (back side) tentative unit : mm standard tolerance : 0.5 hjst 12 25(max) 65.9 76.9 166.8(min) 148.1 125.1+/-1 319(min) 178.8(max) 6.5(max) 5.7(max) 6.5(max) 5.9-4.7(max)(light gide taper surface) 2 8 + / - 1 5.7(max) light guide taper surface +0.8 167.8 1 7 8 ( m i n ) www..net www..net (4/ 10 ) 2002-10-11 (ver.1.1) LTD154EX0S block diagram 1, 1 2, 1 x2 n-1 , 1 x2 n , 1 1280, 1 1, 2 1, y x 2n-1 , y x 2n , y 1, 800 1280,800 1280 pixels 800 pixels circuit generation voltage manipulation gray scale converter dc/dc cn1 connector panel controller lvds source driver gate driver gate driver liquid crystal panel 1280 x 800 pixels backlight cn1 www..net www..net (5/ 10 ) 2002-10-11 (ver.1.1) LTD154EX0S timing chart(t.b.d) tv tvw vsync tvsu tvhd th hsync tv ?? p tvbp tvd tvds de 1023 1024 12 th thw hsync thbp thfp thds thd thblank de 1024 pixel tc clk 234 1 www..net www..net (6/ 10 ) 2002-10-11 (ver.1.1) LTD154EX0S timing specification 1) 2) 3) 4) 5) 6) (t.b.d) item symbol min. typ. max. unit horizontal active pixel - - 1280 - pixels h sync front porch hso - 4 - pixels h sync pulse width hspw - 4 - pixels h sync back porch hbo - 112 - pixels horizontal total pixels - - 1400 - pixels horizontal blank pixel - - 120 - pixels horizontal total time - - 20 - us horizontal blank time - - 1.7 - us vertical active line - - 800 - lines v sync front porch vso - 1 - lines v sync pulse width vspw - 2 - lines v sync back porch vbo - 30 - lines vertical total line - - 833 - lines vertical blank line - - 33 - lines vertical total time - - 16.7 - ms vertical blank time - - 0.7 - ms pixel clock - - 70 - mhz frame rate - - 60 - hz note 1) refer to ?timing chart? and lvds specifications by chip vendor. note 2) if nclk is fixed to "h" or "l" level for certain period while v dd is supplied, the panel may be damaged. note 3) please adjust lcd operating signal timing and fl driving frequency, to optimize the display quality. there is a possibility that flicker is observed by the inte rference of lcd operating signal timing and fl driving condition (especially driving frequency), even if the co ndition satisfies above timing specifications. note 4) do not make tv , t vhd and tvds fluctuate. if t v, t vhd, and t vds are fluctuate, the panel displays black. note 5) in case of using the long frame period, the det erioration of display quality, noise etc. may be occurred. note 6) nclk count of each horizontal scanning time should be always the same. v-blanking period should be ? n ? x ?horizontal scanning time?. ( n : integer) frame period should be always the same. www..net www..net (7/ 10 ) 2002-10-11 (ver.1.1) LTD154EX0S connector pin assignment for interface cn1 input signal connector : fi-xb30sr-hf11(locking type) / japan aviation electronics industry,ltd. mating connector : wire type:fi-x30h (housing ), fi-xc3-a-15000 (contact) fpc type:fi-x30m or fi-x30m r, coax type:fi- x30c or fi-x30c2(housing), fi-x30ch-7000(shell) terminal no. symbol function 1 gnd 2 v dd power supply : +3.3v 3 v dd power supply : +3.3v 4 nc non-connection 5 nc non-connection 6 nc non-connection 7 nc non-connection 8 rxoin0- odd negative lvds differential data input (r0-r5,g0) 9 rxoin0+ odd positive lvds differential data input (r0-r5,g0) 10 gnd 11 rxoin1- odd negative lvds diff erential data input (g1-g5, b0-b1) 12 rxoin1+ odd positive lvds diff erential data input (g1-g5, b0-b1) 13 gnd 14 rxoin2- odd negative lvds differential data input (b2-b5, hs, vs, de) 15 rxoin2+ odd positive lvds differential data input (b2-b5, hs, vs, de) 16 gnd 17 oclk- odd clock signal(-) 18 oclk+ odd clock signal(+) 19 gnd 20 nc non-connection 21 nc non-connection 22 nc non-connection 23 nc non-connection 24 nc non-connection 25 nc non-connection 26 nc non-connection 27 nc non-connection 28 nc non-connection 29 nc non-connection 30 nc non-connection note 1) please connect gnd pin to ground. don't use it as no-connect nor connection with high impedance. cn2 ccfl power source connector : bhsr-02vs-1 / japan solderless terminal mfg co., ltd. mating connector : sm02b-bhs-1 / japan solderless terminal mfg co., ltd. terminal no. symbol function 1 v flh ccfl power supply ( high voltage) 2 v fll ccfl power supply (low voltage) www..net www..net (8/ 10 ) 2002-10-11 (ver.1.1) LTD154EX0S recommended transmitter (ds90cf365) to ltm154ax0d interface assignment case1: 6bit transmitter (ds90cf365) input terminal no. input signal (graphics controller output signal) ltm154ex0s interface (cn1) symbol terminal symbol function output signal symbol terminal symbol ta0 44 r0 red pixels display data (lsb) ta1 45 r1 red pixels display data ta2 47 r2 red pixels display data ta3 48 r3 red pixels display data ta4 1 r4 red pixels display data ta5 3 r5 red pixels display data (msb) ta6 4 g0 green pixels display data (lsb) ta- ta+ no.5 no.6 rxin0- rxin0+ tb0 6 g1 green pixels display data tb1 7 g2 green pixels display data tb2 9 g3 green pixels display data tb3 10 g4 green pixels display data tb4 12 g5 green pixels display data (msb) tb5 13 b0 blue pixels display data (lsb) tb6 15 b1 blue pixels display data tb- tb+ no.8 no.9 rxin1- rxin1+ tc0 16 b2 blue pixels display data tc1 18 b3 blue pixels display data tc2 19 b4 blue pixels display data tc3 20 b5 blue pixels display data (msb) tc4 22 hsync horizontal synchronization signal tc5 23 vsync vertical synchronization signal tc6 25 de compound synchronization signal tc- tc+ no.11 no.12 rxin2- rxin2+ clk in 26 clk data sampling clock tclk- tclk+ no.14 no.15 clk- clk+ g0 r5 r4 r3 r2 r1 r0 g5 b0 b1 g4 g1 b4 b5 g3 g2 b2 b3 hsync vsync de y ? ? y ? ? |