o ne, 20 stern ave. springfield, new jersey 07081 u.s.a. telephone: (973) 376-2922 (212)227-6005 fax: (973) 376-8960 U401 - u406 features ? minimum system error and calibration ? low drift with temperature ? operates from low power supply voltages ? high output impedance pin configuration to-71 absolute maximum ratings (ta = 25c unless otherwise specified) gate-drain or gate-source voltage 50v gate current (note 1) 10ma storage temperature range -65c to +200c operating temperature range -55c to +150c lead temperature (soldering, 10sec) +300c power dissipation (ta = 85c) derate above 25c one side 300mw 2.6mw/c both sides soomw 5mw/c note: stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ordering information part package temperature range U401-6 hermetic to-71 -55c to+150c xU401-6 sorted chips in carriers -55cto+150c nj semi-conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. information furnished by nj semi-conductors is believed to.be both accurate and reliable at the time of going to press. however, nj semi-conductors assumes no responsibility for any errors or omissions discovered in its use. nj semi-conductors encourages customers to verify that datasheets are current before placing orders. quality semi-conductors
U401 - u406 electrical characteristics (ta = 25c unless otherwise specified) symbol bvcss igss vgs(off) vgs(on) loss ig bvg1-g2 gfs gos gfs 9os ciss crss en cmrr i vgsi -vos2 1 1 avgsi -vgs2 i at parameter gate-source breakdown voltage gate reverse current (note 2) gate-source cutoff voltage gate-source voltage (on) saturation drain current (note 3) operating gate current (note 2) gate-gate breakdown voltage common-source forward transconductance (note 3) common-source output conductance common-source forward transconductance common-source output conductance common-source input capacitance (note 6) common-source reverse transfer capacitance (note 6) equivalent short-circuit input noise voltage common-mode rejection ratio differential gate-source voltage gate-source voltage differential drift (note 4) U401 min -50 -.5 0.5 50 2000 1000 95 max -25 -2.5 -2.3 10.0 -15 -10 7000 20 2000 2.0 8.0 3.0 20 5 10 u402 min -50 -.5 0.5 50 2000 1000 95 max -25 -2.5 -2.3 10.0 -15 -10 7000 20 2000 2.0 8.0 3.0 20 10 10 u403 min -50 -.5 0.5 50 2000 1000 95 max -25 -2.5 -2.3 10.0 -15 -10 7000 20 2000 2.0 8.0 3.0 20 10 25 u404 min -50 -.5 0.5 50 2000 1000 95 max -25 -2.5 -2.3 10.0 -15 -10 7000 20 2000 2.0 8.0 3.0 20 15 25 u405 min -50 -.5 0.5 50 2000 1000 90 max -25 -2.5 -2.3 10.0 -15 -10 7000 20 2000 2.0 8.0 3.0 20 20 40 u406 min -50 -.5 0.5 50 2000 1000 max -25 -2.5 -2.3 10.0 -15 -10 7000 20 2000 2.0 8.0 3.0 20 40 80 units v pa v ma pa na v us pf nv vrt db mv uv/c test conditions vos=0, lo = -1(ia vos=0, vgs=-30v vos=15v, !d=1na vdg = 15v, lo = 200ua vos=10v, vqs = 0 vdg= 15v, i 3 = 200ua ta=125c vos=0, vgs=o, lo=1(ia vds= 10v, vgs=0 vdg= 15v, id = 200|ja vds=15v, vos=0 f = 1khz f = 1khz f = 10hz (note 6) vdg= 10 to 20v, id = 200ua (note 5, 6) vdg = 10v, ld = 200ua vdg= 10v, id = 200na ta = -55c tb = +25c tc = +125c notes: 1. per transistor. 2. approximately doubles for every 10c increase in ta. 3. pulse test duration = 300ns; duty cycle <3%. 4. measured at end points ta, tb, tc. 5. cmrr = 20 logic . ,,,avd,.. , i, avoo = 10v. _ | vgs1 -vgs21 _ 6. for design reference only, not 100%"tested.
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