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september 2013 doc id 15938 rev 9 1/42 1 TDA7705 highly integrated tuner for am/fm car radio features fully integrated vco for world tuning high performance pll for fast rds system am/fm mixers with hi gh image rejection integrated am-lna and am-pindiode automatic self alignment for preselection and image rejection digital if signal processing, high performance and drift-free integrated if-filters with high selectivity, high dynamic range and adaptive bandwidth control rds demodulation with group and block synchronization high performance stereodecoder with noiseblanker i 2 c/spi bus controlled single 5 v supply lqfp64 package description the TDA7705 highly integrated tuner (hit) is a new generation of high performance tuners for carradio applications. it contains mixers and if amplifiers for am and fm, fully integrated vco and pll synthesizer, if-processing includin g adaptive bandwidth control, stereo decoder and rds decoder on a single chip. the utilization of digital si gnal processing results in numerous advantages against today's tuners: very low number of external components, very small space occupation and easy application, very high selectivity due to digital filters, high flexibility by software control and automatic alignment. lqfp64 table 1. device summary order code package packing TDA7705 lqfp64 (10x10x1.4mm) tray TDA7705tr lqfp64 (10x10x1.4mm) tape and reel www.st.com
contents TDA7705 2/42 doc id 15938 rev 9 contents 1 block diagram and pins descripti on . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 function description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 fm - mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 fm - agc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 am - lna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 am - agc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.5 am - mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.6 if a/d converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.7 audio d/a converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.8 vco . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.9 pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.10 crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.11 dsp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.12 io interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.13 serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.13.1 serial interface choice / boot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.13.2 i 2 c bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.13.3 spi bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 general key parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4.1 fm - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4.2 am - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.4.3 vco . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4.4 phase locked loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4.5 tuning dac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TDA7705 contents doc id 15938 rev 9 3/42 3.4.6 if adc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4.7 audio dac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.8 io interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.9 i 2 c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.10 spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.11 warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.5 overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.5.1 fm overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.5.2 am mw overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.5.3 am lw overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.5.4 am sw overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.5.5 wx overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4 front-end processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5 weak signal processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.1 fm if-processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.1.1 dynamic channel selection filter (diss) . . . . . . . . . . . . . . . . . . . . . . . . 33 5.1.2 soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.1.3 adjacent channel mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.1.4 stereo blend- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.1.5 high cut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.1.6 stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.2 am if-processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.2.1 channel selection filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.2.2 soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.2.3 high cut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6 application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 6.1 basic application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 6.2 application schematic example with spi-bus and tuned preselection . . . 39 7 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
list of tables TDA7705 4/42 doc id 15938 rev 9 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. boot mode pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 5. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 6. general key parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 7. fm - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 8. am - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 9. vco . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 10. phase locked loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 11. tuning dac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 12. if adc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 13. audio dac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 14. io interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 15. i 2 c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 16. spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 17. fm overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 18. am mw overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 19. am lw overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 20. am sw overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 21. wx overall system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 22. register 0x00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 23. register 0x01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 24. register 0x02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 25. register 0x05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 26. dynamic channel selection filter (diss) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 table 27. soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 28. adjacent channel mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 29. stereo blend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 30. high cut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 31. de-emphasis filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 32. stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 33. channel selection filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 34. soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 35. high cut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 36. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
TDA7705 list of figures doc id 15938 rev 9 5/42 list of figures figure 1. functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. i 2 c "write" sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 figure 4. i 2 c "read" sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 5. spi modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 6. spi "write" sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 7. spi "read" sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. i 2 c bus timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 9. spi bus timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 10. fm input set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 11. am mw input set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 12. am lw input set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 13. am sw input set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 14. wx input set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 15. fm wide-band application / i 2 c control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 16. example of fm tuned (narrow-band) application / spi control . . . . . . . . . . . . . . . . . . . . . . 39 figure 17. lqfp64 (10x10x1.4mm) mechanical data and package dimensions. . . . . . . . . . . . . . . . . 40
block diagram and pins description TDA7705 6/42 doc id 15938 rev 9 1 block diagram and pins description 1.1 block diagram figure 1. functional block diagram : 8 fref vco pll : n agc adc adc supply dac osc stereo dac audio out sum nco dll dsp agc am rdsint rds i 2 c/ spi : 8 fref vco pll : n agc adc adc supply dac osc stereo dac audio out sum nco dll dsp agc am rdsint rds i 2 c/ spi
TDA7705 block diagram and pins description doc id 15938 rev 9 7/42 1.2 pin description figure 2. pin connection (top view) table 2. pin description pin # pin name function 1 lf1 pll loopfilter output 2 plltest pll test output / gpo 3 dac fm tuning dac output 4 tcagcfm fm agc time constant 5 fmmix1dec fm mixer decoupling 6 fmix1in fm mixer input 1 7 fmix2in fm mixer input 2 8 gnd-rf rf ground 9 fmpindrv fm agc pin diode driver 10 vcc-rf 5v supply for rf section 11 tcam am agc time constant 12 ampindrv am agc external pin diode driver 13 pinddec am agc internal pin diode decoupling 14 pindin am agc internal pin diode input 15 gnd-lna am lna and internal pin diode gnd 16 lnain am lna input 1 2 3 5 6 4 7 8 9 10 27 11 28 29 30 31 32 59 58 57 56 54 55 53 52 51 50 49 43 42 41 39 38 40 48 47 46 44 45 fmmix1in fmmix1dec tcagcfm plltest lfi dac tcam vcc-rf fmpindrv fmmix2in gnd-rf ammixin2 ammixin1 ammixdec gnd-if vrefdec vref165 gnd-dig vcc-dig vccreg12 reg-1v2 vdd-3v3 vcc-pll vcc-ifadc lifrefh lifrefl dacoutr gnd-ifadc dacoutl gnd-dac oscin oscout vcc-dac gpio0 gpio1 gpio2 rdsint vdd-1v2 gpio3 gnd-1v2 vdd-1v2 test mode rstn ac00418 22 23 24 25 26 60 gnd-pll 61 vcodec 62 lfref 63 vcc-vco 64 gnd-vco lnadec lnaout lnain2 lnaout2 lnadec2 17 18 19 20 21 37 36 34 33 35 scl/clk sda/mosi spi_cs gnd-3v3 spi_miso 12 13 14 15 16 lnain gnd-lna pindin ampindrv pinddec
block diagram and pins description TDA7705 8/42 doc id 15938 rev 9 17 lnadec am lna decoupling 18 lnaout am lna output first stage 19 lnain2 am lna input 2 nd stage 20 lnaout2 am lna output 21 lnadec2 am lna decoupling 2 nd stage 22 ammixin2 am mixer input 2 23 ammixin1 am mixer input 1 24 ammixdec am mixer decoupling 25 gnd-if if and vref gnd 26 vref165 1.65v reference voltage decoupling 27 vrefdec 3.3v reference voltage decoupling 28 gnd-dig digital gnd 29 vcc-dig 5v supply for digital logic 30 vccreg1v2 vcc of 1.2v regulator 31 reg1v2 1.2v regulator output 32 vdd-3v3 3.3v vdd output / decoupling 33 gnd-3v3 3.3v vdd gnd 34 spi_cs spi chip select 35 spi_miso spi data output 36 sda / spi_mosi i 2 c bus data / spi data input 37 scl / spi_clk i 2 c bus clock / spi clock 38 vdd-1v2 1.2v dsp supply 39 rdsint rds interrupt 40 gpio3 reserved 41 gpio2 reserved 42 gpio 1 reserved 43 gpio 0 reserved 44 mode for debug purpose only, connected to gnd 45 rstn reset pin (active low) 46 test test input 47 vdd-1v2 1.2v dsp supply 48 gnd-1v2 digital gnd for 1.2v vdd 49 vcc-dac 5v supply of audio dac 50 oscout xtal osc output 51 oscin xtal osc input table 2. pin description (continued) pin # pin name function
TDA7705 block diagram and pins description doc id 15938 rev 9 9/42 52 gnd-dac audio dac gnd 53 dacoutl audio output left 54 dacoutr audio output right 55 gnd-ifadc if adc gnd 56 lifrefl if adc reference low 57 lifrefh if adc reference high 58 vcc-ifadc 5v supply of if adc 59 vcc-pll 5v supply of pll 60 gnd-pll pll gnd 61 vco-dec vco decoupling 62 lfref loopfilter reference 63 vcc-vco 5v supply of vco 64 gnd-vco vco gnd table 2. pin description (continued) pin # pin name function
function description TDA7705 10/42 doc id 15938 rev 9 2 function description 2.1 fm - mixers the image-rejection mixer has two fm inputs, selectable through software. these inputs feed stages with different gains, noise figures, and iip3. they are optimized for best performance in case of a passive tuned prestage and for a passive fixed bandpass without tuning for low-cost application respectively. the second input offers also the possibilit y of an easy addition of a weather-band preselection filter. the input frequency is downconverted to low if with high image rejection. the tuned application is supported by an 8-bit tuning dac. the alignment of the dac is performed automatically. 2.2 fm - agc the programmable rfagc senses the mixer in put whereas the ifagc senses the ifadc input to avoid overload. the pin diode driver is able to drive external pin diodes with a current value as high as 15ma. the time constant of the fm-agc is defined by an external capacitor. 2.3 am - lna the am-lna is integrated with low noise and high iip2 and iip3. the gain of the lna is controlled by the agc. the maximum gain is set with an external resistor, typically 26 db with 1 k ? . 2.4 am - agc the programmable am-rf-agc senses the mixer inputs and controls the internal pin diode and lna gain. first the lna gain is reduced by about 10db, then the pin diodes are activated to attenuate the signal. the time constant of the am-agc is defined with an external capacitor and programmable internal currents. 2.5 am - mixers the image-rejection mixer has two am inputs selectable via software. it easily supports low- cost applications for extended frequency bands like sw, drm. the input frequency is converted to low if with high image rejection.
TDA7705 function description doc id 15938 rev 9 11/42 2.6 if a/d converters a high performance iq-ifadc converts the if-signal to digital if for subsequent digital signal processing. 2.7 audio d/a converters a stereo dac provides the left / right audio signals after if-processing and stereodecoding by the dsp. 2.8 vco the vco is fully integrated without any external tuning component. it covers all fm frequency bands including eu, us , japan, easteu, weatherband and am-bands including lw, mw, sw. 2.9 pll the high speed tuning pll is able to settle within about 300 s for fast rds applications. the frequency step can be as low as 5 khz in fm and 500 hz in am. 2.10 crystal oscillator the device works with a 37.05 mhz fundamental tone crystal, and can be used also with a 3 rd overtone 37.05 mhz crystal. 2.11 dsp the dsp and its hardware accelerators perform all the digital signal processing. the main program is fixed in rom. control parameters are copied in ram and are accessible and modifiable there, thus allowing parametric performance optimization. it performs: digital down-conversion of if bandwidth selection with va riable controlled bandwidth fm and am noiseblanking fm/am demodulation with softmute, high-cut, weak signal processing and quality detection fm stereo decoding with stereo blend rds demodulation including error correction and block synchronization with generation of an rds interrupt for the main p autonomous control of rds-af tests self alignment of preselection tuning
function description TDA7705 12/42 doc id 15938 rev 9 2.12 io interface pins the TDA7705 has the following io pins: the pins labeled gpio0, 1, 2 and 3 (pins 43 to 40) are reserved. the pin plltest output voltage can be freely programmed via software and be used to drive switches if needed by the application. all the inputs are voltage-tolerant up to 3.5 v . the outputs can drive currents up to 0.5 ma from the internal 3.3 v supply line. 2.13 serial interface the device is controlled with a standard i 2 c bus or spi interface. through the serial bus the processing parame ters can be modifed and the signal quality parameters and the rds information can be read out. the operation of the device is handled through high level commands sent by the main car- radio p through the serial interface, which allow to simplify the operations carried out in the main p. the high level commands include among others: set frequency (which allows to avoid computing the pll divider factors); start seek (the seek operation can be carried out by the TDA7705 in a completely autonomous fashion); rds seek/search (jumps to af and quality measurements are automatically sequenced). 2.13.1 serial interf ace choice / boot mode the device can communicate with the main p with two different standard serial protocols: spi and i 2 c. the configuration is chosen by setting the proper value (0v or 3.3v) at pins 35 and 39 and it is latched (e.g. made effective) when the rstn line transitions from low to high (when rstn is low, the ic is in reset mode). the voltage level forced to pins 35 and 39 must be released to start the system operation a suitable time after the rstn line has gone high. the list of configurations is shown in the following table: plltest pin 2 general purpose output spi_cs pin 34 serial communication with p spi_miso pin 35 serial communication with p sda/mosi pin 36 serial communication with p scl/clk pin 37 serial communication with p rdsint pin 39 serial communication with p rstn pin 45 reset pin driven by p
TDA7705 function description doc id 15938 rev 9 13/42 if i 2 c serial bus is chosen as means of communica tion with the contro lling device, two chip addresses are possible: 0xc2/c3 or 0xc8/c9, depending on the initial configuration of pins 35 and 39. the status of pins 35 and 39 during the reset phase can be set to: high , through external <10 k ? resistors tied to 3.3v (pin 32), or low , by not forcing any voltage on them from outside, as 50 kohm internal pull-down resistors are present on said pins. to make sure the boot mode is correctly latched up at start-up, it is advisable to keep the rstn line low until the ic supply pins have reached their steady state, and then for an additional time t reset (see section 3.4.8 ). 2.13.2 i 2 c bus protocol i 2 c requires two signals: clock (scl) and data (sda - bidirectional). the protocol requires an acknowledge after any 8-bit transmission. a "write" communication example is shown in the figure below, for an unspecified number of data bytes (see the relevant technical documentation for frame structure description): figure 3. i 2 c "write" sequence table 3. boot mode pin configuration configuration: i 2 c (addr. 0 x c2) i 2 c (addr. 0 x c8) spi pin at reset operation at reset operation at reset operation 39 rdsint 0 in rds interrupt out 0 in rds interrupt out 1 in rds interrupt out 37 scl x i 2 c scl in x i 2 c scl in x spi clk in 36 sda x i 2 c sda in/out x i 2 c sda in/out x spi mosi in 35 (spi_miso) 0 in - 1 in - 1 in spi miso out 34 (spi_cs) x - x - x spi ss in ack data stop clk1 clk2 ? clk8 clk9 clk1 clk2 start ack d7 d6 address a0 ? d0 ? clk8 clk9 a7 a6 ? scl sda
function description TDA7705 14/42 doc id 15938 rev 9 the sequence consists of the following phases: start: sda line transitioning from h to l with scl fixed h. this signifies a new transmission is starting; data latching: on the rising scl edge. the sda line can transition only when scl is low (otherwise its transitions are interpreted as either a start or a stop transition); acknowledge: on the 9 th scl pulse the p keeps the sda line h, and the TDA7705 pulls it down if communication has been successful. lack of the acknowledge pulse generation from the TDA7705 means that the communication has failed; a chip address byte must be sent at the beginning of the transmission. the value can be c2 or c8 (according to the mode chosen at start-up during boot) for "write"; as many data bytes as needed can follow the address before the communication is terminated. see the next section for details on the frame format; stop: sda line transitioning from l to h with scl h. this signifies the end of the transmission. red lines represent transmissions from the TDA7705 to the p. a "read" communication example is shown in the figure below, for an unspecified number of data bytes (see later on for frame structure decription): figure 4. i 2 c "read" sequence the sequence is very similar to the "write" one and has the same constraints for start, stop, data latching. the differences follow: a chip address must always be sent by the p to the TDA7705; the address must be c3 (if c2 had been selected at boot) or c9 (if c8 had been selected at boot); a header is transmitted after the chip address (the same happens for "write") before data are transferred from the TDA7705 to the p. see the relevant technical documentation for details on the frame format; when data are transmitted from the TDA7705 to the p, the p keeps the sda line h; the acknowledge pulse is generated by the p for those data bytes that are sent by the TDA7705 to the p. failure of the p to generate an ack pulse on the 9 th clk pulse has the same effect on the TDA7705 as a stop. the max. clock speed is 500 kbit/s. 2.13.3 spi bus protocol spi requires four signals: clock (clk), master output/slave input (mosi - for communication from the p to the TDA7705), master input/slave output (miso - for communication from the TDA7705 to the p), chip select (cs). clk is generated by the master device and is used for synchronization. mosi and miso are the data lines. the cs line is unique for each device in an spi bus. the p pulls low the TDA7705 cs line to select it for communication. the protocol does not foresee any transmission acknowledgement. the spi protocol has four possible modes of operation as far as data latching is concerned: sda a7 a6 ? a0 d7 d6 ? d0 scl clk1 clk2 ? clk8 clk9 clk1 clk2 ? clk8 clk9 start address ack data ack stop
TDA7705 function description doc id 15938 rev 9 15/42 figure 5. spi modes in the case of the TDA7705, the data are latched on the clock's rising edge, with cpol = 1 and cpha = 1 (mode 3 in the figure above). according to the specification of this mode, the polarity of the clk line when no communication is taking place is high. a "write" communication example is shown in the figure below, for an unspecified number of bits (see the relevant technical documentation for frame structure description): figure 6. spi "write" sequence the start condition is signaled by the cs line going low, and the stop condition by the cs line going high. it is not allowed to toggle the cs line while the communication is going on. a "read" communication example is shown in the figure below, for an unspecified number of bits (see the relevant technical documentation for frame structure description ): figure 7. spi "read" sequence the red line is controlled by the TDA7705, whereas the black lines are controlled by the p. ... ... lsb ... ... ... ... ... ... ... ... cs clk mosi msb lsb ... ... lsb msb ... ... ... ... miso ... clk mosi msb ... cs
electrical specifications TDA7705 16/42 doc id 15938 rev 9 3 electrical specifications 3.1 absolute maximum ratings 3.2 thermal data 3.3 general key parameters table 4. absolute maximum ratings symbol parameter test condition min typ max units v cc supply voltage - - - 5.5 v t stg storage temperature - -55 - 150 c v esd esd withstand voltage human body model ? 2000 v charged device model ? 450 charged device model, corner pins ? 750 machine model ? 150 table 5. thermal data symbol parameter test condition value units r th j-amb thermal resistance junction-to-ambient lqfp64 10x10, double-layer jedec pcb 55 c/w table 6. general key parameters symbol parameter test condition min typ max units v cc 5 v supply voltage - 4.7 5 5.25 v i cc supply current @ 5 v - - 220 295 ma t amb ambient temperature range - -40 - 85 c v vccreg12 vccreg12 supply voltage see note (1) 2--v v 1v2 digital core 1.2v supply voltage when supplied externally see note (2) 1.08 1.2 1.32 v i 1v2 digital core 1.2 v supply current v 1v2 = 1.08 v see note (2) --120ma v 1v2 = 1.2 v see note (2) -80135ma v 1v2 = 1.32 v see note (2) --150ma 1. in the typical application supplied from 5v with a series resistor. 2. when the 1.2 v supply is applied externally , and not using the internal 1.2 v regulator.
TDA7705 electrical specifications doc id 15938 rev 9 17/42 3.4 electrical characteristics v cc = 4.7 v to 5.25 v; t amb = -40 c to +85 c; unless otherwise specified. 3.4.1 fm - section table 7. fm - section symbol parameter test condition min typ max units fm imr mixer r in input resistance - 90 130 170 k ? v noise input noise voltage mix 1, r source = 1.5 k ? , noiseless -2.53.1 nv/ ? hz mix 2, r source = 800 ? , noiseless -22.5 iip3 3 rd order intercept point mix 1 up to v in/tone = 90 dbv mix 2 up to v in/tone = 85 dbv 122 118 125 121 - dbv dbv fm agc rfagc-thr rfagc threshold, referred to mixer input; rf level mix 1, min setting - 87 - dbv mix 1, max setting - 93 - mix 2, min setting - 85 - mix 2, max setting - 91 - threshold steps - - 2 - db threshold error @ t amb = 27 c -1.5 1.5 db threshold temperature drift - 0.016 - db/k ifagc-thr ifagc threshold, referred to mixer input; at tuned frequency rf level mix 1, min setting - 81 - dbv mix 1, max setting - 85 - mix 2, min setting - 77 - mix 2, max setting - 81 - threshold steps - - 2 - db threshold error @ t amb = 27 c -1.5 1.5 db threshold temperature drift - 0.016 - db/k - pin diode source current @ t amb = 27 c; see note (1) 12 - - ma - pin diode sink current - 3 - 20 a - pin diode source current in constant current mode @ t amb = 27 c; see note (1) 0.4 - - ma 1. the current is generated by a ptat (proportional to abso lute temperature) source, and has therefore a temperature dependency described by: ? i/io = ? t/to, with io being the current at ambient temperature (25 c) and to the ambient temperature (25c) express ed in kelvin, that is 298 k.
electrical specifications TDA7705 18/42 doc id 15938 rev 9 3.4.2 am - section table 8. am - section symbol parameter test condition min typ max units am imr mixer r in input resistance - 20 30 45 k ? v out_max max. output voltage without clipping - 126 - dbv v n,in input noise voltage mix 1, r source = 1 k ? , noiseless -8.512 nv/ ? hz mix 2, r source = 1 k ? , noiseless -8.512 iip3 3 rd order intercept point mix 1,2 up to v in/tone = 90 dbv 126 129 - dbv iip2 2 nd order intercept point mix1 1,2 up to v in/tone = 90 dbv - 158 - dbv lo hsupp lo harmonic suppression n=2,3,4,5,6 - 100 - db n=7,9 - 85 - am lna gain voltage gain max gain, r ext = 1 k ? 21 25 28 db min gain (agc controlled) - 12 - r in input resistance - - 1000 k ? c in input capacitance - - 20 pf v n,in input noise voltage - - 1.0 1.4 nv/ ? hz iip3 3 rd order intercept point @ maximum lna gain - 125 - dbv iip2 2 nd order intercept point @ maximum lna gain - 143 - dbv am pin diode iip2 2 nd order intercept point full attenuation, c source = 80 pf, f=1 mhz - 140 - dbv r min minimum resistance - - 50 80 ? c in input capacitance high ohmic - 12 - pf am agc agc-thr referred to mixer input rf level mix 1,2 min setting - 87 - dbv mix 1,2 max setting - 93 - thr-steps threshold steps - - 1 - db threshold error @ t amb = 27 c -2.5 - 2.5 threshold temperature drift - -3 - 3 - pin diode source current @ t amb = 27 c; see note (1) 2-10ma - pin diode sink current - 15 35 50 a - pin diode source current in constant current mode @ t amb = 27 c; see note (1) 1.5 2.5 3.5 ma 1. the current is generated by a ptat (proportional to abso lute temperature) source, and has therefore a temperature dependency described by: ? i/io = ? t/to, with io being the current at ambient temperature (25 c) and to the ambient temperature (25 c) expressed in kelvin, that is 298 k.
TDA7705 electrical specifications doc id 15938 rev 9 19/42 3.4.3 vco 3.4.4 phase locked loop 3.4.5 tuning dac 3.4.6 if adc table 9. vco symbol parameter test condition min typ max units f vco frequency range vco - 1100 1550 mhz pn phase noise of lo locked vco; values referred @ 100mhz @ 100 hz @ 1 khz @ 10 khz - -100 -115 -115 -dbc/hz dev deviation error (rms) fm reception, deemphasis 50s, f audio = 20 hz...20 khz -5-hz table 10. phase locked loop symbol parameter test condition min typ max units t settle settling time fm ? f < 10 khz - 300 - s fm step fm frequency step - - 5 - khz am step am frequency step - - 500 - hz table 11. tuning dac symbol parameter test condition min typ max units res resolution 8 bit - 18 - mv v outmin min output voltage - - 0.6 0.7 v v outmax max ouput voltage - vcc-0.2 vcc-0.1 - v r out output impdedance - 1.5 2.5 3.5 k ? dnl diff. non linearity - - - 0.5 lsb t conv conversion time - - 20 - s table 12. if adc symbol parameter test condition min typ max units dr fm dynamic range in fm bw = 200 khz - 90 - db v n,in fm input noise referred to mixer input mixer 1 mixer 2 - 1.1 0.7 1.9 1.2 nv/ ? hz dr am dynamic range in am bw = 4 khz - 103 - db v n,in am input noise referred to mixer input - - 6.9 12 nv/ ? hz
electrical specifications TDA7705 20/42 doc id 15938 rev 9 3.4.7 audio dac 3.4.8 io interface pins table 13. audio dac symbol parameter test condition min typ max units v out max. output voltage full scale - 1 - vrms bw bandwidth 1db attenuation - 15 - khz r out output resistance - 600 750 900 ? v n, out output noise - - 60 95 vrms thd distortion -6 dbfs - 0.03 0.04 % table 14. io interface pins symbol parameter test condition min typ max units - high level output voltage (all ios except gpo pin 2) i out = 500 a 2.9 3.2 - v - gpios source current (all ios in source mode except pin 2) total sourced current by all gpios - - 1.25 ma - low level output voltage (all ios except gpo pin 2) i out = -1 ma - 0.1 0.3 v - input voltage range - 0 - 3.5 v - high level input voltage - 2.0 - - v - low level input voltage - - - 0.8 v t reset reset time minimum time during which pin rstn must be low so as to reset the device 10 - - s t latch boot mode configuration latch time minimum time during which the voltage applied at pins 25 and 39 must be kept in order to latch the correct boot mode (serial bus configuration) 10 - - s - gpo plltest (pin 2) max source current ---1ma - gpo plltest (pin 2) max sink current --1-ma - gpo plltest (pin 2) minimum high level output voltage i out = 1 ma 2.8 3.1 - v gpo plltest (pin 2) maximum high level output voltage i out = 1 ma - 0.1 0.3 v
TDA7705 electrical specifications doc id 15938 rev 9 21/42 3.4.9 i 2 c interface the following parameters apply to the serial bus communication when i 2 c protocol has been selected at start-up. for the other electrical characteristics of the pins, section 3.4.8 applies. the parameters of the following table are defined as in figure 8 . figure 8. i 2 c bus timing diagram table 15. i 2 c interface symbol parameter min max units f scl scl clock frequency - 500 khz t aa scl low to sda data valid 0.3 - s t buf time the bus must be kept free before a new transmisison 1.3 - s t hd-sta start condition hold time 0.6 - s t low clock low period 1.3 - s t high clock high period 0.6 - s t su-sda start condition setup time 0.1 - s t hd-dat data input hold time 0 0.9 s t su-dat data input setup time 0.1 - s t r sda & scl rise time - 0.3 s t f sda & scl fall time - 0.3 s t su-stop stop condition setup time 0.6 - s t dh data out time - 0.3 s d95au378a t high t r t low t f scl sda in sda out t su-sta t hd-sda t hd-dat t su-dat t su-stop t buf t aa t dh
electrical specifications TDA7705 22/42 doc id 15938 rev 9 3.4.10 spi interface the following parameters apply to the serial bus communication when spi protocol has been selected at start-up. for the other electrical characteristics of the pins, section 3.4.8 applies. figure 9. spi bus timing diagram 3.4.11 warning when the TDA7705 is not powered on, the internal esd protection diodes pull-down keep the i 2 c/spi lines connected to ground. this implies that the i 2 c/spi bus connected to the TDA7705 may not be used to drive other devices when the TDA7705 is powered off. table 16. spi interface symbol parameter min max unit f sck clock frequency - 4.0 mhz t su data setup time 25 - ns t h data hold time 25 - ns t wh sck high time 50 - ns t wl sck low time 50 - ns t ri input rise time - 2 s t fi input fall time - 2 s t v output valid from clock low - 50 ns t ho output hold time 25 - ns t dis output disable time 25 ns t cs cs high time 25 - ns t css cs setup time 25 - ns t csh cs hold time 25 - ns valid in v ih v il t css v ih v il v ih v il v oh v ol hi-z t su t h t wh t wl t v t cs t csh t ho t dis hi-z spi_ss spi_clk spi_mosi spi_miso t ri t fi
TDA7705 electrical specifications doc id 15938 rev 9 23/42 3.5 overall system performance all measurements obtained with application of figure 16 (fm tuned application / spi control) unless otherwise specified. 3.5.1 fm overall system performance antenna level equivalence: 0 dbv = 1 v rms (antenna terminal voltage with 50 ? source). figure 10. fm input set-up input level referred to signal generator loaded with 50 ? (v rf , node 'a'); no antenna dummy; am input not connected. f rf = 98.1 mhz, v rf = 60 dbv, mono modulation, f dev = 40 khz, f audio = 1 khz. de-emphasis = 50 s. unless otherwise specified table 17. fm overall system performance parameter test condition min typ max units tuning range fm eu (can be modified by the user) (automatic fe alignment available) 87.5 - 108 mhz tuning step fm eu (can be modified by the user) - 100 - khz tuning range fm us (can be modified by the user) (automatic fe alignment available) 87.5 - 107.9 mhz tuning step fm us (can be modified by the user) - 200 - khz tuning range fm jp (can be modified by the user) (automatic fe alignment available) 76 - 90 mhz tuning step fm jp (can be modified by the user) - 100 - khz tuning range fm eeu (can be modified by the user) (automatic fe alignment not available) 65 - 74 mhz tuning step fm eeu (can be modified by the user) - 100 - khz sensitivity s/n =26db - -7 -4 dbv s/n @ 10 dbv, no highcut, diss bw = #3 -55-db ultimate s/n @ 60 dbv, mono 72 75 - db @ 60 dbv, deviation = 75 khz, mono 78 81 - db @ 60 dbv, stereo 70 73 - db v rf + 6db pcb under test 50 v rf + 6db v rf 50 50 a
electrical specifications TDA7705 24/42 doc id 15938 rev 9 distortion deviation= 75 khz - 0.05 - % max deviation thd=3% - 140 - khz adjacent channel selectivity ? f=100khz, sinad=30db desired 40 dbv, dev=40khz, 400hz undesired. dev=40khz, 1khz -25-db alternate channel selectivity ? f=200 khz, sinad=30 db desired 40 db v, dev=40khz, 400 hz undesired. dev=40khz, 1khz -63-db max. strong signal interferer desired = 10 dbv sinad = 30 db undesired ? f = 5 mhz dev = 40 khz, 1 khz - 94 - dbv max. strong signal interferer no preselection (?wide-band?) application desired = 10 dbv sinad = 30 db undesired ? f = 5 mhz dev = 40 khz, 1 khz - 88 - dbv 3 signal performance (1) desired = 40 dbv, dev = 40 khz, 400 hz, sinad = 30 db undesired1 = 400 khz, dev = 40 khz, 1 khz undesired2 = 800 khz, no mod - 103 - dbv desired = 40 dbv, dev = 40 khz, 400 hz, sinad = 30 db undesired1 = 1 mhz, dev=40khz, 1 khz undesired2=2mhz, no mod - 106 - dbv 3 signal performance (1) no preselection (?wide-band?) application desired = 40 dbv, dev = 40 khz, 400 hz, sinad = 30 db undesired1 = 400 khz, dev = 40 khz, 1 khz undesired2 = 800 khz, no mod - 103 - dbv desired = 40 dbv, dev=40khz, 400 hz, sinad=30 db undesired1 =1 mhz, dev=40khz, 1 khz undesired2=2mhz, no mod - 104 - dbv am suppression m =30 % - 70 - db table 17. fm overall system performance (continued) parameter test condition min typ max units
TDA7705 electrical specifications doc id 15938 rev 9 25/42 3.5.2 am mw overal l system performance antenna level equivalence: 0 dbv = 1 v rms . figure 11. am mw input set up level referred to sg output before antenna dummy (v rf , node 'a'); capacitive dummy 15pf+68pf, fm input not connected. f rf = 999 khz (1000 khz for us), v rf =74 dbv, mod = 30%, f audio =400 hz, unless otherwise specified. image rejection - - 80 - db logarithmic field strength indicator @40 dbv read ?fm_smeter_log? -0.33 (equiv. to 37 dbv) -0.3 -0.27 (equiv. to 43 dbv) -- 1. signal levels referred to combiner output. table 17. fm overall system performance (continued) parameter test condition min typ max units table 18. am mw overall system performance parameter test condition min typ max units tuning range mw eu/jp (can be modified by the user) 531 - 1629 khz tuning step mw eu/jp (can be modified by the user) - 9 - khz tuning range mw us (can be modified by the user) 530 - 1710 khz tuning step mw us (can be modified by the user) - 10 - khz sensitivity s/n = 20 db - 27 30 dbv ultimate s/n @ 80 dbv 63 66 - db agc f.o.m. ref.=74 dbv -10db drop point 50 62 65 db distortion m = 80 % - 0.1 - % adjacent channel selectivity ? f=9 khz, sinad = 26 db undesired. m=30%, 1 khz -42-db alternate channel selectivity ? f=18 khz, sinad=26 db undesired. m=30%, 1khz -50-db pcb under test 30 v rf + 6db v rf 50 50 15pf 68pf a
electrical specifications TDA7705 26/42 doc id 15938 rev 9 strong signal interferer snr ? f= 40 khz desired = 40 dbv undesired = 100 dbv, m= 30%, 1 khz -15-db ? f=400khz desired=40 dbv undesired=100 dbv, m=30%, 1khz 17 - - db strong signal interferer suppression ? f=40 khz desired=40 dbv undesired=110 dbv, m=30%, 1 khz -4-db ? f=400khz desired=40 dbv undesired=110 dbv, m=30%, 1khz -4-db strong signal interferer cross-modulation ? f=40khz desired=80 dbv undesired=100 dbv, m=30%, 1khz - - 10 db ? f=400khz desired=80 dbv undesired=100 dbv, m=30%, 1khz - - 10 db image rejection - - 80 - db logarithmic field strength indicator @60 dbv read ?am_smeter_log? 0.50 (equiv. to 57 dbv) 0.47 0.43 (equiv. to 63 dbv) - table 18. am mw overall system performance (continued) parameter test condition min typ max units
TDA7705 electrical specifications doc id 15938 rev 9 27/42 3.5.3 am lw overal l system performance antenna level equivalence: 0 dbv = 1 v rms figure 12. am lw input set-up level referred to sg output before antenna dummy (v rf , node 'a'); capacitive dummy 15pf+68pf; fm input not connected. f rf = 216 khz, v rf =74 dbv, mod = 30 %, f audio = 400 hz, unless otherwise specified. table 19. am lw overall system performance parameter test condition min typ max units tuning range lw (can be modified by the user) 144 - 288 khz tuning step lw (can be modified by the user) - 1 - khz sensitivity s/n =20 db - 30 33 dbv ultimate s/n @ 80 dbv 63 66 - db agc f.o.m. ref.=74 dbv -10db drop point 50 62 65 db distortion m = 80 % - 0.1 - % image rejection - - 80 - db pcb under test 30 v rf + 6db v rf 50 50 15pf 68pf a
electrical specifications TDA7705 28/42 doc id 15938 rev 9 3.5.4 am sw overal l system performance antenna level equivalence: 0dbv = 1v rms figure 13. am sw input set-up level referred to sg output before antenna dummy (v rf , node 'a'); capacitive dummy 15pf+68pf; fm input not connected. f rf = 6000 khz, v rf =74 dbv, mod = 30 %, f audio = 400 hz, unless otherwise specified. table 20. am sw overall system performance parameter test condition min typ max units tuning range lw (can be modified by the user) 2300 - 30000 khz tuning step lw (can be modified by the user) - 1 - khz sensitivity s/n =20db - 29 32 dbv ultimate s/n @ 80 dbv 63 66 - db agc f.o.m. ref.=74 dbv -10db drop point 50 62 65 db distortion m = 80 % - 0.3 - % image rejection - - 80 - db pcb under test 30 v rf + 6db v rf 50 50 15pf 68pf a
TDA7705 electrical specifications doc id 15938 rev 9 29/42 3.5.5 wx overall system performance antenna level equivalence: 0 dbv = 1 v rms (antenna terminal voltage with 50 ? source). figure 14. wx input set-up input level referred to signal generator loaded with 50 ? (v rf , node 'a'); no antenna dummy; am input not connected. f rf =162.475 mhz, v rf = 60 dbv, mono modulation, f dev = 3 khz, f audio =400 hz. de-emphasis = 75 s. application: wx using mixer input 2, in conjunction with fm narrow-band. un less otherwise specified. table 21. wx overall system performance parameter test condition min typ max units sensitivity s/n = 26 db - -7 - dbv ultimate s/n @ 60 dbv - 81 - db distortion deviation= 4.5 khz - 0.8 - % max deviation thd = 3 % - > 5 khz - khz adjacent channel selectivity ? f= 25 khz, sinad = 30 db desired 40 dbv, dev =2.0 khz, 400 hz undesired. dev= 3 khz, 1 khz -70-db alternate channel selectivity ? f=50khz, sinad=30db desired 40 dbv, dev=2.0khz, 400hz undesired. dev=2.0khz, 1khz -70-db v rf + 6db pcb under test 50 v rf + 6db v rf 50 50 a
front-end processing TDA7705 30/42 doc id 15938 rev 9 4 front-end processing all the parameters in this sect ion refer to the programmability of the fe part of the device (registers). the part of the registers that are not described here have either fixed values or values written by the tuner drivers, and are described in the proper technical documentation. table 22. register 0x00 register number register definition msb lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 am mixer input selector 0 1 input #1 1 0 input #2 am pin diode 0 internal 1 external am agc mode 0 lna and pin diode 1 pin diode only am agc time constant 0 0 slow (125 ms with 1 f) 0 1 medium (25 ms with 1 f) 1 1 fast (5 ms with 1 f) am agc threshold @ mixin 0 0 0 90 dbv 0 0 1 91 dbv 0 1 0 92 dbv 0 1 1 93 dbv 1 0 0 90 dbv 1 0 1 89 dbv 1 1 0 88 dbv 1 1 1 87 dbv am agc attack time constant 0 normal 1 fast
TDA7705 front-end processing doc id 15938 rev 9 31/42 table 23. register 0x01 register number register definition msb lsb 23222120191817161514131211109876543210 fm mixer input selector 0 1 1 0 input #1 1 0 0 1 input #2 fm mixer gain 0high 1low fm agc time constant 0 normal 1 fast fm agc output mode 00 normal 01 constant 15 ma 10 constant 1 ma table 24. register 0x02 register number register definition msb lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 fm rf agc threshold @ mixin 0 0 87 dbv 0 1 89 dbv 1 0 91 dbv 1 1 93 dbv fm if agc threshold @ ifadc in 0 0 120 dbv 0 1 122 dbv 1 0 124 dbv tuning dac enable 0off 1on tuning dac programming (1) 00000000 0 00000001 1 ???????? ? 11111110 510 11111111 511 1. normally handled by tuner drivers.
front-end processing TDA7705 32/42 doc id 15938 rev 9 table 25. register 0x05 register number register definition msb lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 plltest output status 0low 1high
TDA7705 weak signal processing doc id 15938 rev 9 33/42 5 weak signal processing all the parameters in this sect ion refer to the prog rammability of the dsp part of the device. the typical values are those set by default parameters (start-up without parametric change from main p); the max and th e min values refer to the pr ogrammability range. the values are referred to the typical application ( figure 16: example of fm tuned (narrow-band) application / spi control ). wherever the possible values are a discrete set, all the possible programmable values are displayed. 5.1 fm if-processing 5.1.1 dynamic channel se lection filter (diss) 5.1.2 soft mute table 26. dynamic channel selection filter (diss) (discrete set) symbol parameter test condition min typ max units diss bw if filter #6 response: - 3db - 150 - khz if filter #5 - 110 - khz if filter #4 - 80 - khz if filter #3 - 60 - khz if filter #2 - 45 - khz if filter #1 - 35 - khz if filter #0 - 25 - khz table 27. soft mute (continuous set) symbol parameter test condition min typ max units smsp start point vs. field strength audio atten = 1 db read ?fm_softmute? no adjacent channel present 0 6 20 dbv smep end point vs. field strength audio atten = smd + 1 db read ?fm_softmute? no adjacent channel present -6 -6 10 dbv smd depth - -30 -15 0 db smtauatt field strength lpf cut-off frequency for soft mute activation - 0.1 100 4000 hz smtaurel field strength lpf cut-off frequency for soft mute release - 0.1 1 4000 hz
weak signal processing TDA7705 34/42 doc id 15938 rev 9 5.1.3 adjacent channel mute 5.1.4 stereo blend- table 28. adjacent channel mute (continuous set) symbol parameter test condition min typ max units acmd depth smd 0 0 db table 29. stereo blend (continuous set) symbol parameter test condition min typ max units maxsep maximum stereo separation field strength = 80 dbv, pilot deviation = 6.75 khz 04050db sbfssp start point vs. field strength separation = maxsep - 1 db no multipath present 20 50 60 dbv sbfsep end point vs. field strength separation = 1 db no multipath present 20 30 60 dbv sbfstm2s field strength-related transition time from mono to stereo v rf step-like variation from 20 dbv to 80 dbv 0.001 3 20 s sbfsts2m field strength-related transition time from stereo to mono v rf step-like variation from 80 dbv to 20 dbv 0.001 0.5 20 s sbmpsp start point vs. multipath separation = maxsep - 1 db equivalent 19 khz am modulation depth; field strength = 80 dbv 51080% sbmpep end point vs. multipath separation = 1 db equivalent 19 khz am modulation depth; field strength = 80 dbv 53080% sbmptm2s multipath -related transition time from mono to stereo v rf step-like variation from 20 dbv to 80 dbv 0.001 1 20 s sbmpts2m multipath -related transition time from stereo to mono v rf step-like variation from 80 dbv to 20 dbv 0.001 0.001 20 s pil thrm2s pilot detector stereo threshold threshold on pilot tone deviation for mono-stereo transition 0.8 2.74 7 khz pil thrhyst pilot detector threshold hysteresis difference in pil. det. deviation threshold for stereo to mono transition compared to pilthrm2s - 0.01 - khz
TDA7705 weak signal processing doc id 15938 rev 9 35/42 5.1.5 high cut control table 30. high cut control (continuous set) symbol parameter test condition min typ max units hcfssp start point vs. field strength minimum rf level for widest hc filter (filter # 7) no multipath present 05050dbv hcfsep end point vs. field strength maximum rf level for narrowest hc filter (filter # 0) no multipath present 03040dbv hcfstw2n field strength-related transition time from wide to narrow band v rf step-like variation from 60 dbv to 10 dbv (1) - hcfstn2w field strength-related transition time from narrow to wide band v rf step-like variation from 0 dbv to 60 dbv (1) 14 100 s hcmpsp start point vs. multipath minimum rf level for widest hc filter (filter # 7) equivalent 19 khz am modulation depth; field strength = 80 dbv 5 10 150 (2) % hcmpep end point vs. multipath maximum rf level for narrowest hc filter (filter # 0) equivalent 19 khz am modulation depth; field strength = 80 dbv 5 30 150 (2) % hcmptn2w multipath -related transition time from narrow to wide band v rf step-like variation from 20 dbv to 80 dbv 0.001 0.001 20 s hcmptw2n multipath -related transition time from wide to narrow v rf step-like variation from 80 dbv to 20 dbv 0.001 0.001 20 s hcmaxbw maximum cut-off frequency of high cut filter bank filter #7, -3 db response frequency, input signal with pre-emphasis hcmin bw 14 18 khz hcminbw minimum cut-off frequency of high cut filter bank filter #0, -3 db response frequency, input signal with pre-emphasis 0.1 3 hcma xbw khz hcnumfilt number of discrete hc filters - - 8 (3) -- 1. depends only on field str ength filter time constant. 2. means that 100% equivalent 19 khz am modu lation depth will not achieve full band narrowing. 3. intermediate filters (#6 - #1) cut-off frequencies exponentially spaced between hcmaxbw and hcminbw.
weak signal processing TDA7705 36/42 doc id 15938 rev 9 5.1.6 stereo decoder 5.2 am if-processing 5.2.1 channel selection filter 5.2.2 soft mute table 31. de-emphasis filter (continuous set) symbol parameter test condition min typ max units detc de-emphasis time constant 1 - - 50 - s de-emphasis time constant 2 - - 75 - table 32. stereo decoder symbol parameter test condition min typ max units pilsup pilot signal suppression pilot 9%, 19 khz, ref=40 khz - 60 - db subcsup subcarrier suppression f = 38 khz - 70 - db f = 57 khz - 70 - db f = 76 khz - 80 - db table 33. channel selection filter symbol parameter test condition min typ max units csf bw channel selection filter bw response: - 3db - 3.7 - khz table 34. soft mute (continuous set) symbol parameter test condition min typ max units smsp start point vs. field strength audio atten = 1 db read ?fm_softmute? no adjacent channel present 02540dbv smep end point vs. field strength audio atten = smd + 1 db read ?fm_softmute? no adjacent channel present 0 0 30 dbv smd depth - -40 -24 0 db smtauatt transition time for field strength-dependent soft mute activation - 0.001 0.1 10 s smtaurel transition time for field strength-dependent soft mute release - 0.001 3 10 s
TDA7705 weak signal processing doc id 15938 rev 9 37/42 5.2.3 high cut control table 35. high cut control (continuous set) symbol parameter test condition min typ max units hcfssp start point vs. field strength minimum rf level for widest hc filter (filter # 7) no multipath present 04050dbv hcfsep end point vs. field strength maximum rf level for narrowest hc filter (filter # 0) no multipath present 03050dbv hcfstw2n field strength-related transition time from wide to narrow band v rf step-like variation from 60 dbv to 10 dbv 0.001 0.2 20 s hcfstn2w field strength-related transition time from narrow to wide band v rf step-like variation from 0 dbv to 60 dbv 0.001 10 20 s hcmaxbw maximum cut-off frequency of high cut filter bank filter #7, -3 db response frequency, input signal with pre-emphasis hcmin bw 14 18 khz hcminbw minimum cut-off frequency of high cut filter bank filter #0, -3 db response frequency, input signal with pre-emphasis 13 hcma xbw khz hcnumfilt number of discrete hc filters - 8 - -
application schematics TDA7705 38/42 doc id 15938 rev 9 6 application schematics 6.1 basic application schematic figure 15. fm wide-band application / i 2 c control 1. note: components marked with a * are being c onsidered for replacement with resistors, pending optimization test results. toko ndk5032 toko xtal ** * fmant vrf dacout_r amant rdsint vdig vdig scl sda_mosi dacout_l rstn vif gnd-rf gnd-rf gnd-rf gnd-rf gnd-rf dig_gnd dig_gnd gnd-rf dig_gnd gnd-rf gnd-rf dig_gnd dig_gnd 470nf 10nf llq2012-fr22 pll test 22pf 1uf TDA7705 1 2 3 4 5 6 17 48 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 7 8 9 10 11 12 13 14 15 16 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 lf1 plltest dac tcagcfm fmmix1dec fmmix1in lnadec gnd-1v2 gnd-vco vcc-vco lfref vcodec gnd-pll vcc-pll vcc-ifadc lifrefh lifrefl gnd-ifadc dacoutr dacoutl gnd-dac oscin oscout vcc-dac fmmix2in gnd-rf fmpindrv vcc-rf tcam ampindrv pinddec pindin gnd-lna lnain lnaout lnain2 lnaout2 lnadec2 ammixin2 ammixin1 ammixdec gnd-if vref165 vrefdec gnd-dig vcc-dig vccreg12 reg-1v2 vdd-3v3 vdd-1v2 test rstn mode afs gpio1 gpio2 gpio3 rdsint vdd-1v2 scl sda spi_miso spi_cs gnd-3v3 220pf llq2012-fr22 100nf kp2311e 100nf 1k 1uf 22pf 1k 100nf 68uh 68pf 100 10nf 5.6k 100nf 68uh 220 1k 15pf 10nf 100nf 120pf 100nf 10nf kp2311e 4.7nf 100nf 10nf 220nf 100nf 1uf 10nf 2.2uf 37.05mhz 1 2 1uf 1uf 100nf 1f 1uf 27 1/2w 100nf 100nf
TDA7705 application schematics doc id 15938 rev 9 39/42 6.2 application schematic example with spi-bus and tuned preselection figure 16. example of fm tuned (narrow-band) application / spi control 1. note: components marked with a * are being c onsidered for replacement with resistors, pending optimization test results. toko toko ndk5032 toko xtal * ** fmant vrf dacout_r amant vdig vif dacout_l rdsint vdig cs scl sda_mosi rstn spi_miso gnd-rf dig_gnd dig_gnd dig_gnd gnd-rf gnd-rf gnd-rf gnd-rf gnd-rf gnd-rf gnd-rf dig_gnd 470nf d3 kv1770 1 2 3 10nf pll test 1 kp2311e 2 1 1nf 1uf r6 68k TDA7705 1 2 3 4 5 6 17 48 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 7 8 9 10 11 12 13 14 15 16 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 lf1 plltest dac tcagcfm fmmix1dec fmmix1in lnadec gnd-1v2 gnd-vco vcc-vco lfref vcodec gnd-pll vcc-pll vcc-ifadc lifrefh lifrefl gnd-ifadc dacoutr dacoutl gnd-dac oscin oscout vcc-dac fmmix2in gnd-rf fmpindrv vcc-rf tcam ampindrv pinddec pindin gnd-lna lnain lnaout lnain2 lnaout2 lnadec2 ammixin2 ammixin1 ammixdec gnd-if vref165 vrefdec gnd-dig vcc-dig vccreg12 reg-1v2 vdd-3v3 vdd-1v2 test rstn mode afs gpio1 gpio2 gpio3 rdsint vdd-1v2 scl sda spi_miso spi_cs gnd-3v3 1 220pf llq2012-fr39 c28 10nf 100nf 1k5 100nf 1 1uf 20pf c31 15pf 1k 68uh 100nf c23 12pf 68pf 10nf 5.6k 100nf 68uh 100 1k c25 6pf 100nf 10nf 120pf 100nf 5pf l6 e558cn -1000101 llq2012-fr18 4.7nf 39pf 100nf kp2311e 2 1 100nf 220nf 1uf 100nf 2.2uf 1uf 37.05mhz 1 2 1uf 100nf 1f 1uf 27 1/2w 1nf 100nf 220 100nf
package information TDA7705 40/42 doc id 15938 rev 9 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 17. lqfp64 (10x10x1.4mm) mechanical data and package dimensions outline and mechanical data a a2 a1 b c 16 17 32 33 48 49 64 e3 d3 e1 e d1 d e 1 k b tqfp64 l l1 seating plane 0.08mm dim. mm inch min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.17 0.22 0.27 0.20 0.0066 0.0086 0.0106 0.0079 c 0.09 0.0035 d 11.80 12.00 12.20 0.464 0.472 0.480 d1 9.80 10.00 10.20 0.386 0.394 0.401 d3 7.50 0.295 e 0.50 0.0197 e 11.80 12.00 12.20 0.464 0.472 0.480 e1 9.80 10.00 10.20 0.386 0.394 0.401 e3 7.50 0.295 l 0.45 0.60 0.75 0.0177 0.0236 0.0295 l1 1.00 0.0393 k 0? (min.), 3.5? (min.), 7?(max.) ccc 0.080 0.0031 lqfp64 (10 x 10 x 1.4mm) 0051434 f ccc
TDA7705 revision history doc id 15938 rev 9 41/42 8 revision history table 36. document revision history date revision changes 31-jul-2007 1 initial release. 01-aug-2008 2 full update datasheet. 08-may-2009 3 document status prom oted from preliminary data to datasheet. updated table 1: device summary on page 1 . updated section 3: electrical specifications on page 16 . updated section 4: front-end processing on page 30 . updated section 5: weak signal processing on page 33 . updated section 6: application schematics on page 38 . 09-jun-2009 4 updated table 5: thermal data on page 16 . updated the value of ?adjacent channel selectivity? parameter in the table 17: fm overall system performance . 01-jul-2009 5 updated figure 17: lqfp64 (10x10x1.4mm) mechanical data and package dimensions on page 40 . 13-jan-2010 6 modified table 1: device summary on page 1 modified table 5: thermal data on page 16 . modified section 3.5.5: wx overall system performance on page 29 . modified section 7: package information on page 40 . 29-jan-2010 7 minor text changes in section 2.13 . modified min. value of ?t hd-dat ? parameter in ta bl e 1 5 : i 2 c interface on page 21 . 22-mar-2010 8 added section 3.4.11: warning on page 22 . 17-sep-2013 9 updated disclaimer
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