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innovative power tm - 1 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. act8325 dual pwm step-down dc/dcs in tdfn33 rev 2, 25-may-11 system blo ck diagram features ? multiple patents pending ? two integrated step-down dc/dc converters ? act8325ndaaa reg1: 350ma min reg2: 550ma min ? act8325ndeh reg1: 550ma min reg2: 800ma min ? 180 out-of-phase operation ? reduces input capacitor requirements ? fixed or adjustable output voltage options ? independent enable/disable control ? minimal external components ? 3x3mm, thin-dfn (tdfn33-10) package ? only 0.75mm height ? rohs-compliant applications ? portable devices and pdas ? mp3/mp4 players ? wireless handhelds ? gps receivers general description the patent-pending act8325 integrates two step- down dc/dcs into a single, thin, space-saving package to provide a cost-e ffective, highly-efficient activepmu tm power management solution. this device is ideal for a wide range of portable hand- held equipment that can benefit from the advan- tages of activepmu technology but do not require a high level of integration. reg1 and reg2 are fixed-frequency, current-mode pwm step-down dc/dc converters that are opti- mized for high efficiency and are capable of supply- ing up to 550ma and 800ma, respectively. both outputs are available in a wide range of factory- preset output voltage options, and an adjustable output voltage mode is also available. the act8325 is available in a tiny 3mm x 3mm 10-pin thin-dfn package that is just 0.75mm thin. a ctive-semi
act8325 rev 2, 25-may-11 active- semi innovative power tm - 2 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. reg1 vp1 gp12 sw1 out1 fb1 ga to battery on1 on2 uvlo reg2 vp2 gp12 sw2 out2 fb2 to battery act8325 a ctive-semi functional block diagram
act8325 rev 2, 25-may-11 active- semi innovative power tm - 3 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. ordering information cd pin configuration thin - dfn (tdfn 33-10) top view part number v out1 v out2 package pins temperature range act8325ndaaa-t adjustable adjustable tdfn33-10 10 act8325ndeh-t 1.8v 3.3v -40c to +85c c : output voltage options detailed in this table represent st andard voltage options, and are available for samples or production orders. additional output voltage options, as detailed in the output voltage codes table, are available for pro duction subject to minimum order quantities. contact active-semi for more informatio n regarding semi-custom output voltage combinations. d : all active-semi components are rohs compliant and with pb-free plating unless specified differently. the term pb-free means semiconductor products that are in compliance with current rohs (restriction of haza rdous substances) standards. output voltage codes a c d e f i q g h adjustable 1.2v 1.5v 1.8v 2.5v 2.8v 2.85v 3.0v 3.3v j 1.4v p 1.3v 10 9 7 6 8 1 2 3 4 5 act8325 vp1 sw1 sw2 gp12 vp2 fb1 on2 ga on1 fb2 a ctive- semi
act8325 rev 2, 25-may-11 active- semi innovative power tm - 4 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. pin descriptions pin name description 1 vp1 power input for reg1. bypass to gp12 with a high quality ceramic capacitor placed as close as possible to the ic. 2 sw1 switching node output for reg1. connect th is pin to the switching end of the inductor. 3 gp12 power ground for reg1, reg2. connect ga and gp12 together at single point as close to the ic as possible. 4 sw2 switching node output for reg2. connect th is pin to the switching end of the inductor. 5 vp2 power input for reg2. bypass to gp12 with a high quality ceramic capacitor placed as close as possible to the ic. 6 fb2 feedback node for reg2. for fixed output voltage options, connect this pin directly to the out- put. for the adjustable output voltag e options the voltage at this pin is regulated to 0.625v, con- nect this pin to the center of the output fe edback resistor divider for voltage setting. 7 ga analog ground. connect ga directly to a quiet ground node. connect ga and gp12 together at a single point as close to the ic as possible. 8 on1 enable control input for reg1. drive on1 to vp1 or to a logic high for normal operation, drive to ga or to a logic low to disable reg1. 9 on2 enable control input for reg2. drive on2 to vp1or to a logic high for normal operation, drive to ga or to a logic low to disable reg2. 10 fb1 feedback node for reg1. for fixed output voltage options, connect this pin directly to the out- put. for the adjustable output voltag e options the voltage at this pin is regulated to 0.625v, con- nect this pin to the center of the output fe edback resistor divider for voltage setting. ep ep exposed pad. must be soldered to ground on pcb.
act8325 rev 2, 25-may-11 active- semi innovative power tm - 5 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. c : do not exceed these limits to prevent damage to the device. exposure to absolute maximum rati ng conditions for long periods m ay affect device reliability. absolute maximum ratings c parameter value unit vp1, sw1, vp2, sw2 to gp12, fb1, fb 2, on1, on2 to ga -0.3 to + 6 v sw1 to vp1, sw2 to vp2 -6 to + 0.3 v gp12 to ga -0.3 to + 0.3 v junction to ambient thermal resistance ( ja ) 33 c/w operating temperature range -40 to 85 c junction temperature 125 c storage temperature -55 to 150 c lead temperature (soldering, 10 sec) 300 c
act8325 rev 2, 25-may-11 step-down dc/dc converter active- semi innovative power tm - 6 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. c : v nom1 refers to the nominal output voltage level for v out1 as defined by the ordering information section. electrical characteristics (reg1) (v vp1 = 3.6v, t a = 25c, unless otherwise specified.) parameter test conditions min typ max unit vp1 operating voltage range 3.1 5.5 v vp1 uvlo threshold input vo ltage rising 2.9 3 3.1 v vp1 uvlo hysteresis input voltage falling 80 mv standby supply current 130 200 a shutdown supply current on1 = ga, v vp1 = 4.2v 0.1 1 a adjustable output option regulation voltage 0.625 v output voltage regulation accuracy v nom1 < 1.3v, i out1 = 10ma -2.4% v nom1 +1.8% v v nom1 1.3v, i out1 = 10ma -1.2% v nom1 c +1.8% line regulation v vp1 = max(v nom1 + 1v, 3.2v) to 5.5v 0.15 %/v load regulation i out1 = 10ma to 350ma 0.0017 %/ma switch peak current limit act8325ndaaa 0.45 0.6 a act8325ndeh 0.65 0.85 oscillator frequency v out1 20% of v nom1 1.35 1.6 1.85 mhz v out1 = 0v 530 khz pmos on-resistance act8325ndaaa, i sw1 = -100ma 0.52 0.88 act8325ndeh, i sw1 = -100ma 0.4 0.68 nmos on-resistance i sw1 = 100ma 0.27 0.46 ? sw1 leakage current v vp1 = 5.5v, v sw1 = 5.5v or 0v 1 a power good threshold 94 %v nom1 minimum on-time 70 ns logic high input voltage on1 1.4 v logic low input voltage on1 0.4 v thermal shutdown temperature temperature rising 160 c thermal shutdown hysteresis temperature falling 20 c ?
act8325 rev 2, 25-may-11 step-down dc/dc converter active- semi innovative power tm - 7 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. parameter test conditions min typ max unit vp2 operating voltage range 3.1 5.5 v vp2 uvlo threshold input vo ltage rising 2.9 3 3.1 v vp2 uvlo hysteresis input voltage falling 80 mv standby supply current 130 200 a shutdown supply current on2 = ga, v vp2 = 4.2v 0.1 1 a adjustable output option regulation voltage 0.625 v output voltage regulation accuracy v nom2 < 1.3v, i out2 = 10ma -2.4% v nom2 c +1.8% v v nom2 1.3v, i out2 = 10ma -1.2% v nom2 +1.8% line regulation v vp2 = max(v nom2 + 1v, 3.2v) to 5.5v 0.15 %/v load regulation i out2 = 10ma to 550ma 0.0017 %/ma switch peak current limit act8325ndaaa 0.65 0.85 act8325ndeh 0.95 1.25 oscillator frequency v out2 20% of v nom2 1.35 1.6 1.85 mhz v out2 = 0v 530 khz pmos on-resistance i sw2 = -100ma 0.40 0.68 ? nmos on-resistance i sw2 = 100ma 0.27 0.46 ? sw2 leakage current v vp2 = 5.5v, v sw2 = 5.5v or 0v 1 a power good threshold 94 %v nom2 minimum on-time 70 ns logic high input voltage on2 1.4 v logic low input voltage on2 0.4 v thermal shutdown temperature temperature rising 160 c thermal shutdown hysteresis temperature falling 20 c a electrical characteristics (reg2) (v vp2 = 3.6v, t a = 25c, unless otherwise specified.) c : v nom2 refers to the nominal output voltage level for v out2 as defined by the ordering information section.
act8325 rev 2, 25-may-11 step-down dc/dc converter active- semi innovative power tm - 8 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. typical performanc e characteristics (act8325ndaaa, v vp1 = v vp2 = 3.6v, l = 3.3h, c vp1 = c vp2 = 2.2 f, c out1 = c out2 = 10 f, t a = 25c, unless otherwise specified.) reg1 efficiency vs. load current efficiency (%) 50 1000 output current (ma) act8325-001 95 80 70 60 1 10 100 v out1 = 1.2v v in = 4.2v 85 75 65 55 r dson (m ? ) vp2 voltage (v) 440 5.5 reg2 mosfet resistance act8325-006 360 280 200 120 40 5.0 4.5 4.0 3.5 3.0 2.5 reg1 mosfet resistance r dson (m ? ) vp1 voltage (v) 600 0 act8325-005 5.5 5.0 4.5 4.0 3.5 3.0 2.5 500 400 300 200 100 pmos nmos pmos nmos 90 v in = 3.6v reg2 efficiency vs. load current efficiency (%) 100 50 output current (ma) act8325-002 90 80 70 60 1 10 100 v out2 = 3.3v out1 regulation voltage out1 voltage (%) 0.67 -0.67 temperature (c) act8325-003 -20 -40 0 20 40 60 0.44 0.22 0.00 -0.22 -0.44 i out1 = 35ma 85 act8325-004 out2 regulation voltage out2 voltage (%) 0.55 -0.55 temperature (c) -20 -40 0 20 40 60 0.36 0.18 0.00 -0.18 -0.36 85 i out2 = 35ma -0.11 -0.33 -0.56 0.11 0.33 0.56 0.45 0.27 0.09 -0.09 -0.27 -0.45 0 1000 v in = 3.6v v in = 4.2v
act8325 rev 2, 25-may-11 step-down dc/dc converter active- semi innovative power tm - 9 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. functional description general description reg1 and reg2 are fixed-frequency, current- mode, synchronous pwm step-down converters that achieve peak efficiencies of up to 97%. reg1 is capable of supplying up to 550ma of output cur- rent, while reg2 supports up to 800ma. these regulators operate with a fixed frequency of 1.6mhz, minimizing noise in sensitive applications and allowing the use of small external components. reg1 and reg2 are available with a variety of standard and custom output voltages, as described in the ordering information section of this data- sheet. 100% duty cycle operation both reg1 and reg2 are capable of operating at up to 100% duty cycle. during 100% duty-cycle operation, the high-side power mosfet is held on continuously, providing a direct connection from the input to the output (thro ugh the inductor), ensuring the lowest possible dropout voltage in battery- powered applications. synchronous rectification reg1 and reg2 both featur e integrated n-channel synchronous rectifiers, maximizing efficiency and minimizing the total solution size and cost by elimi- nating the need for external rectifiers. enabling and disabling reg1 and reg2 each of the act8325's regulators features inde- pendent pin-controlled enable control. drive on1 to a logic-high to enable reg1, drive on1 to a logic- low to disable reg1. similarly, drive on2 to a logic-high to enable reg2, drive on2 to a logic-low to disable reg2. when disabled, each regulator's supply current drops to less than 1a. soft-start reg1 and reg2 each include matched soft-start circuitry. when enabled, the output voltages track the internal 80s soft-start ramp and both power up in a monotonic manner that is independent of load- ing on either output. this circuitry ensures that both outputs power up in a controlled manner, greatly simplifying power sequencing design considera- tions. compensation reg1 and reg2 utilize current-mode control and a proprietary internal compensation scheme to simul- taneously simplify external component selection and optimize transient performance over their full operating range. no compensation design is re- quired; simply follow a few simple guidelines de- scribed below when choosing external components. thermal shutdown the act8325 integrates thermal shutdown protec- tion circuitry to prevent damage resulting from ex- cessive thermal stress, as may be encountered un- der fault conditions. this ci rcuitry disables all regu- lators if the act8325 die temperature exceeds 160c, and prevents the r egulators from being en- abled until the ic temperature drops by 20c (typ). input capacitor selection the input capacitor reduces peak currents and noise induced upon the voltage source. a 2.2f ceramic capacitor for each of reg1 and reg2 is recommended for most applications. output capacitor selection for most applications, 10f ceramic output capaci- tors are recommended for both reg1 and reg2. although the these regulators were designed to take advantage of the benef its of ceramic capaci- tors, namely small size and very-low esr, low-esr tantalum capacitors can provide acceptable results as well. output voltage programming figure 4: output voltage programming figure 4 shows the feedbac k network necessary to set the output voltage when using the adjustable r fb1 r fb2 outx act8325 fbx c ff
act8325 rev 2, 25-may-11 step-down dc/dc converter active- semi innovative power tm - 10 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. (1) output voltage option. output voltage option. select components as follows: set r fb2 = 51k ? , then calculate r fb1 using the following equation: where v fbx is 0.625v. finally choose c ff using the following equation: where r fb1 = 47k ? , use 47pf. inductor selection reg1 and reg2 utilize current-mode control and a proprietary internal compensation scheme to simul- taneously simplify external component selection and optimize transient performance over their full operating range. these devices were optimized for operation with 3.3h induct ors, although inductors in the 2.2h to 4.7h range can be used. choose an inductor with a low dc-resistance, and avoid inductor saturation by choosing inductors with dc ratings that exceed the maximum output current of the application by at least 30%. pcb layout considerations high switching frequencies and large peak current make pc board layout an important part of step- down dc/dc converter design. a good design mini- mizes excessive emi on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. step- down dc/dcs exhibit disc ontinuous input current, so the input capacitors should be placed as close as possible to the ic, and avoiding the use of vias if possible. the inductor, input filter capacitor, and output filter capacitor should be connected as close together as possible, with short, direct, and wide traces. the ground nodes for each regulator?s power loop should be connected at a single point in a star-ground configurati on, and this point should be connected to the backside ground plane with multiple vias. for fixed output voltage options, con- nect the output node directly to the fbx pin. for adjustable output voltage options, connect the feed- back resistors and feed-forward capacitor to the fbx pin through the shortest possible route. in both cases, the feedback path should be routed to main- tain sufficient distance from switching nodes to pre- vent noise injection. ? ? ? ? ? ? ? ? ? = 1 v v r r fbx outx 2 fb 1 fb 1 fb 6 ff r 10 2 . 2 c ? = (2)
act8325 rev 2, 25-may-11 package information active- semi innovative power tm - 11 - www.active-semi.com copyright ? 2011 active-semi, inc. activepmu tm is a trademark of active-semi. package outline tdfn33-10 package outline and dimensions symbol dimension in millimeters dimension in inches min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.0000 0.002 a3 0.153 0.006 d 2.900 3.100 0.114 0.122 e 2.900 0.114 d2 2.350 0.093 e2 0.065 b 0.200 0.320 0.008 0.012 e 0.500 typ 0.020 typ l 0.300 0.500 0.012 0.020 1.650 3.100 0.122 0.253 0.010 2.450 1.750 0.069 0.096 active-semi, inc. reserves the right to modify the circuitry or specifications without notice. user s should evaluate each product to make sure that it is suitable for their applicat ions. active-semi products are not intended or authorized for use as critical components in life-support dev ices or systems. active-semi, inc. does not assume any liability arising out of the use of any product or circuit described in this datasheet, nor does it convey any patent license. active-semi and its logo are trademarks of active-semi, inc. for more information on this and other products, contact sales@active-semi.com or visit http://www.active-semi.com . ? is a registered trademark of active-semi.

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