cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 1/9 MTB032P06V8 cystek product specification p-channel enhancement mode power mosfet MTB032P06V8 bv dss -60v i d -25a r dson @v gs =10v, i d =-6a 29m (typ) r dson @v gs =-4.5v, i d =-4a 33m (typ) description the MTB032P06V8 is a p-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. features ? simple drive requirement ? low on-resistance ? fast switching speed ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTB032P06V8-0-t1-g dfn3 3 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel dfn3 3 MTB032P06V8 pin 1 g gate s source d drain
cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 2/9 MTB032P06V8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -60 gate-source voltage v gs 25 v continuous drain current @ t c =25 c, v gs =-10v -25 continuous drain current @ t c =100c, v gs =-10v -16 continuous drain current @ t a =25 c, v gs =-10v -6.6 continuous drain current @ t a =70 c, v gs =-10v i d -5.3 pulsed drain current i dm -40 *1 avalanche current i as -10 a avalanche energy @ l=0.1mh, i d =-10a, r g =25 e as 5 repetitive avalanche energy @ l=0.05mh e ar 2.5 *2 mj t c =25 36 t c =100 14 t a =25 2.5 *3 total power dissipation t a =70 p d 1.6 *3 w operating junction and storage temp erature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 3.5 c/w thermal resistance, junction-to-ambient, max r th,j-a 50 *3 c/w note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in 2 copper pad of fr-4 board, t 10s ; 125 c/w when mounted on minimum copper pad. electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -60 - - v gs =0, i d =-250 a v gs(th) -0.8 -1.1 -2.5 v v ds =v gs , i d =-250 a i gss - - 100 na v gs =25v, v ds =0 i dss - - -1 v ds =-48v, v gs =0 i dss - - -25 a v ds =-48v, v gs =0, tj=125 c - 29 38 v gs =-10v, i d =-6a r ds(on) *1 - 33 45 m v gs =-4.5v i d =-4a g fs *1 - 18 - s v ds =-5v, i d =-6a dynamic ciss - 2827 - coss - 109 - crss - 70 - pf v ds =-30v, v gs =0, f=1mhz
cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 3/9 MTB032P06V8 cystek product specification electrical characteristics(cont.) (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions t d(on) *1, 2 - 18 - tr *1, 2 - 12 - t d(off) *1, 2 - 99 - t f *1, 2 - 35 - ns v ds =-30v, i d =-6a, v gs =-10v, r g =6 qg *1, 2 - 32 - qgs *1, 2 - 8 - qgd *1, 2 - 10 - nc v ds =-48v, i d =-6a, v gs =-10v source-drain diode v sd *1 - -0.74 -1 v i s =-3a, v gs =0v trr - 75 - ns qrr - 98 - nc i f =6a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 4/9 MTB032P06V8 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 35 40 024681 0 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =3v 10v, 9v, 8v, 7v, 6v, 5v, 4v -v gs =2v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =-10v v gs =-2.5v v gs =-4.5v v gs =-2v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 024681 0 drain-source on-state resistance vs junction tempearture 0 10 20 30 40 50 60 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-10v, i d =-6a r ds( on) @tj=25c : 25 m typ. -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-6a
cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 5/9 MTB032P06V8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss normalized threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) ,normalized threshold voltage i d =-250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 -i d , drain current(a) g fs , forward transfer admittance-(s) v ds =-5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 5 10 15 20 25 30 35 40 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-48v i d =-6a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 1ms t a =25c, tj=150c v gs =-10v, r ja =50c/w single pulse r ds( on) limite 1 s 100 s 100m maximum drain current vs junctiontemperature 0 1 2 3 4 5 6 7 8 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-10v, ja =50c/w
cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 6/9 MTB032P06V8 cystek product specification typical characteristics(cont.) single pulse power rating, junction to ambient (note on page 2) 0 50 100 150 200 250 300 350 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j(max) =150c t a =25c r ja =50c/w typical transfer characteristics 0 5 10 15 20 25 30 35 40 0123456 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-10v transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) z jc (t), thermal response single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t1/t2 3.t jm -t a =p dm *r ja (t) 4.r ja =50c/w
cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 7/9 MTB032P06V8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 8/9 MTB032P06V8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
spec. no. : c924v8 issued date : 2013.06.06 revised date : page no. : 9/9 cystech electronics corp. MTB032P06V8 cystek product specification dfn3 3 dimension marking: date code s s s g d d d d b032 p06 8-lead dfn3 3 plastic package cystek package code: v8 *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.0276 0.0354 0.70 0.90 e 0.1181 0.1260 3.00 3.20 a1 0.0000 0.0197 0.00 0.50 e1 0.0531 0.0610 1.35 1.55 b 0.0094 0.0138 0.24 0.35 e 0.0256 bsc 0.65 bsc c 0.0039 0.0079 0.10 0.20 h 0.1260 0.1339 3.20 3.40 d 0.1280 0.1339 3.25 3.40 l 0.0118 0.0197 0.30 0.50 d1 0.1201 0.1280 3.05 3.25 l1 0.0039 0.0079 0.10 0.20 d2 0.0945 0.1024 2.40 2.60 l2 0.0445 ref 1.13 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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