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as3687/87xm datasheet www.austriamicrosystems.com/as3687 (mlg/ptr) 1v3-4 1 - 54 1 general description the as3687/87xm is a highly-integrated cmos lighting management unit for mobile telephones, and other 1-cell li+ or 3-cell nimh powered devices. the as3687/87xm incorporates one step up dc/dc converter for white backlight leds, one low noise charge pump for indicator- or rgb- leds, led test circuit (production test of the soldered leds at the customer si te), one analog-to-digital converter, seven current sinks, a two wire serial interface, and control logic all onto a single device. output voltages and outp ut currents are fully programmable. the as3687xm has an audio input to control one or two rgb leds. the as3687/87xm is a successor to the austrimicrosystems as3689 and therefore software compatible to the as3689 (software written for the as3689 can be easily reused for the as3687/87xm). 2 key features ? high-efficiency step up dc/dc converter ? up to 25v/50ma for white leds ? programmable output voltage with external resistors and serial interface ? overvoltage protection ? high-efficiency low noise charge pump ? 1:1, 1:1.5, and 1:2 mode ? automatic up switching (can be disabled and 1:2 mode can be blocked) ? output current up to 150ma ? efficiency up to 95% ? only 4 external ca pacitors required: 2 x 500nf flying capacitors, 2 x 1f input/output capacitors ? supports lcd white backlight or rgb leds ? seven current sinks ? all seven current sinks fully programmable (8-bit) from: 0.15ma to 38.5ma (curr1, curr2, curr6, curr30, curr31, curr32, curr33) ? three current sinks are high voltage capable (curr1, curr2, curr6) ? selectively enable/disable current sinks ? internal pwm generation ? 8 bit resolution ? autonomous logarithmic up/down dimming ? led pattern generator ? autonomous driving for fun rgb leds ? support indicator leds ? 10-bit successive approximation adc ? 27s conversion time ? selectable inputs: all current sources, vbat, cp_out, dcdc_fb ? internal temp. measurement ? support for automatic led testing (open and shorted leds can be identified in-circuit) ? standby ldo always on if serial interface is on ? regulated 2.5v max. output 10ma ? 3a quiescent current ? automatic wakeup if serial interface is enabled (allows ultra low power for device shutdown) ? audio can be used to drive rgb led (as3687xm only) ? rgb color and brightness is dependent on audio input amplitude ? can drive one or two rgb leds ? wide battery supply range: 3.0 to 5.5v ? two wire serial interface control ? overcurrent and thermal protection ? small pack age wl-csp 4x5 balls 0.5mm pitch 3 application lighting-management for mobile telephones and other 1-cell li+ or 3-cell nimh powered devices. as3687/87xm flexible lighting management (charge pump, dcdc step up, seven current sinks, adc, led test, audio light) datasheet ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 2 - 54 4 block diagram figure 1 ? application diagram of the as3687/as3687xm step up dc/dc converter c9 4.7f c7 1.5nf q1 dcdc_sns dcdc_gate dcdc_fb r2 1m ? r3 100k ? c8 15nf c6 1f r1 0.1 ? battery charge pump 1:1, 1:1.5, 1:2 150ma battery vbat c2_p c2 1f c3 500nf c2_n c1_p c4 500nf c1_n cpout d2 d3 d4 c5 1.0f curr30 curr31 curr32 current sinks each 0.15-38.25ma d6 d7 d8 d10 d9 curr1 curr2 hv current sinks each 0.15-38.25ma serial interface r4 1-10k ? vdd_i/f clk clk data references and temperature supervision c1 1f v2_5 d1 l1 10h data as3687 lighting management unit 8bit pwm generator automatic dimming and led pattern generator curr33 d5 d11 vss led test vbat zero power device wakeup adc vtemp currx dcdc d13 d12 d14 curr6 r5 as3687/ as3687xm lighting management uni t ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 3 - 54 figure 2 ? application diagram of the as3687xm step up dc/dc converter dcdc_sns dcdc_gate dcdc_fb charge pump 1:1, 1:1.5, 1:2 150ma battery vbat c2_p c2 1f c3 500nf c2_n c1_p c4 500nf c1_n cpout c5 1.0f curr30 curr31 curr32 current sinks each 0.15-38.25ma curr1 curr2 hv current sinks each 0.15-38.25ma serial interface r4 1-10k ? vdd_i/f clk clk data references and temperature supervision c1 1f v2_5 data as3687xm lighting management unit 8bit pwm generator automatic dimming and led pattern generator vss led test vbat zero power device wakeup adc vtemp currx dcdc curr6 audio processing curr33/audio_in audio in d rgb1 d2 d3 d4 d rgb2 alternative: 2 nd audio or backlight alternative: use dcdc step up for curr1,2,6 c9 4.7f c7 1.5nf q1 dcdc_fb r2 1m ? c8 15nf c6 1f r1 0.1 ? d1 l1 10h c10 100nf ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 4 - 54 table of contents 1 general de scripti on ............................................................................................................ ........................... 1 2 key feat ures................................................................................................................... ............................... 1 3 applicat ion ..................................................................................................................................................... 1 4 block di agram ................................................................................................................................................ 2 5 characteri stics ................................................................................................................ ............................... 5 5.1 absolute maxi mum rati ngs .................................................................................................................... 5 5.2 operating c onditio ns ........................................................................................................... ................... 5 6 typical operating characteri stics .............................................................................................. .................... 6 7 detailed functiona l descrip tion ..................................................................................................................... 8 7.1 step up dc/dc conver ter...................................................................................................................... 8 7.1.1 feedback se lection ............................................................................................................. ............ 9 7.1.2 overvoltage protection in current feedb ack m ode ......................................................................... 9 7.1.3 voltage f eedback............................................................................................................... ........... 10 7.1.4 pcb layout hints ............................................................................................................... ........... 11 7.1.5 step up regi sters .............................................................................................................. ............ 11 7.2 charge pump.................................................................................................................... .................... 13 7.2.1 charge pump m ode switch ing ..................................................................................................... .15 7.2.2 soft start..................................................................................................................... ................... 16 7.2.3 charge pump regist ers .......................................................................................................... ...... 16 7.3 current sinks .................................................................................................................. ...................... 18 7.3.1 high voltage current si nks curr1, cu rr2, curr6 .................................................................. 19 7.3.2 current sinks curr30, curr31, curr32, curr33 ................................................................. 21 7.3.3 led pattern generat or .......................................................................................................... ........ 24 7.3.4 pwm gener ator.................................................................................................................. ........... 28 7.4 led te st....................................................................................................................... ........................ 33 7.4.1 function testing for single leds connected to the charge pump ................................................ 33 7.4.2 function testing for leds connected to the step up dcdc conver ter ........................................ 34 7.5 analog-to-digital converter .................................................................................................... ............. 34 7.5.1 adc regi sters .................................................................................................................. ............. 35 7.6 audio controlled rgb leds (onl y as3687xm)..................................................................................... 3 7 7.6.1 agc............................................................................................................................ ................... 39 7.6.2 audio control regist ers........................................................................................................ ......... 41 7.7 power-on reset ................................................................................................................. .................. 42 7.7.1 reset contro l regi ster......................................................................................................... ............ 43 7.8 temperature supervi sion........................................................................................................ .............. 43 7.8.1 temperature supervi sion registers .............................................................................................. 44 7.9 serial in terface............................................................................................................... ....................... 44 7.9.1 serial interf ace feat ures ...................................................................................................... ......... 44 7.9.2 device address select ion....................................................................................................... ....... 45 7.10 operating modes ................................................................................................................ .................. 47 8 register map................................................................................................................... ............................. 48 9 external co mponents ............................................................................................................ ...................... 50 10 pinout and packagi ng ........................................................................................................... ....................... 51 10.1 pin descr iption................................................................................................................ ...................... 51 10.2 package drawings and ma rkings .................................................................................................. ....... 52 11 ordering in formati on ........................................................................................................... ......................... 53 ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 5 - 54 5 characteristics 5.1 absolute maximum ratings stresses beyond those listed in table 1 may cause perma nent damage to the device. these are stress ratings only, and functional operation of the device at these or an y other conditions beyond t hose indicated in section 5 electrical characteristics is not implied. exposure to absolute maximum ra ting conditions for extended periods may affect device reliability. table 1 ? absolute maximum ratings symbol parameter min max unit note v in_hv 15v pins -0.3 17 v applicable for high-voltage current sink pins curr 1 ,curr 2 , curr 6 v in_mv 5v pins -0.3 7.0 v applicable for 5v pins v bat , curr 30-33 , curr 33 /audio_in, c 1_n , c 2_n , c 1_p , c 2_p , cpout, dcdc_fb, dcdc_gate, clk, data; v in_lv 3.3v pins -0.3 5.0 v applicable for 3.3v pins v 2_5 ; dcdc_sns i in input pin current -25 +25 ma at 25oc, norm: jedec 17 t strg storage temperature range -55 125 c humidity 5 85 % non-condensing -2000 2000 v all pins except curr33/audio_in v esd electrostatic discharge norm: mil 883 e method 3015 -1000 1000 v pin curr33/audio_in v cdm norm: jedec jesd 22-a115-a level a -500 500 v p t total power dissipation 0.75 w t a = 70 oc, t junc_max = 125oc t body peak body temperature 260 c t = 20 to 40s, in accordance with ipc/jedec j-std 020. 5.2 operating conditions table 2 ? operating conditions symbol parameter min typ max unit note v hv high voltage 0.0 15.0 v applicable for high-voltage current sink pins curr 1 , curr 2 and curr 6 . v bat battery voltage 3.0 3.6 5.5 v v bat v ddi/f interface supply voltage 1.5 1.8 / 2.8 5.5 v for serial interface pins. v 2_5 voltage on pin v 2_5 2.4 2.5 2.6 v internally generated t amb operating temperature range -30 25 85 c i active battery current 70 a normal operating current ? see section ?operating modes?; interface active (excluding current of the enabled blocks) i standby standby mode current 5.8 13 a current consumption in standby mode. only 2.5v regulator on, interface active i shutdown shutdown mode current 0.1 3 a interface inactive (clk and data set to 0v) ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 6 - 54 6 typical operating characteristics note: typical conditions are measured at 25c and 3.6v (unless otherwise noted). figure 3 ? dcdc step up converter: efficiency of +15v step up to 15v vs. load current at vbat = 3.8v 65 70 75 80 85 90 0 0.01 0.02 0.03 0.04 0.05 0.06 load current [a] efficiency of dcdc [%] vout=14.2v vout=17.2v vout=22v vout=14.2v fclk=550khz figure 4 ? charge pump: efficiency vs. vbat 0 10 20 30 40 50 60 70 80 90 100 2.8 3 3.2 3.4 3.6 3.8 4 4.2 v bat [v] efficiency of cp [%] i load =150ma i load =80ma i load =40ma figure 5 ? charge pump: battery current vs. vbat 0 50 100 150 200 250 2.8 3 3.2 3.4 3.6 3.8 4 4.2 vbat[v] ibat[ma] i load =150ma i load =80ma i load =40ma figure 6 ? current sink curr1 vs. v(currx) 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 0.0 0.5 1.0 1.5 2.0 v curr1 [v] i curr1 [ma] i curr1 =2.4ma i curr1 =19.2mam i curr1 =38.25ma figure 7 ? current sink curr1 protection current 0,0 0,5 1,0 1,5 2,0 2,5 3,0 0,0 5,0 10,0 15,0 20,0 v(curr1) [v] current [ma] curr_prot1_on=0 curr_prot1_on=1 4.5ua protection current vs. voltage (curr sinks off, curr_protx_on=0/1) figure 8 ? current sink curr3x vs. vbat 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 0.0 0.5 1.0 1.5 2.0 v curr30 [v] i curr30 [ma] i curr30 =2.4ma i curr30 =19.2mam i curr30 =38.25ma ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 7 - 54 figure 9 ? charge pump input and out put ripple 1:1.5 mode, 100ma load 250ns/div measured with battery (3.8v) on demoboard figure 10 ? charge pump input and output ripple 1:2 mode, 100ma load 250ns/div measured with battery (3.0v) on demoboard vbat, 20mv/div, ac-coupled v(cpout), 100mv/div, ac-coupled vbat, 20mv/div, ac-coupled v(cpout), 20mv/div, ac-coupled ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 8 - 54 7 detailed functional description 7.1 step up dc/dc converter the step up dc/dc converter is a high- efficiency current mode pwm regulator , providing output voltage up to e.g. 25v/35ma or e.g. 16v/55ma. a constant switching-frequency results in a low noise on th e supply and output voltages. figure 11 ? step up dcdc converter block diagramm option: current feedback with overvoltage protection curr1 curr2 hv current sinks each 0.156-40ma curr6 step up dc/dc converter c9 4.7f c7 1.5nf q1 dcdc_sns dcdc_gate dcdc_fb r2 1m r3 100k c8 15nf c6 1f r1 battery d1 l1 10h d6 d7 d8 d10 d9 d11 d13 d12 d14 table 3 ? step up dc/dc converter parameters symbol parameter min typ max unit note ivdd quiescent current 140 a pulse skipping mode. vfb1 feedback voltage for external resistor divider 1.20 1.25 1.30 v for constant voltage control. step_up_res = 1 vfb2 feedback voltage for current sink regulation 0.4 0.5 0.6 v on curr1, curr2 or curr6 in regulation. step_up_res = 0 additional tuning current at pin dcdc_fb and overvoltage protection 0 31 a idcdc_fb accuracy of feedback current at full scale -6 6 % adjustable by software using register dcdc control1 1 a step size (0-15 a) v protect = 1.25v + i dcdc_fb * r 2 ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 9 - 54 table 3 ? step up dc/dc converter parameters symbol parameter min typ max unit note vrsense_max 46 66 85 e.g., 0.66a for 0.1 sense resistor vrsense_max_st art 25 33 43 for fixed startup time of 500us vrsense_max_lc current limit voltage at r sense (r1) 30 43 57 mv if stepup_lowcur = 1 rsw switch resistance 1 on-resistance of external switching transistor. 0 55 at 16v output voltage. iload load current 0 35 ma at 25v output voltage. f in switching frequency 0.9 1 1.1 mhz internally trimmed. cout output capacitor 0.7 4.7 f ceramic, 20%. use nominal 4.7 f capacitors to obtain at least 0.7 f under all conditions (voltage dependance of capacitors) l inductor 7 10 13 h use inductors with small c parasitic (<100pf) to get high efficiency. t min_on minimum on time 90 140 190 ns mdc maximum duty cycle 88 91 % voltage ripple >20khz 160 mv vripple voltage ripple <20khz 40 mv cout=4.7uf,iout=0..45ma, vbat=3.0...4.2v efficiency efficiency 85 % iout=20ma,vout=17v,vbat=3.8v to ensure soft startup of the dcdc conv erter, the overcurrent limits are reduced for a fixed time after enabling the dcdc converter. the total startup time for an output voltage of e.g. 25v is less than 2ms. 7.1.1 feedback selection register 12 (dcdc control) selects the type of feedback for the step up dc/dc converter. the feedback for the dc/dc converter can be selected eith er by current sinks (curr1, curr2, curr6) or by a voltage feedback at pin dcdc_fb. if the register bit step_up_fb_auto is set, the f eedback path is automatically selected between curr1, curr2 and curr6 (the lowe st voltage of these current sinks is used). setting step_up_fb enables feedback on the pins curr 1, curr2 or curr6. the step up dc/dc converter is regulated such that the required current at the feedback path c an be supported. (bit step_up_res should be set to 0 in this configuration) note : always choose the path with the highest voltage dr op as feedback to guarantee adequate supply for the other (unregulated) paths or enable the register bit step_up_fb_auto. 7.1.2 overvoltage protection in current feedback mode the overvoltage protection in current feedback mode (step_up_fb = 01, 10 or 11 or step_up_fb_auto = 1) works as follows: only resistor r3 and c10/c11 is soldered and r4 is omitted. an internal current source (sink) is used to generate a voltage drop across the resistor r3 . if then the voltage on dcdc_fb is above 1.25v, the dcdc is momentarily disabled to avoid too high voltages on the output of the dcdc converter. the protection voltage can be calculated according to the following formula: v protect = 1.25v + i dcdc_fb * r 2 ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 10 - 54 notes: 1. the voltage on the pin dcdc_fb is limited by an internal protection diode to vbat + one diode forward voltage (typ. 0.6v). 2. if the overvoltage protection is not used in current feedback mode, connect dcdc_fb to ground. figure 12 ? step up dc/dc converter detail diagram; opti on: regulated output current, feedback is automatically selected between curr1, curr2, curr6 (step_up_fb_auto=1); overvoltage protection is enabled (step_up_prot=1); 1mhz clock frequency (step_up_freq=0) curr1 curr2 hv current sinks each 0.156-40ma curr6 c9 4.7f c7 1.5nf q1 dcdc_sns dcdc_gate dcdc_fb r2 1m r3 100k c8 15nf c6 1f r1 battery d1 l1 10h d6 d7 d8 d10 d9 d11 d13 d12 d14 1.25v 0.5v step_up_vtuning 1.25v step_up_prot step_up_fb ramp pwm logic gate driver vrsense_max step_up_freq 1mhz 500khz clk ov_curr ov_voltage automatic feedback select (curr1,2,6) step_up_fb_auto currx on and currx_on_cp=0 1.35v 0.8v overshoot comp error ota overshoot pulse_skip v 7.1.3 voltage feedback setting bit step_up_fb = 00 enables voltage feedback at pin dcdc_fb.. the output voltage is regulated to a cons tant value, given by (bit step_up_res should be set to 1 in this configuration) u stepup_out = (r2+r3)/r3 x 1.25 + i dcdc_fb x r2 if r3 is not used, the output voltage is by (bit step_up_res should be set to 0 in this configuration): u stepup_out = 1.25 + i dcdc_fb x r2 where: u stepup_out = step up dc/dc converter output voltage. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 11 - 54 r2 = feedback resistor r2. r3 = feedback resistor r3. i dcdc_fb = tuning current at pin 29 (dcdc_fb); 0 to 31a. table 4 ? voltage feedback example values i vtuning u stepup_out u stepup_out a r2 = 1m , r3 not used r2 = 500k , r3 = 50k 0 - 13.75 1 - 14.25 2 - 14.75 3 - 15.25 4 - 15.75 5 6.25 16.25 6 7.25 16.75 7 8.25 17.25 8 9.25 17.75 9 10.25 18.25 10 11.25 18.75 11 12.25 19.25 12 13.25 19.75 13 14.25 20.25 14 15.25 20.75 15 16.25 21.25 ? ? ? 30 31.25 28.75 31 32.25 29.25 caution: the voltage on curr1, curr2 and curr6 must not exceed 15v ? see also section ?high voltage current sinks?. 7.1.4 pcb layout hints to ensure good emc performance of t he dcdc converter, keep its external power components c2, r2, l1, q1, d1 and c9 close together. connect the ground of c2, q1 and c9 locally together and connect this path with a single via to the main ground plane. this ensures that local high-frequency currents will not flow to the battery. 7.1.5 step up registers reg. control addr: 00 this register enables/disables the charge pump and the step up dc/dc converter bit bit name default access description 3 step_up_on 0 r/w enable the step up converter 0b = disable the step up dc/dc converter. 1b = enable the step up dc/dc converter. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 12 - 54 dcdc control 1 addr: 21h this register controls the step up dc/dc converter. bit bit name default access description 0 step_up_frequ 0 r/w defines the clock frequency of the step up dc/dc converter. 0 = 1 mhz 1 = 500 khz 2:1 step_up_fb 00 r/w controls the feedback sour ce if step_up_fb_auto = 0 00 = dcdc_fb enabled (external resistor divider). set step_up_fb=00 (dcdc_fb), if external pwm is enabled for curr1, curr2 or curr6 01 = curr1 feedback enabled (feedback via white leds. 10 = curr2 feedback enabled (feedback via white leds. 11 = curr6 feedback enabled (feedback via white leds. 7:3 step_up_vtuning 00000 r/w defines the tuning current at pin dcdc_fb. 00000 = 0 a 00001 = 1 a 00010 = 2 a ? 10000 = 15 a ? 11111 = 31 a dcdc control 2 addr: 22h this register controls the step up dc/ dc converter and low-voltage current sinks curr 3x . bit bit name default access description 0 step_up_res 0 r/w gain selection for step up dc/dc converter. 0 = select 0 if step up dc/dc converter is used with current feedback (curr1, curr2 , curr6) or if dcdc_fb is used with current feedback only ? only r1, c1 connected 1 = select 1 if dcdc_fb is used with external resistor divider (2 resistors). 1 skip_fast 0 r/w step up dc/dc converter output voltage at low loads, when pulse skipping is active. 0 = accurate output voltage, more ripple. 1 = elevated output voltage, less ripple. 2 step_up_prot 1 r/w step up dc/dc converter protection. 0 = no overvoltage protection. 1 = overvoltage protection on pin dcdc_fb enabled voltage limitation =1.25v on dcdc_fb 3 stepup_lowcur 1 r/w step up dc/dc converter coil current limit. 0 = normal current limit 1 = current limit reduced by approx. 33% 4 curr1_prot_on 0 r/w 0 = no overvoltage protection 1 = pull down current switched on, if voltage exceeds 13.75v, and step_up_on=1 5 curr2_prot_on 0 r/w 0 = no overvoltage protection 1 = pull down current switched on, if voltage exceeds 13.75v, and step_up_on=1 6 curr6_prot_on 0 r/w 0 = no overvoltage protection 1 = pull down current switched on, if voltage exceeds 13.75v, and step_up_on=1 7 step_up_fb_auto 0 r/w 0 = step_up_fb select the feed back of the dcdc converter 1 = the feedback is automatically chosen within the current sinks curr1, curr2 and curr6 (never dcdc_fb). ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 13 - 54 dcdc control 2 addr: 22h this register controls the step up dc/ dc converter and low-voltage current sinks curr 3x . bit bit name default access description only those are used for this selection, which are enabled (currx_mode must not be 00) and not connected to the charge pump (currx_on_cp must be 0). don?t use automatic feedback selection together with external pwm for the current sources curr1, curr2 or curr6. 7.2 charge pump the charge pump uses two external flying capacitors c6, c7 to generate output voltages higher than the battery voltage. there are three different operat ing modes of the charge pump itself: ? 1:1 bypass mode ? battery input and output are connected by a low-impedance switch ? battery current = output current. ? 1:1.5 mode ? the output voltage is up to 1.5 times the battery vo ltage (without load), but is limited to vcpoutmax all the time ? battery current = 1.5 times output current. ? 1:2 mode ? the output voltage is up to 2 times the battery volt age (without load), but is limited to vcpoutmax all the time ? battery current = 2 times output current as the battery voltage decreases, the charge pump must be switched from 1:1 mode to 1:1.5 mode and eventually in 1:2 mode in order to provide enough supply for the current sinks. depending on the actual current the mode with best overall efficiency can be automatically or manually selected: examples: ? battery voltage = 3.7v, led dropout voltage = 3.5v. the 1:1 mode will be selected and there is 200mv drop on the current sink and on the charge pump switch. efficiency 95%. ? battery voltage = 3.5v, led dropout voltage = 3.5v. t he 1:1.5 mode will be selected and there is 1.5v drop on the current sink and 250mv on the charge pump. efficiency 66%. ? battery voltage = 3.8v, led dropout voltage = 4.5v (c amera flash). the 1:2 mode c an be selected and there is 600mv drop on the current sink and 2.5v on the charge pump. efficiency 60%. the efficiency is dependent on the led forward voltage given by: eff=(v_led*iout)/(ui n *i in ) the charge pump mode switching can be done manually or automatically with the following possible software settings: ? automatic up all modes allowed (1:1, 1:1.5, 1:2) ? start with 1:1 mode ? switch up automatically 1:1 to 1:1.5 to 1:2 ? automatic up, but only 1:1 and 1:1.5 allowed ? start with 1:1 mode ? switch up automatically only from 1:1 to 1:1.5 mode; 1:2 mode is not used ? manual ? set modes 1:1, 1:1.5, 1:2 by software ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 14 - 54 figure 13 ? charge pump pin connections charge pump 1:1, 1:1.5, 1:2 150ma battery vbat c2_p c3 500nf c2_n c1_p c4 500nf c1_n cpout c2 1f c5 1.0f the charge pump requires the external components listed in the following table: table 5 ? charge pump external components symbol parameter min typ max unit note c 2 external decoupling capacitor 1.0 f ceramic low-esr capacitor between pins vbat and vss. c 3 , c 4 external flying capacitor (2x) 500 nf ceramic low-esr capacitor between pins c1_p and c1_n, between pins c2_p and c2_n and between vbat and vss. c 5 external storage capacitor 1.0 f ceramic low-esr capacitor between pins cp_out and vss, pins cp_out and vss. use nominal 1 f capacitors (size 0603) note: 1.) the connections of the external capacitors c2, c3, c4 and c5 should be kept as short as possible. 2.) the maximum voltage on the flying capacitors c3 and c4 is vbat table 6 ? charge pump characteristics symbol parameter min typ max unit note icpout output current continuous 0.0 150 ma depending on pcb layout vcpoutmax output voltage 5.5 v internally limited, including output ripple efficiency 60 90 % including current sink loss; icpout < 100ma. i cp1_1.5 3.4 1:1.5 mode i cp1_2 power consumption without load fclk = 1 mhz 3.8 ma 1:2 mode r cp1_1 0.57 ? 1:1 mode; v bat >= 3.5v r cp1_1.5 effective charge pump output resistance 2.65 ? 1:1.5 mode; v bat >= 3.3v ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 15 - 54 table 6 ? charge pump characteristics symbol parameter min typ max unit note r cp1_2 (open loop, fclk = 1mhz) 3.25 ? 1:1.2 mode; v bat >= 3.1v fclk accuracy accuracy of clock frequency -10 10 % currhv_switch curr1, 2, 6 minumum voltage 0.45 v vcurr3x_switch curr30-33 minumum voltage 0.2 v if the voltage drops below this threshold, the charge pump will use the next available mode (1:1 -> 1:1.5 or 1:1.5 -> 1:2) 240 sec cp_start_debounce=0 t deb cp automatic up- switching debounce time 2000 sec after switching on cp (cp_on set to 1), if cp_start_debounce=1 7.2.1 charge pump mode switching if automatic mode switching is enabled (cp_mode_switching = 00 or cp_mode_switching = 01) the charge pump monitors the current sinks, which are connected via a led to the output cp_out. to identify these current sources (sinks), the registers cp_mode_switch1 an d cp_mode_switch2 (register bits curr30_on_cp ? curr33_on_cp, curr1_on_cp, curr2_on_cp, curr6_on_cp) should be setup before starting the charge pump (cp_on = 1). if any of the volta ge on these current sources drops below the threshold (currlv_switch, currhv_switch, curr3x_switch), the next high er mode is selected after the debounce time. to avoid switching into 1:2 mode (battery current = 2 times output current), set cp_mode_switching = 10. if the currx_on_cp=0 and the according current sink is connected to the chargepump, the current sink will be functional, but there is no up switching of the chargepump, if the voltage compliance is too low for the current sink to supply the specified current. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 16 - 54 figure 14 ? automatic mode switching charge pump 1:1, 1:1.5, 1:2 cpout c5 1.0f curr30 curr31 curr32 curr33 curr1 curr2 200mv (curr3x_switch) 450mv (currhv_switch) curr30_on_cp curr31_on_cp curr32_on_cp curr33_on_cp curr1_on_cp curr2_on_cp debounce mode switching 1:1 -> 1:1.5 1:1.5 -> 1:2 cp_mode<1:0> curr6 curr6_on_cp battery vbat c2_p c3 500nf c2_n c1_p c4 500nf c1_n c2 1f 7.2.2 soft start an implemented soft start mechanism reduces the inrush current. battery current is smoothed when switching the charge pump on and also at each switching condition. this precaution reduces electromagnetic radiation significantly. 7.2.3 charge pump registers reg. control addr: 00h this register enables/disables the charge pump and the step up dc/dc converter. bit bit name default access description 2 cp_on 0 r/w 0 = set charge pump into 1:1 mode (off state) unless cp_auto_on is set 1 = enable manual or autom atic mode switching ? see register cp control for actual settings ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 17 - 54 addr: 23h cp control this register controls the charge pump. bit bit name default access description 0 cp_clk 0 r/w clock frequency selection. 0 = 1 mhz 1 = 500 khz 2:1 cp_mode 00b r/w charge pump mode (in manual mode sets this mode, in automatic mode reports the actual mode used) 00 = 1:1 mode 01 = 1:1.5 mode 10 = 1:2 mode 11 = na note: direct switching from 1:1. 5 mode into 1:2 in manual mode and vice versa is not allowed. always switch over 1:1 mode. 4:3 cp_mode_switching 00b r/w set the mode switching algorithm: 00 = automatic mode switching; 1:1, 1:1.5 and 1:2 allowed 1 01 = automatic mode switching; only 1:1 and 1:1.5 allowed 1 10 = manual mode switching; r egister cp_mode defines the actual charge pump mode used 11 = reserved 5 cp_start_debounce 0 r/w 0 = mode switching debounce timer is always 240us 1 = upon startup (cp_on set to 1) the mode switching debounce time is first started with 2ms then reduced to 240us 6 cp_auto_on 0 r/w 0 = charge pump is switched on/off with cp_on 1 = charge pump is automatical ly switched on if a current sink, which is connected to the charge pump (defined by registers cp mode switch 1 & 2) is switched on note : 1. don?t use automatic mode switch ing together with external pwm for the current sources connceted to the charge pump with less than 500us high time. cp mode switch 1 addr: 24h setup which current sinks are connected (via l eds) to the charge pump; if set to ?1? the correspond current source (sink) is used fo r automatic mode sele ction of the charge pump bit bit name default access description 0 curr30_on_cp 0 r/w 0 = current sink curr30 is not connected to charge pump 1 = current sink curr30 is connected to charge pump 1 curr31_on_cp 0 r/w 0 = current sink curr31 is not connected to charge pump 1 = current sink curr31 is connected to charge pump 2 curr32_on_cp 0 r/w 0 = current sink curr32 is not connected to charge pump 1 = current sink curr32 is connected to charge pump 3 curr33_on_cp 0 r/w 0 = current sink curr33 is not connected to charge pump 1 = current sink curr33 is connected to charge pump ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 18 - 54 cp mode switch 2 addr: 25h setup which current sinks are connected (via l eds) to the charge pump; if set to ?1? the correspond current source (sink) is used fo r automatic mode sele ction of the charge pump bit bit name default access description 0 curr1_on_cp 0 r/w 0 = current sink curr1 is not connected to charge pump 1 = current sink curr1 is connected to charge pump 1 curr2_on_cp 0 r/w 0 = current sink curr2 is not connected to charge pump 1 = current sink curr2 is connected to charge pump 7 curr6_on_cp 0 r/w 0 = current sink curr6 is not connected to charge pump 1 = current sink curr6 is connected to charge pump curr low voltage status 1 addr: 2ah indicates the low voltage status of the curr ent sinks. if the currx_low_v bit is set, the voltage on the current sink is too low, to drive the selected output current bit bit name default access description 0 curr30_low_v 1 r 0 = voltage of current sink curr30 >curr3x_switch 1 = voltage of current sink curr30 curr3x_switch 1 = voltage of current sink curr31 curr3x_switch 1 = voltage of current sink curr32 curr3x_switch 1 = voltage of current sink curr33 currlv_switch 1 = voltage of current sink curr6 currhv_switch 1 = voltage of current sink curr1 currhv_switch 1 = voltage of current sink curr2 as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 19 - 54 7.3.1 high voltage current sinks curr1, curr2, curr6 the high voltage current sinks have a resolution of 8 bits. additionally an internal protection circuit monitors with a voltage divider (max 3 a @ 15) the voltage on curr1, curr2 and curr6 and increases the current in off state in case of overvoltage. table 8 ? hv - current sinks characteristics symbol parameter min typ max unit note i bit7 current sink if bit7 = 1 19.2 i bit6 current sink if bit6 = 1 9.6 i bit5 current sink if bit5 = 1 4.8 i bit4 current sink if bit4 = 1 2.4 i bit3 current sink if bit3 = 1 1.2 i bit2 current sink if bit2 = 1 0.6 i bit1 current sink if bit1 = 1 0.3 i bit0 current sink if bit0 = 1 0.15 ma for v(currx) > 0.45v m matching accuracy -10 +10 % curr1,curr2,curr6 absolute accuracy -15 +15 % v currx voltage compliance 0.45 15 v ov_prot_ 13v overvoltage protection of current sink curr1,2,6 3.0 a at 13v, independent of curr1_prot_on, cu rr2_prot_on or curr6_prot_on ov_prot_ 15v overvoltage protection of current sink curr1,2,6 0.8 4.0 ma at 15v, step_up_on=1, curr1_prot_on=1 for curr1, curr2_prot_on=1 for curr2, curr6_prot_on=1 for curr6 7.3.1.1 high voltage cu rrent sinks curr1, curr2, curr6 registers addr: 09h curr1 current this register controls the high voltage current sink current. bit bit name default access description 7:0 curr1_current 0 r/w defines current into current sink curr1 00h = 0 ma 01h = 0.15 ma ... ffh = 38.25 ma addr: 0ah curr2 current this register controls the high voltage current sink current. bit bit name default access description 7:0 curr2_current 0 r/w defines current into current sink curr2 00h = 0 ma 01h = 0.15 ma ... ffh = 38.25 ma ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 20 - 54 addr: 2fh curr6 current this register controls the high voltage current sink current. bit bit name default access description 7:0 curr6_current 0 r/w defines current into current sink curr6 00h = 0 ma 01h = 0.15 ma ... ffh = 38.25 ma curr12 control addr: 01h this register select the mode of the current sinkscontrols high voltage current sink current. bit bit name default access description 1:0 curr1_mode 0 r/w select the mode of the current sink curr1 00b = off 01b = on 10b = pwm controlled 11b = led pattern controlled 3:2 curr2_mode 0 r/w select the mode of the current sink curr2 00b = off 01b = on 10b = pwm controlled 11b = led pattern controlled addr: 02h curr 6 control this register select the mo de of the current sinks curr6 bit bit name default access description 7:6 curr6_mode 0 r/w select the mode of the current sink curr6 00b = off 01b = on 10b = pwm controlled 11b = led pattern controlled dcdc control 2 addr: 22h this register controls the step up dc/ dc converter and low-voltage current sinks curr 3x . bit bit name default access description 0 step_up_res 0 r/w gain selection for step up dc/dc converter. select 0 if step up dc/dc converter is used with current feedback (curr1, curr2) or if dcdc_fb is used with current feedback only ? only r1, c1 connected select 1 if dcdc_fb is used with external resistor divider (2 resistors). 1 skip_fast 0 r/w step up dc/dc converter output voltage at low loads, when pulse skipping is active. 0 = accurate output voltage, more ripple. 1 = elevated output voltage, less ripple. 2 stepup_prot 1 r/w step up dc/dc converter protection. 0 = no overvoltage protection. 1 = overvoltage protection on pin dcdc_fb enabled voltage limitation =1.25v on dcdc_fb ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 21 - 54 dcdc control 2 addr: 22h this register controls the step up dc/ dc converter and low-voltage current sinks curr 3x . bit bit name default access description 3 stepup_lowcur 1 r/w step up dc/dc converter coil current limit. 0: normal current limit 1: current limit reduced by approx. 33% 4 curr1_prot_on 0 r/w 0 = no overvoltage protection 1 = pull down current on curr1 switched on, if voltage on curr1 exceeds 13.75v, and step_up_on=1 5 curr2_prot_on 0 r/w 0 = no overvoltage protection 1 = pull down current on curr2 switched on, if voltage exceeds on curr2 13.75v, and step_up_on=1 6 curr6_prot_on 0 r/w 0 = no overvoltage protection 1 = pull down current on curr6 switched on, if voltage on curr6 exceeds 13.75v, and step_up_on=1 7 step_up_fb_auto 0 r/w 0 = step_up_fb select the feed back of the dcdc converter 1 = the feedback is automatically chosen within the current sinks curr1and curr2 (never dcdc_fb). only those are used for this selection, which are enabled (currx_mode must not be 00) and not connected to the charge pump (currx_on_cp must be 0). 7.3.2 current sinks curr30, curr31, curr32, curr33 these current sinks have a resolution of 8 bits and can sink up to 40ma. the current values can be controlled individually with curr30_current ? curr33_current or common with curr3x_strobe or curr3x_preview . table 9 ? current sinks curr30, 31,32,33 parameters symbol parameter min typ max unit note i bit7 current sink if bit7 = 1 19.2 i bit6 current sink if bit6 = 1 9.6 i bit5 current sink if bit5 = 1 4.8 i bit4 current sink if bit4 = 1 2.4 i bit3 current sink if bit3 = 1 1.2 i bit2 current sink if bit2 = 1 0.6 i bit1 current sink if bit1 = 1 0.3 i bit0 current sink if bit0 = 1 0.15 ma for v(curr3x) > 0.2v m matching accuracy -10 +10 % curr30-33 absolute accuracy -15 +15 % v curr3x voltage compliance 0.2 cpout v 7.3.2.1 current sinks curr3x registers addr: 12h curr3 control1 this register select the modes of the current sinks30..33 current. bit bit name default access description 0 preview_off_after strobe 0b r/w select the switch off mode after strobe pulse 0 = normal preview/strobe mode, 1 = switch off preview after strobe duration has expired. to reinitiate the torch mode the preview_ctrl has to be set off and on again ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 22 - 54 addr: 12h curr3 control1 this register select the modes of the current sinks30..33 current. bit bit name default access description 2:1 preview_ctrl 00b r/w preview is triggered by 00 = off 01 = software trigger (setting this bit automatically triggers preview) addr: 11h curr3 strobe control this register select the modes of the current sinks30..33 current. bit bit name default access description 1:0 strobe_ctrl 00b r/w strobe is triggered by 00b = off 01b = software trigger (setting this bit automatically triggers strobe) 3:2 strobe_mode 00b r/w selects strobe mode 00b = mode1 (tstrobe=ts; strobe trigger signal >= 10 s) 01b = mode 2 (tstrobe=max ts) 10b = mode 3 (tstrobe = strobe signal) 11b = not used 7:4 strobe_timing 0000b r/w selects strobe time (ts) 0000b = 100 msec 0001b = 200 msec 0010b = 300 msec 0011b = 400 msec 0100b = 500 msec 0101b = 600 msec 0110b = 700 msec 0111b = 800 msec 1000b = 900 msec 1001b = 1000 msec 1010b = 1100 msec 1011b = 1200 msec 1100b = 1300 msec 1101b = 1400 msec 1110b = 1500 msec 1111b = 1600 msec addr: 0eh curr3x strobe this register select the strobe current of the current sinks30..33 bit bit name default access description 5:0 curr3x_strobe 00 r/w defines strobe current of current sinks curr30-33 00h = 0 ma 01h = 0.6 ma ... 3fh = 37.8 ma addr: 0fh curr3x preview this register select the preview current of the current sinks30..33 bit bit name default access description 5:0 curr3x_preview 00 r/w defines preview current of current sinks curr30-33 00h = 0 ma 01h = 0.6 ma ... 3fh = 37.8 ma ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 23 - 54 addr: 10h curr3x other this register selects the curr ent of the current sinks30..33 bit bit name default access description 5:0 curr3x_other 00 r/w selects curr30 current, if curr30 is not used for strobe/preview (curr30_mode=11b) 00h = 0 ma 01h = 0.6 ma ... 3fh = 37.8 ma addr: 40h curr30 current this register selects the current of the current sink30 bit bit name default access description 7:0 curr30_current 00 r/w selects curr30 current, if curr30 is not used for strobe/preview (curr30_mode=11b) 00h = 0 ma 01h = 0.15 ma ... ffh = 38.25 ma addr: 41h curr31 current this register selects the current of the current sink31 bit bit name default access description 7:0 curr31_current 00 r/w selects curr30 current, if curr30 is not used for strobe/preview (curr30_mode=11b) 00h = 0 ma 01h = 0.15 ma ... ffh = 38.25 ma addr: 42h curr32 current this register selects the current of the current sink32 bit bit name default access description 7:0 curr32_current 00 r/w selects curr32 current, if curr32 is not used for strobe/preview (curr32_mode=11b) 00h = 0 ma 01h = 0.15 ma ... ffh = 38.25 ma addr: 43h curr33 current this register selects the current of the current sink33 bit bit name default access description 7:0 curr33_current 00 r/w selects curr33 current, if curr33 is not used for strobe/preview (curr33_mode=11b) 00h = 0 ma 01h = 0.15 ma ... ffh = 38.25 ma ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 24 - 54 addr: 03h curr3 control this register select the mo de of the current sinks30 - 33 bit bit name default access description 1:0 curr30_mode 0 r/w select the mode of the current sink curr30 00b = off 01b = strobe/preview 10b = curr30_other pwm controlled 11b = curr30_current 1) 3:2 curr31_mode 0 r/w select the mode of the current sink curr31 00b = off 01b = strobe/preview 10b = curr31_other pwm controlled 11b = curr31_current 1) 5:4 curr32_mode 0 r/w select the mode of the current sink curr32 00b = off 01b = strobe/preview 10b = curr32_other pwm controlled 11b = curr32_current 1) 7:6 curr33_mode 0 r/w select the mode of the current sink curr33 00b = off 01b = strobe/preview 10b = curr33_other pwm controlled 11b = curr33_current 1) 1) don?t use this mode (11b) if softdim_p attern=1, use strobe/preview instead addr: 18h pattern control this register controls the led pattern bit bit name default access description 4 curr30_pattern 0b r/w additional curr33 led pattern control bit 0b = curr30 controlled according curr30_mode register 1b = curr30 controlled by led pattern generator 5 curr31_pattern 0b r/w additional curr33 led pattern control bit 0b = curr31 controlled according curr31_mode register 1b = curr31 controlled by led pattern generator 6 curr32_pattern 0b r/w additional curr33 led pattern control bit 0b = curr32 controlled according curr32_mode register 1b = curr32 controlled by led pattern generator 7 curr33_pattern 0b r/w additional curr33 led pattern control bit 0b = curr33 controlled according curr33_mode register 1b = curr33 controlled by led pattern generator 7.3.3 led pattern generator the led pattern generator is capable of producing a pa ttern with 32 bits length and 1 second duration (31.25ms for each bit). the pattern itself can be started every second, every 2 nd , 3 rd or 4 th second. with this pattern all current sinks can be controlled. the pattern itself switches t he configured current sources between 0 and their programmed current. if everything else is switched off, the current consumption in this mode is i active . (excluding current through switched on current source) and the ch arge pump, if required. the charge pump can be automatically switched on/off depending on the pattern (see register cp_auto_on in the charge pump section) to reduce the overall current consumption. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 25 - 54 figure 15 ? led pattern generator as3687/87xm for pattern_color = 0 any current sink 1 23 4 56 78 9 ...32 i t 123456 at this time a delay of 0s,1s,2s,...,8s,16s,24s,32s,40s,48s,56s can be programmed 78 9... defined by bit in the setup register pattern_data in this example the code is 101110011... 31.25ms (250ms if pattern_slow=1) to select the different current sinks to be controlled by the led pattern ge nerator, see the ?xxxx?_mode registers (where ?xxxx? stands for the to be controlled current sink , e.g. curr1_mode for curr1 current sink). see also the descirption of the different current sinks. to allow the generator of a color patterns set the bit patte rn_color to ?1?. then the pattern can be connected to curr30-32 as follows: figure 16 ? led pattern generator as3687/87xm for pattern_color = 1 curr1/curr30 curr2/curr31 curr6/curr32,33 369 ...30 i t ... 100ms (800ms if pattern_slow=1) ... 29 ... 28 147 258 36 9 14 7 258 ... ... defined by bit in the setup register pattern_data in this example the code is 111110001011111000110111... at this time a delay of 0s,1s,2s,...,8s,16s,24s,32s,40s,48s,56s can be programmed only those current sinks will be controlled, where t he ?xxxx?_mode register is configured for led pattern. if the register bit pattern_slow is set, a ll pattern times are increased by a factor of eigth. (bit duration: 250ms if pattern_color=0 / 800ms if pattern_color=1, delays between pattern up to 24s). 7.3.3.1 soft dimming for pattern the internal pattern generator can be combined with the in ternal pwm dimming modulator to obtain as shown in the following figure: figure 17 ? softdimming architecture for the as36 87/87xm (softdim_pattern=1 and pattern_color = 1) pattern generator dimming ramp gen up down 8 pwm modulator zero detect rs flip flop set reset out rs flip flop set reset out rs flip flop set reset out curr1/curr30 curr2/curr31 curr6/curr32,33 controls current sources (on/off) for current source where currx_mode = led pattern with the as3687/87xm smooth fade-in and fade-out effects can be automatically generated. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 26 - 54 as there is only one dimming ramp generator and on e pwm modulator following constraints have to be considered when setting up the pattern (applies only if pattern_color=1): figure 18 ? softdimming example waveform for curr30-32 curr30 curr31 curr32 ok ok not possible a new dimming up (curr32) can be started after the dimming down (curr30) is finished a new dimming up (curr32) cannot be started after or while one channel (curr30) is dimming up however using the identical dimming waveform for two channels is possible as shown in the following figure: figure 19 ? softdimming example waveform for curr30-32 ok ok ok curr30 curr31 curr32 7.3.3.2 led pattern registers addr: 19h,1ah,1bh,1ch pattern data0, pattern data1, pattern data2, pattern data3 this registers contains the patte rn data for the current sinks. bit bit name default access description 7:0 pattern_data0[7:0] 1 0 r/w pattern data0 7:0 pattern_data1[15:8] 1 0 r/w pattern data1 7:0 pattern_data2[23:16] 1 0 r/w pattern data2 7:0 pattern_data3[31:24] 1 0 r/w pattern data3 note: 1. update any of the pattern register only if none of the current s ources is connected to the pattern generator (?xxxx?_mode must not be 11b). the pattern generator is automatically started at the same time when any of the current sour ces is connected to the pattern generator ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 27 - 54 addr: 18h pattern control this register controls the led pattern bit bit name default access description 0 pattern_color 0 r/w defines the pattern type for the current sinks 0b = single 32 bit pattern (also set currx_mode = 11) 1b = rgb pattern with each 10 bits (set all currx_mode = 11) 2:1 pattern_delay 00b r/w delay between pattern, details see table led pattern timing; together with pattern_delay2 sets the delay time between patterns 3 softdim_pattern 0b r/w enable the ?soft? dimming feature for the pattern generator 0 = pattern generator directly control current sources 1 = ?soft dimming? is performed ? see section ?soft dimming for pattern? 4 curr30_pattern 0b r/w additional curr33 led pattern control bit 0b = curr30 controlled according curr30_mode register 1b = curr30 controlled by led pattern generator 5 curr31_pattern 0b r/w additional curr33 led pattern control bit 0b = curr31 controlled according curr31_mode register 1b = curr31 controlled by led pattern generator 6 curr32_pattern 0b r/w additional curr33 led pattern control bit 0b = curr32 controlled according curr32_mode register 1b = curr32 controlled by led pattern generator 7 curr33_pattern 0b r/w additional curr33 led pattern control bit 0b = curr33 controlled according curr33_mode register 1b = curr33 controlled by led pattern generator addr: 2ch gpio_current bit bit name default access description 4 pattern_delay2 0 r/w delay between pattern see table led pattern timing; together with pattern_delay sets the delay time between patterns 6 pattern_slow 0 r/w pattern timing control 0b = normal mode 1b = slow mode (all pattern times are increased by a factor of eight) figure 20 ?led pattern timing pattern_slow pattern_delay2 pattern_delay[1..0] bit duration [ms] delay [s] pattern duration [s] delay between patterns pattern_color=0 pattern_color=1 between patterns (total cycle time: pattern + delay) 0 0 00 31 100 0 1 1 0 0 01 31 100 1 2 0 0 10 31 100 2 3 0 0 11 31 100 3 4 0 1 00 31 100 4 5 0 1 01 31 100 5 6 0 1 10 31 100 6 7 0 1 11 31 100 7 8 1 0 00 250 800 0 8 1 even by setting 000 for pattern delay, there is a small delay before the new patterns starts. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 28 - 54 figure 20 ?led pattern timing pattern_slow pattern_delay2 pattern_delay[1..0] bit duration [ms] delay [s] pattern duration [s] delay between patterns pattern_color=0 pattern_color=1 between patterns (total cycle time: pattern + delay) 1 0 01 250 800 8 16 1 0 10 250 800 16 24 1 0 11 250 800 24 32 1 1 00 250 800 32 40 1 1 01 250 800 40 48 1 1 10 250 800 48 56 1 1 11 250 800 56 64 7.3.4 pwm generator the pwm generator can be used for any current si nk (curr1, curr2, curr3x, curr6). the setting applies for all current sinks, which are controlled by the pwm generator (e.g. curr1 is pwm controlled if curr1_mode = 10). the pwm modulated signal can switch on/off the current sinks and therefore depending on its duty cycle change the brightness of an attached led. 7.3.4.1 internal pwm generator the internal pwm generator uses the 2mhz internal cl ock as input frequency and its dimming range is 6 bits digital (2mhz / 2^6 = 31.3khz pwm frequency) and 2 bits analog. depending on the actual code in the register ?pwm_code? the following algorithm is used: ? if pwm_code bit 7 = 1 then the upper 6 bits (bits 7:2) of pwm_code are used for the 6 bits pwm generation, which controls the selected currents sinks directly ? if pwm_code bit 7 =0 and bit 6 = 1 then bits 6:1 of pwm_code are used for the 6 bits pwm gener ation. this signal cont rols the selected current sinks, but the analog current of these sinks is divided by 2 ? if pwm_code bit 7 and bit 6 = 0 then bits 5:0 of pwm_code are used for the 6 bits pwm gener ation. this signal cont rols the selected current sinks, but the analog current of these sinks is divided by 4 figure 21 ? pwm control pwm_code 7 6 5 4 3 2 1 0 6 bit pwm to current sink(s) 6 bit pwm to current sink(s) but analog currents are divided by 2 0 6 bit pwm to current sink(s) but analog currents are divided by 4 00 automatic up/down dimming if the register pwm_dim_mode is set to 01 (up dimming) or 10 (down dimming) the value within the register pwm_code is increased (up dimming) or decreased (down dimming) every time and amount (either 1/4 th or 1/8 th ) defined by the register pwm_dim_speed. the maximum value of 255 (completely on) and the minimum value of 0 (off) is never exceeded. it is used to smoothly and aut omatically dim the brightne ss of the leds connceted to any of the current sinks. the pwm code is readabl e all the time (also during up and down dimming) the waveform for up dimming looks as foll ows (cycles omitted for simplicity): ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 29 - 54 figure 22 ? pwm dimming waveform for up dimming (pwm_dim_mode = 01); currx_mode = pwm controlled (not all steps shown) i t currx_current i/2 i/4 i/4 with up to 100% duty cycle next step: i/2 with 50% duty cycle 32s the internal pwm modulator circuit controls the current sinks as shown in the following figure: figure 23 ? pwm control circuit (currx_mode = 10b (pwm controlled)); x = any current sink pwm modulator 0 currx_current /2 /4 pwm_code idac 2mhz currx 8 8 dimming ramp gen from serial interface 8 adder_currentx currx_adder subx_en 8 8 if pwm_dim_mode = 01 or 10 adder logic the adder logic (available for curr30-32, curr1, curr2 and curr6) is intended to allow dimming not only from 0% to 100% (or 100% to 0%) of currx_current, but also e.g. from 10% to 110% (or 110% to 10%) of currx_current. that means for up dimming the starting current is defined by 0 + currx_adder and the end current is defined by currx_current + currx_adder. an overflow of the internal bus (8 bi ts wide to the idac) has to be avoided by the register settings (currx_current + currx_adder must not exceed 255). if the register subx_en is set, the result from the pwm_ modulator is inverted logically. that means for up dimming the starting current is defined by currx_adder - 1 and the end current is defined by currx_adder - currx_current - 1. an overflow of the internal bus (8 bits wide to the idac) has to be avoided by the register settings (currx_adder - currx_current - 1 must not be below zero). its purpose is to dim one channel e.g. curr30 from e.g. 110% to 10% of curr30_current and at the same time dim another channel e.g. curr31 from 20% to 120% of curr31_current. note: 1. the adder logic operates independ ent of the currx_mode setting, but its main purpose is to work together with the pwm modulator (improved up/down dimming) 2. if the adder logic is not used anymore, set the bit currx_adder to 0. (setting adder_currentx to 0 is not sufficient) figure 24 ? pwm dimming table decrease by 1/4th every step decrease by 1/8th every step seconds seconds seconds seconds step %dimming pwm %dimming pwm 50msec/ step 25msec/ step 5msec/ step 2,5msec/ step 1 100,0 255 100,0 255 0,00s 0,00s 0,000s 0,000s 2 75,3 192 87,8 224 0,05s 0,03s 0,005s 0,003s 3 56,5 144 76,9 196 0,10s 0,05s 0,010s 0,005s 4 42,4 108 67,5 172 0,15s 0,08s 0,015s 0,008s 5 31,8 81 59,2 151 0,20s 0,10s 0,020s 0,010s ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 30 - 54 figure 24 ? pwm dimming table decrease by 1/4th every step decrease by 1/8th every step seconds seconds seconds seconds step %dimming pwm %dimming pwm 50msec/ step 25msec/ step 5msec/ step 2,5msec/ step 6 23,9 61 52,2 133 0,25s 0,13s 0,025s 0,013s 7 18,0 46 45,9 117 0,30s 0,15s 0,030s 0,015s 8 13,7 35 40,4 103 0,35s 0,18s 0,035s 0,018s 9 10,6 27 35,7 91 0,40s 0,20s 0,040s 0,020s 10 8,2 21 31,4 80 0,45s 0,23s 0,045s 0,023s 11 6,3 16 27,5 70 0,50s 0,25s 0,050s 0,025s 12 4,7 12 24,3 62 0,55s 0,28s 0,055s 0,028s 13 3,5 9 21,6 55 0,60s 0,30s 0,060s 0,030s 14 2,7 7 19,2 49 0,65s 0,33s 0,065s 0,033s 15 2,4 6 16,9 43 0,70s 0,35s 0,070s 0,035s 16 2,0 5 14,9 38 0,75s 0,38s 0,075s 0,038s 17 1,6 4 13,3 34 0,80s 0,40s 0,080s 0,040s 18 1,2 3 11,8 30 0,85s 0,43s 0,085s 0,043s 19 0,8 2 10,6 27 0,90s 0,45s 0,090s 0,045s 20 0,4 1 9,4 24 0,95s 0,48s 0,095s 0,048s 21 0,0 0 8,2 21 1,00s 0,50s 0,100s 0,050s 22 7,5 19 1,05s 0,53s 0,105s 0,053s 23 6,7 17 1,10s 0,55s 0,110s 0,055s 24 5,9 15 1,15s 0,58s 0,115s 0,058s 25 5,5 14 1,20s 0,60s 0,120s 0,060s 26 5,1 13 1,25s 0,63s 0,125s 0,063s 27 4,7 12 1,30s 0,65s 0,130s 0,065s 28 4,3 11 1,35s 0,68s 0,135s 0,068s 29 3,9 10 1,40s 0,70s 0,140s 0,070s 30 3,5 9 1,45s 0,73s 0,145s 0,073s 31 3,1 8 1,50s 0,75s 0,150s 0,075s 32 2,7 7 1,55s 0,78s 0,155s 0,078s 33 2,4 6 1,60s 0,80s 0,160s 0,080s 34 2,0 5 1,65s 0,83s 0,165s 0,083s 35 1,6 4 1,70s 0,85s 0,170s 0,085s 36 1,2 3 1,75s 0,88s 0,175s 0,088s 37 0,8 2 1,80s 0,90s 0,180s 0,090s 38 0,4 1 1,85s 0,93s 0,185s 0,093s 39 0,0 0 1,90s 0,95s 0,190s 0,095s 7.3.4.2 pwm generator registers addr: 16h pwm control this register controls pwm generator bit bit name default access description 2:1 pwm_dim_mode 00b r/w selects the dimming mode 00b = no dimming; actual cont ent of register pwm_code is used for pwm generator 01b = logarithmic up dimming (codes are increased). start value is actual pwm_code ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 31 - 54 addr: 16h pwm control this register controls pwm generator bit bit name default access description 10b = logarithmic down dimming (codes are decreased) start value is actual pwm_code; switch off the dimmed current source after dimming is finished to avoid unnecessary quiescent current 11b = na 5:3 pwm_dim_speed 000b r/w defines dimming speed by in crease/descrease pwm_code ? 000b = ? by 1/4 th every 50 msec (total dim time 1.0s) 001b = ? by 1/8 th every 50 msec (total dim time 1.9s) 010b = ? by 1/4 th every 25 msec (total dim time 0.5s) 011b = ? by 1/8 th every 25 msec (total dim time 0.95s) 100b = ? by 1/4 th every 5 msec (total dim time 100ms) 101b = ? by 1/8 th every 5 msec (total dim time 190ms) 110b = ? by 1/4 th every 2.5 msec (total dim time 50ms) 111b = ? by 1/8 th every 2.5 msec (total dim time 95ms) addr: 17h pwm code this register controls the pwm code. bit bit name default access description 7:0 pwm_code 00b r/w selects the pwm code 00h = always 0 ... ffh = always 1 addr: 30h adder current 1 this register defines the current which can be added to curr1, curr30 bit bit name default access description 7:0 adder_current1 00b r/w selects the added current val ue ? do not exceed together with currx_current the internal 8 bit range (see text) 00h = 0 (represents 0ma) ... ffh = 255 (represents 38.25ma) addr: 31h adder current 2 this register defines the current which can be added to curr2, curr31 bit bit name default access description 7:0 adder_current2 00b r/w selects the added current val ue ? do not exceed together with currx_current the internal 8 bit range (see text) 00h = 0 (represents 0ma) ... ffh = 255 (represents 38.25ma) addr: 32h adder current 3 this register defines the current which can be added to curr6, curr32 bit bit name default access description 7:0 adder_current3 00b r/w selects the added current val ue ? do not exceed together with currx_current the internal 8 bit range (see text) 00h = 0 (represents 0ma) ... ffh = 255 (represents 38.25ma) ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 32 - 54 addr: 34h adder enable 2 enables the adder circuit for the selected current sources bit bit name default access description 0 curr1_adder 0 r/w enables adder circuit for current source curr1 0 = normal operation of the current source 1 = adder_current1 gets added to the current source current 1 curr2_adder 0 r/w enables adder circuit for current source curr2 0 = normal operation of the current source 1 = adder_current2 gets added to the current source current 2 curr6_adder 0 r/w enables adder circuit for current source curr6 0 = normal operation of the current source 1 = adder_current3 gets added to the current source current 3 curr30_adder 0 r/w enables adder circuit for current source curr30 0 = normal operation of the current source 1 = adder_current1 gets added to the current source current 4 curr31_adder 0 r/w enables adder circuit for current source curr31 0 = normal operation of the current source 1 = adder_current2 gets added to the current source current 5 curr32_adder 0 r/w enables adder circuit for current source curr32 0 = normal operation of the current source 1 = adder_current3 gets added to the current source current addr: 35h subtract enable enable the inversion from the signal from the pwm generator bit bit name default access description 0 sub_en1 0 r/w inverts the signal from the pwm generator 0 = direct operation (no inversion) 1 = the signal from the pwm generator for which the adder is enabled (curr1_adder = 1, curr30_adder = 1) is inverted 1 sub_en2 0 r/w inverts the signal from the pwm generator 0 = direct operation (no inversion) 1 = the signal from the pwm generator for which the adder is enabled (curr2_adder = 1, curr31_adder = 1) is inverted 2 sub_en3 0 r/w inverts the signal from the pwm generator 0 = direct operation (no inversion) 1 = the signal from the pwm generator for which the adder is enabled (curr6_adder = 1, curr32_adder = 1) is inverted ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 33 - 54 7.4 led test figure 25 ? led function testing c9 4.7f cpout c8 2.2f adc baseband processor interface detect open leds detect shorted leds from dcdc step up converter from charge pump dcdc_fb r3 1m d1 ... i(step_up_vtuning) ... the as3687/87xm supports the verificati on of the functionality of the con nected leds (open and shorted leds can be detected). this feature is espec ially useful in production test to veri fy the correct assembly of the leds, all its connectors and cables. it can also be used in the field to verify if any of the leds is damaged. a damaged led can then be disabled (to avoid unnecessary currents). the current sources, charge pump, dcdc converter and the internal adc are used to verify the forward voltage of the leds. if this forward voltage is within the specified limits of the leds, the external circuitry is assumed to operate. 7.4.1 function testing for single leds connected to the charge pump for any current source connected to the charge pump (curr30-33) where only one led is connected between the charge pump and the current sink (see figure 1) use: table 11 ? function testing for leds connected to the charge pump step action example code 1. switch on the charge pump and set it into manual 1:2 mode (to avoid automatic mode switching during measurements) reg 23h <- 14h (cp_mode = 1:2, manual) reg 00h <- 04h (cp_on = 1) 2. switch on the current sink for the led to be tested e.g. for register curr31set to 9ma use reg 10h <- 0fh (curr31_other = 9ma) reg 03h <- 0ch (curr31_mode = curr31_other) 3. measure with the adc the voltage on cp_out reg 26h <- 95h (adc_select=cp_out,start adc) fetch the adc result from reg 27h and 28h 4. measure with the adc the voltage on the switched on current sink reg 26h <- 8bh (adc_select=curr31,start adc) fetch the adc result from reg 27h and 28h 5. switch off the current sink for the led to be tested reg 03h <- 00h (curr31_mode = off) 6. compare the difference between the adc measurements (which is the actual voltage across the tested led) against the sp ecification limits of the tested led calculation performed in baseband uprocessor 7. do the same procedure for the next led starting from point 2 jump to 2. if not all the leds have been tested 8. switch off the charge pump set chargepump automatic mode reg 00h <- 00h (cp_on = 0) reg 23h <- 00h ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 34 - 54 7.4.2 function testing for leds connect ed to the step up dcdc converter for leds connected to the dcdc converter (us ually current sinks curr1,curr2 and curr6) use the following procedure: table 12 ? function testing for leds connected to the dcdc converter step action example code 1. switch on the current sink for the led string to be tested (curr1,2 or 6) e.g. test leds on curr1: reg 01h <- 01h (curr1_mode=on) reg 09h <- 3ch (curr1 = 9ma) 2. select the feedback path for the led string to be tested (e.g. step_up_fb = 01 for led string on curr1) reg 21h <- 02h (feedback=curr1) 3. set the current for step_up_vtuning exactly above the maximum forward voltage of the tested led string + 0.6v (for the current sink) + 0.25v; add 6% margin (accuracy of step_up_vtuning); this sets the maximum output voltage limit for the dcdc converter e.g. 4 leds with ufmax = 4.1v gives 17.25v +6% = 18.29v; if r3=1m and r4 = open, then select step_up_vtuning = 18 (reg 21h <- 92h; results in 19.25v overvoltage protection voltage ? see table in dcdc section) 4. set stepup_prot = 1 reg 22h <- 04h 5. switch on the dcdc converter reg 00h <- 08h 6. wait 80ms (dcdc_fb settling time) 7. measure the voltage on dcdc_fb (adc) reg 26h <- 96h (adc_select=dcdc_fb, start adc; fetch the adc result from reg 27h and 28h) 8. if the voltage on dcdc_fb is above 1.0v, the tested led string is broken ? then skip the following steps (code >199h) 9. switch off the overvoltage protec tion (stepup_prot = 0) reg 22h <- 00h 10. reduce step_up_vtuning step by step until the measured voltage on dcdc_fb (adc) is above 1.0v. after changing step_up_vtuning always wait 80ms, before ad-conversion e.g.: reg 21h <- 62h (step_up_vtuning=12): adc result=1,602v 11. measure voltage on d cdc_fb e.g. dcdc_fb=1.602v 12. switch off the dcdc converter reg 00h <- 00h 13. the voltage on the led string can be calculated now as follows (r4 = open): vled string = v(dcdc_fb) + i(step_up_vtuning) * r3 ? 0.5v (current sinks feedback voltage: vfb2). v(dcdc_fb) = adc measurement from point 11 i(step_up_vtuing) = last setting used for point 10 e.g.: vled = (1.602v + 12v ? 0.5v) / 4 = 3.276v 14. compare the calculated value against the specification limits of the tested leds with the above described procedures electrically o pen and shorted leds can be automatically detected. 7.5 analog-to-digital converter the as3687/87xm has a built-in 10-bit successive appr oximation analog-to-digital converter (adc). it is internally supplied by v2_5, which is also the full-scale input range (0v defines the adc zero-code). for input signal exceeding v2_5 (typ. 2.5v) a resistor divider with a gain of 0.4 (ratio prescaler ) is used to scale the input of the adc converter. consequently the resolution is: table 13 ? adc input ranges, compliances and resolution channels (pins) input range v lsb note dcdc_fb 0v-2.5v 2.44mv v lsb =2.5/1024 adc temp_code -30c to 125c 1 / adc tc junction temperature ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 35 - 54 table 13 ? adc input ranges, compliances and resolution channels (pins) input range v lsb note curr30-33 vbat, cp_out 0v-5.5v 6.1mv v lsb =2.5/1024 * 1/0.4; internal resistor divider used curr1, curr2, curr6 0v-1.0v 2.44mv v lsb =2.5/1024 table 14 ? adc parameters symbol parameter min typ max unit note resolution 10 bit vin input voltage range vss vsupply v vsupply = v2_5 d nl differential non-linearity 0.25 lsb i nl integral non-linearity 0.5 lsb vos input offset voltage 0.25 lsb rin input impedance 100 m cin input capacitance 9 pf vsupply (v2_5) power supply range 2.5 v 2%, internally trimmed. idd power supply current 500 a during conversion only. idd power down current 100 na t tol temperature sensor accuracy -10 +10 c @ 25 c adc toffset adc temperature measurement offset value 375 c adc tc code temperature coefficient 1.2939 c/code temperature change per adc lsb ratio prescaler ratio of prescaler 0.4 for all low voltage current sinks, cp_out and vbat transient parameters (2.5v, 25 oc) tc conversion time 27 s fc clock frequency 1.0 mhz ts settling time of s&h 16 s all signals are internally generated and triggered by start_conversion the junction temperature (t junction ) can be calculated with the following formula (adc temp_code is the adc conversion result for channel 17h selected by register adc_select = 010111b): t junction [ c] = adc toffset - adc tc adc temp_code 7.5.1 application hint: extending to adc input voltage range for curr1,2,6 under certain operating conditions, the input voltage ra nge for the adc input curr1, 2,6 (specified from 0.0v- 1.0v for all operating conditions in table ?adc input ra nges, compliances and resolution? ) can be extended as follows: ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 36 - 54 figure 26 ? internal voltage of the adc vs. applied voltage on curr1,2 or curr6 operating conditio ns: vbat>=3.3v, t junc >= -20 c (one curve with charge pump operating in 1:2 mode ?on? and one curve with charge pump in 1:1 mode ?off?). above curve represent the worst case and therefore are guaranteed by design under the above operating conditions (adc input range for curr1,2,6 is between 0v and 1.5v). 7.5.2 adc registers addr: 27h adc_msb result together with register 27h, this register contains the results (msb) of an adc cycle. bit bit name default access description 6:0 d9:d3 n/a r adc results register. 7 result_not_ready n/a r indicates end of adc conversion cycle. 0 = result is ready. 1 = conversion is running. addr: 28h adc_lsb result together with register 28h, this register contains the results (lsb) of an adc cycle bit bit name default access description 2:0 d2:d0 n/a r adc result register. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 37 - 54 addr: 26h adc_control this register input source select ion and initialization of adc. bit bit name default access description 5:0 adc_select 1 0 r/w selects input source as adc input. 000000 (00h) = reserved 000001 (01h) = reserved 000010 (02h) = reserved 000011 (03h) = reserved 000100 (04h) = reserved 000101 (05h) = reserved 000110 (06h) = reserved 000111 (07h) = reserved 001000 (08h) = curr1 001001 (09h) = curr2 001010 (0ah) = curr30 001011 (0bh) = curr31 001100 (0ch) = curr32 001101 (0dh) = curr33 001110 (0eh) = reserved 001111 (0fh) = reserved 010000 (10h) = reserved 010001 (11h) = reserved 010010 (12h) = reserved 010011 (13h) = curr6 010100 (14h) = vbat 010101 (15h) = cp_out 010110 (16h) = dcdc_fb 010111 (17h) = adc temp_code (junction temperature) 011xxx, 1xxxxx = reserved 6 reserved ? don?t use; always write 0 to this register 7 start_conversion n/a w writing a 1 into this bit starts one adc conversion cycle. notes: 1. see table ?adc input ranges, compliances and resolution ? for adc ranges and possible figure 27 ? adc circuit 10bit sar adc v2_5 d9:d0 result_not_ready curr6 dcdc_fb vtemp curr2 curr1 180k 120k curr32 curr33 vbat curr31 curr30 vcp nc adc_select control start_conversion 1mhz 7.6 audio controlled rg b leds (only as3687xm) up to 2 rgb leds (connected to the pins curr30-cu rr32 and/or curr1,2,6) can be controlled by an audio source (connected to pin curr33/audio_in). the color of the rgb led(s) is depending on the input amplitude and it starts from black trans itions to blue, green, cyan, yellow, red and for high amplitudes white is used (internal lookup table if audio_color=000b). ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 38 - 54 figure 28 ? audio controlled rgb led application circuit cpout c5 1.0f curr30 curr31 curr32 current sinks each 0.15-38.25ma curr1 curr2 hv current sinks each 0.15-38.25ma curr6 audio processing curr33/audio_in audio in d rgb1 d2 d3 d4 d rgb2 alternative: 2 nd audio or backlight c10 100nf as3687xm ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 39 - 54 the internal circuit has the following functions: figure 29 ? audio controlled rgb led internal circuit curr33/audio_in audio in 1.25v adc optional adc_select curr30 curr31 curr32 other modes other modes other modes curr3x_out curr1 curr2 curr6 other modes other modes other modes curr126_out audio_gain -12db...+30db aud_buf_on dc remove level detect / fadeout agc look up table audio_color agc_ctrl audio_speed rgb_amplitude the audio controlled led block is enabled if any of t he registers curr3x_out or curr126_out is not zero. the audio input amplifier (enabled by aud_buf_on=1) is used to allow the attenuation (or amplification of the input signal) and has the following parameters: table 15 ? audio input parameters symbol parameter min typ max unit note vin input voltage range 0 2.5 v rin_min min. input impedance 20 k ? at max. input gain (30db) when audio control rgb led is active, the internal ad c is continuously running at a sample frequency of 45.5khz. in this case the adc c annot be used for any other purpose. the input amplitude is mapped into different colors for rgb led(s) or brightness for single color led(s). the mapping is controlled by the register audio_color. if audio_color = 000, then the mapping is done as follows: very low amplitudes are mapped to black, for higher am plitudes, the color smoothly transitions from blue, green, cyan, yellow, red and eventually to white (for high input amplitudes). otherwise the output is mapped to the brightness of a single color. 7.6.1 agc the agc is used to ?compress? the input signal and to attenuate very low input amplitude signals (this is performed to ensure no light output for low signals especially for noisy input signals). the agc monitors the input signal amplit ude and filters this amplitude with a f ilter with a short attack time, but a long decay time (decay time depends on the register ag c_ctrl). this amplitude m easurement (represented by an ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 40 - 54 integer value from 0 to 15) is then used to amplify or attenuate the input signal with one of the following amplification ratios (output to input ratio) ? the curve a, b, or c is selected depending on the register agc_ctrl: figure 30 ? agc curve a (x-axis: input amplitude, y-axis: outpu t amplitude; actual value: gain between output to input) figure 31 ? agc curve b (x-axis: input amplitude, y-axis: outpu t amplitude; actual value: gain between output to input) figure 32 ? agc curve c (x-axis: input amplitude, y-axis: outpu t amplitude; actual value: gain between output to input) ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 41 - 54 7.6.2 audio control registers audio control (only as3687xm) addr: 46h a udio controlled led mode control bit bit name default access description 0 aud_buf_on 0b r/w audio input buffer enable 0 off 1 on 4:2 audio_color 000b r/w audio controlled led color selection 000 color scheme defined by lookup table 001-111 fixed color scheme (b2=r, b1=g, b0=b) ? single color only (e.g. red: 100b) 7:6 audio_speed 00b r/w audio controlled led persistence time 00 none 01 200ms 10 400ms 11 800ms audio input (only as3687xm) addr: 47h a udio controlled led input control bit bit name default access description 2:0 audio_gain 000b r/w audio input buffer gain control 000 -12db 001 -6db 010 0db 011 +6db 100 +12db 101 +18db 110 +24db 111 +30db 5:3 agc_ctrl 000b r/w audio input buffer agc function controls agc transfer function 000 agc off 001 attenuate low amplitude signals otherwise linear response (to remove e.g. noise) 010 agc curve a; slow decay of amplitude detection 011 agc curve a; fast dec ay of amplitude detection 100 agc curve b; slow decay of amplitude detection 101 agc curve b; fast dec ay of amplitude detection 110 agc curve c; slow decay of amplitude detection 111 agc curve c; fast decay of amplitude detection 6 audio_man_start 0b r/w startup control of audio inpu t buffer (for charging of external ac-coupling capacitor) 0 automatic precharging 300us (if audio_dis_start = 0) 1 continuously precharging (if audio_buf_on = 1) 7 audio_dis_start 0b r/w disable startup control of audio input buffer 0 precharging enabled 1 precharging disabled ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 42 - 54 audio output (only as3687xm) addr: 48h a udio controlled led input control bit bit name default access description 2:0 rgb_amplitude 000b r/w rgb output amplitude control (in % of selected output current) ? master amplitude control 000 6.25% 001 12.5% 010 25% 011 50% 100 75% 101 87.5% 110 93.75% 111 100% 3 curr3x_out 0b r/w audio sync enable for curr30-curr32 0 off 1 on, adc continuously running with f=500khz 4 curr126_out 0b r/w audio sync enable for curr1, curr2, curr6 0 off 1 on, adc continuously running with f=500khz 7.7 power-on reset the internal reset is controlled by two sources: ? vbat supply ? serial interface state (scl, sda) the internal reset is forced if vbat is low or if both in terface pins (scl, sda) are low for more than 100ms. the device enters shutdown mode, when scl and sda remain low. the reset levels control the state of all registers. as long as vbat and scl/ sda are below their reset thresholds, the register contents are set to default. access by serial interface is possible once the reset thresholds are exceeded. figure 33 ? zero power device wakeup block diagram serial interface logic r4 1-10k vdd_i/f clk clk data data zero power device wakeup r5 shutdn_disab debounce timer 1ms/100ms power-on to internal references and v2_5 ldo on vbat v2_5 vbat fast_shutdwn vbat v2_5 v2_5 vbat ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 43 - 54 table 16 ? reset levels symbol parameter min typ max unit note vpor_vbat overall power-on reset 1.8 2.15 2.4 v monitor voltage on v2_5; power-on reset for all internal functions. 2 v por_peri reset level for pins scl, sda 0.29 1.0 1.38 v monitor voltage on pins scl, sda t por_deb reset debounce time for pins scl, sda 80 100 120 ms t start interface startup time 4 6 8 ms 7.7.1 reset control register addr: 29h overtemp control this register reads and rese ts the overtemperature flag. bit bit name default access description 4 shutdwn_enab 0 r/w enable shutdown mode and serial interface reset. 0 serial interface reset disabled. device does not enter shutdown mode 1 serial interface reset enabled, device enters shutdown when scl and sda remain low for min. 120ms 7.8 temperature supervision an integrated temperature sensor pr ovides over-temperature protection for the as3687/87xm. this sensor generates a flag if the device temper ature reaches the overtemperature thre shold of 140o. the threshold has a hysteresis to prevent oscillation effects. if the device temperature exceeds the 140o threshold all current sources, the charge pump and the dcdc converter is disabled and the ov_temp flag is set. after dec reasing the temperature by 5o (typically) operation is resumed. the ov_temp flag can only be reset by first wr iting a 1 and then a 0 to the bit rst_ov_temp. bit ov_temp_on = 1 activates temperature supervision. table 17 ? overtemperature detection symbol parameter min typ max unit note t140 ov_temp rising threshold 140 o c thyst ov_temp hystersis 5 o c 2 guaranteed by design ? not production tested. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 44 - 54 7.8.1 temperature supervision registers addr: 29h overtemp control this register reads and rese ts the overtemperature flag. bit bit name default access description 0 ov_temp_on 1 w activates/deactivates device temperature supervision. default: off - all other bits are onl y valid if this bit is set to 1. 0 = temperature supervision is disabled. no reset will be generated if the device te mperature exceeds 140oc. 1 = temperature supervision is enabled. 1 ov_temp n/a r 1 = indicates that the overte mperature threshold has been reached; this flag is not cleared by an overtemperature reset. it has to be cleared using bit rst_ov_temp. 2 rst_ov_temp 0 r/w the ov_temp flag is cleared by first setting this bit to 1, and then setting this bit to 0. 7.9 serial interface the as3687/87xm is controlled using se rial interface pins clk and data: figure 35 ? serial interface block diagram serial interface logic r4 1-10k vdd_i/f clk clk data data r5 the clock line clk is never held low by the as3687/87xm (as the as3687/87xm does not use clock stretching of the bus). table 18 ? serial interface timing symbol parameter min typ max unit note v ihi/f high level input voltage 1.38 vbat v v ili/f low level input voltage 0.0 0.52 v v hysti/f hysteresis 0.1 v t rise rise time - v ili/f to v ihi/f 0 1000 ns t fall fall time - v ihi/f to v ili/f 0 300 ns pins data and clk t clk_filter spike filter on clk 100 ns t data_filter spike filter on data 300 ns 7.9.1 serial interface features ? fast mode capability (maximum clock frequency is 400 khz) ? 7-bit addressing mode ? write formats ? single-byte write ? page-write ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 45 - 54 ? read formats ? current-address read ? random-read ? sequential-read ? data input delay and clk spike f iltering by integrated rc components 7.9.2 device address selection the serial interface address of the as3687/87xm has the following address: ? 80 h ? write commands ? 81 h ? read commands figure 36 ? complete serial data transfer s start condition address r/w ack data ack data ack stop condition p data clk 1-7 8 9 1-7 89 1-7 8 9 7.9.2.1 serial data transfer formats definitions used in the serial data transfer format diagrams ar e listed in the following table: table 19 ? serial data transfer byte definitions symbol definition r/w (as3687/87xm slave) notes s start condition after stop r 1 bit sr repeated start r 1 bit dw device address for write r 10000000b (80 h ). dr device address for read r 10000001b (81 h ) wa word address r 8 bits a acknowledge w 1 bit n not acknowledge r 1 bit reg_data register data/write r 8 bits data (n) register data/read r 1 bit p stop condition r 8 bits wa++ increment word address internally r during acknowledge ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 46 - 54 figure 37 ? serial interface byte write s dw a wa a reg_data a p write register wa++ as3687/87xm (= slave) receives data as3687/87xm (= slave) transmits data figure 38 ? serial interface page write s dw a wa a reg_data 1 a reg_data 2 a ? reg_data n a p write register wa++ write register wa++ write register wa++ as3687/87xm (= slave) receives data as3687/87xm (= slave) transmits data byte write and page write formats ar e used to write data to the slave. the transmission begins with the start condition, which is generated by the master when the bus is in idle state (the bus is free). the device-writ e address is followed by the word address. after the word address any number of data bytes can be sent to the slave. the word address is incremented internally, in order to write subsequent data bytes on subsequent address locations. for reading data from the slave device, the master has to change the transfer direction. this can be done either with a repeated start condition followed by the device-read address, or simply with a new transmission start followed by the device-read address, when the bus is in idle state. the device-read address is always followed by the 1st register byte transmitted from the slave. in read mode any number of subsequent register bytes can be read from the slave. the word address is incremented internally. the following diagrams show the serial read formats supported by the as3687/87xm. figure 39 ? serial interface random read s dw a wa a sr dr a data n p read register wa++ as3687/87xm (= slave) receives data as3687/87xm (= slave) transmits data random read and sequential read are combined formats. the repeated start condition is used to change the direction after the data transfer from the master. the word address transfer is initiated with a start condition issued by the master while the bus is idle. the start condition is followed by the device-write address and the word address. in order to change the data direction a repeated start condition is issued on the 1st clk pulse after the acknowledge bit of the word address transfer. after the reception of the devic e-read address, the slave becomes the transmitter. in this state the slave transmits register data located by the previous received word address vector. the master responds to the data by te with a not acknowledge, and issues a stop condition on the bus. ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 47 - 54 figure 40 ? serial interface sequential read s dw a wa a sr dr a data 1 a data 2 ... a data n n p read register wa++ as3687/87xm (= slave) receives data as3687/87xm (= slave) transmits data sequential read is the extended form of random read, as multiple regi ster-data bytes are subsequently transferred. in contrast to the random read, in a sequential re ad the transferred register-data bytes are responded by an acknowledge from the master. the number of data bytes transferred in one sequence is unlimited (consider the behavior of the word-address counter). to terminate the transmission the master has to send a not acknowledge following the last data byte and subsequently generate the stop condition. figure 41 ? serial interface current address read s dr a data 1 a data 2 ? a data n n p read register wa++ read register wa++ read register wa++ read register wa++ as3687 (= slave) receives data as3687 (= slave) transmits data to keep the access time as small as possible, this forma t allows a read access without the word address transfer in advance to the data transfer. the bus is idle and the master issues a start condition followed by the device- read address. analogous to random read, a single byte transfer is terminated with a not acknowledge after the 1st register byte. analogous to sequential read an unlimited number of data bytes can be transferred, where the data bytes must be responded to with an acknowledge from the master. for termination of the transmission the master sends a not acknowledge following the last data byte and a subsequent stop condition. 7.10 operating modes if the voltage on scl and sda is less than 1v (for > t por_deb ), the as3687/87xm is in shutdown mode and its current consumption is minimized (i bat = i shutdown ) and all internal registers are reset to their default values. if the voltage at scl or sda rises above 1v, the as368 7/87xm serial interface is enabled and the as3687/87xm and the standby mode is selected. the as3687/87xm is switched automatical ly from standby mode (i(bat) = i standby ) into normal mode (i(bat) = i active ) and back, if one of the foll owing blocks are activated: ? charge pump ? step up regulator ? any current sink ? adc conversion started ? pwm active ? pattern mode active. if any of these blocks are already swit ched on the internal oscillator is ru nning and a write in struction to the registers is directly evaluated within 1 internal clk cycle (typ. 1 s) if all these blocks are disabled, a write instruction to enable these blocks is delayed by 64 clk cycles (oscillator will startup, within max 200 s). ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 48 - 54 8 register map table 20 ? registermap register definition ad dr. def ault content name b7 b6 b5 b4 b3 b2 b1 b0 reg. control 00h 00 step_up _on cp_on curr12 control 01h 00h curr2_mode curr1_mode curr rgb control 02h 00h curr6_mode curr3 control1 03h 00h curr33_mode cu rr32_mode curr31_mode curr30_mode curr1 current 09h 00h curr1_current curr2 current 0ah 00h curr2_current curr3x strobe 0eh 00h curr3x_strobe curr3x preview 0fh 00h curr3x_preview curr3x other 10h 00h curr3x_other curr3 strobe control 11h 00h strobe_timing st robe_mode strobe_ctrl curr3 control2 12h 00h curr3x_ strobe_ high preview_ctrl preview _off_aft er strobe pwm control 16h 00h pwm_dim_speed pwm_dim_mode pwm code 17h 00h pwm_code pattern control 18h 00h curr33_ pattern curr32_ pattern curr31_ pattern curr30_ pattern softdim _patter n pattern_delay pattern _color pattern data0 19h 00h pattern_data[7:0] pattern data1 1ah 00h pattern_data[15:8] pattern data2 1bh 00h pattern_data[23:16] pattern data3 1ch 00h pattern_data[31:24] dcdc control1 21h 00h step_up_vtuning step_up_fb step_up _frequ dcdc control2 22h 04h step_up _fb_aut o curr6_p rot_on curr2_p rot_on curr1_p rot_on step_up _lowcur step_up _prot skip_fa st step_up _res cp control 23h 00h cp_auto _on cp_start _debou nce cp_mode_switchin g cp_mode cp_clk cp mode switch1 24h 00h curr33_ on_cp curr32_ on_cp curr31_ on_cp curr30_ on_cp cp mode switch2 25h 00h curr6_o n_cp curr2_o n_cp curr1_o n_cp adc_control 26h 00h start_co nversio n adc_on adc_select adc_msb result 27h na result_n ot_read y d9 d8 d7 d6 d5 d4 d3 adc_lsb result 28h na d2 d1 d0 ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 49 - 54 table 20 ? registermap register definition ad dr. def ault content name b7 b6 b5 b4 b3 b2 b1 b0 overtemp control 29h 01h shutdw n_enab rst_ov_t emp ov_tem p ov_tem p_on curr low voltage status1 2ah na curr6_lo w_v curr33_l ow_v curr32_l ow_v curr31_l ow_v curr30_l ow_v curr low voltage status2 2bh na curr2_lo w_v curr1_lo w_v gpio current 2ch 00h pattern _slow pattern _delay2 curr6 current 2fh 00h curr6_current adder current 1 30h 00h adder_current 1 (can be enabled for curr30, curr1) adder current 2 31h 00h adder_current 2 (can be enabled for curr31, curr2) adder current 3 32h 00h adder_current 3 (can be enabled for curr32, curr6) adder enable 2 34h 00h curr32_ adder curr31_ adder curr30_ adder curr6_a dder curr2_a dder curr1_a dder subtract enable 35h 00h sub_en 3 sub_en 2 sub_en 1 asic id1 3eh cah 1 1 0 0 1 0 1 0 asic id2 3fh 50h 0 1 0 1 revision curr30 current 40h 00h curr30_current curr31 current 41h 00h curr31_current curr32 current 42h 00h curr32_current curr33 current 43h 00h curr33_current audio control (only as3687xm) 46h 00h audio_speed audio_color aud_buf _on audio input (only as3687xm) 47h 00h audio_d is_start audio_ man_st art agc_ctrl audio_gain audio output (only as3687xm) 48h 00h curr126 _out curr3x_ out rgb_amplitude note: if writing to register, write 0 to unused bits note: write to read only bits will be ignored note: y yellow color = read only ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 50 - 54 9 external components table 21 ? external components list part number value min typ max tol (min) rating (max) notes package (min) c1 1 f +/-20% 6.3v ceramic, x5r (v2_5 output) (e.g. taiyo yuden jmk105bj105kv-f) 0402 c2 1 f +/-20% 6.3v ceramic, x5r (vbat) (e.g. taiyo yuden jmk107bj225ma-t) 0402 c3 500nf +/-20% 6.3v ceramic, x5r (charge pump) (e.g. taiyo yuden jmk107bj225ma-t) 0402 c4 500nf +/-20% 6.3v ceramic, x5r (charge pump) (e.g. taiyo yuden jmk107bj225ma-t) 0402 c5 1 f +/-20% 6.3v ceramic, x5r (charge pump output) (e.g. taiyo yuden jmk107bj225ma-t) 0403 c6 1 f +/-20% 6.3v ceramic, x5r (step up dcdc input) (e.g. taiyo yuden jmk107bj225ma-t) 0402 c7 1.5nf +/-20% 25v ceramic, x5r (step up dcdc feedback, 150pf for overvoltage protection) 0402 c8 15nf +/-20% 6.3v ceramic, x5r (step up dcdc feedback, 1.5nf for overvoltage protection) 0402 c9 4.7 f +/-20% 25v ceramic, x5r, x7r (step up dcdc output) (e.g. taiyo yuden tmk316bj475kg) 1206 (0805) c10 100nf +/-20% 6.3v ceramic, x5r, x7r (audio dc block capacitor) ? only for as3687xm 0402 r1 100m ? +/-5% shunt resistor 0603 r2 1m ? +/-1% step up dc/dc converter voltage feedback 0201 r3 100k ? +/-1% step up dc/dc converter voltage feedback - not required for overvoltage protection 0201 r4 1-10k ? +/-1% i2c bus data pullup resistor ? usually already inside i2c master 0201 r5 i2c bus clk pullup resistor ? usually already inside i2c master 0201 l1 10 h +/-20% panasonic ellsfg100ma or tdk vlf3012a or lqh3npn100nj0 q1 (+ d1) fdfma3n109 integrated nmos and schottky diode microfet 2x2mm d2:d14 led as required by application ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 51 - 54 10 pinout and packaging 10.1 pin description table 22 ? pinlist wl-csp 4x5 balls bmp name type description a1 c2_n aio charge pump flying capacitor; connect a ceramic capacitor of 500nf to this pin. a2 c1_p aio charge pump flying capacitor; connect a ceramic capacitor of 500nf to this pin. a3 cp_out ao output voltage of the charge pump; conn ect a ceramic capacitor of 1f (20%). a4 data dio serial interface data input/output. b1 c1_n aio charge pump flying capacitor; connect a ceramic capacitor of 500nf to this pin. b2 c2_p aio charge pump flying capacitor; connect a ceramic capacitor of 500nf to this pin. b3 dcdc_gate ao dcdc gate driver. b4 clk di clock input for serial interface. c1 vss gnd ground pad c2 vbat s supply pad. connect to battery. c3 curr30 ai analog current sink input, intended for activity icon led c4 dcdc_sns ai sense input of shunt resistor for step up dc/dc converter. curr33 as3687: analog current sink input, intended for activity icon led d1 curr33 /audio_in ai as3687xm: analog current sink input, intended for activity icon led or audio signal input d2 curr31 ai analog current sink input, intended for activity icon led d3 curr2 ai_hv analog current sink input (intended for keyboard backlight) d4 dcdc_fb ai dcdc feedback. connect to resistor string. e1 curr32 ai analog current sink input, intended for activity icon led e2 curr6 ai_hv analog current sink input (intended for keyboard backlight) e3 curr1 ai_hv analog current sink input (intended for keyboard backlight) e4 v2_5 ao3 output voltage of the low-power ldo; al ways connect a ceramic capacitor of 1f (20%) or 2.2f (+100%/-50%). do not load this pin during device startup. table 23 ? pin type definitions type description di digital input do digital output dio digital input/output aio analog pad ai analog input ai_hv high-voltage (15v) pin ao3 analog output (3.3v) s supply pad gnd ground pad ams ag technical content still valid
as3687/87xm datasheet www.austriamicrosystems.com/as3687 1v3-4 52 - 54 10.2 package drawings and markings figure 42 ? wl-csp 4x5 balls package drawing marking: line 1: austriamicrosystems logo line 2: as36 line 3: 87 (for as3687) 87xm (for as3687xm) line 4:

     4 letter encoded datecode      figure  43 ? wl-csp 4x5 balls detail dimensions  2 0 6 5   + / - 2 0  m 2545 +/-20m 500m 500m 282.5 m 282.5 m 500m 500m 500m 2 7 2 . 5  m 2 7 2 . 5  m bottom view (ball side) 2065 +/-20m 2 5 4 5   + / - 2 0  m top view (through) ? 31 1 +/- 1 0m pin a1 indicator side view 250 +/-20 m 350 +/-10 m 600 +/-30m a1 a2 a3 b1 b2 b3 c1 c2 c3 d1 d2 d3 a3 a2 a1 b3 b2 b1 c3 c2 c1 d3 d2 d1 a4 b4 c4 d4 e3 e2 e1 e4 500m 5 0 0  m a4 b4 c4 d4 e1 e2 e3 e4     the coplanarity of the balls is 40m.    ams  ag  technical  content  still  valid

   as3687/87xm     datasheet            www.austriamicrosystems.com/as3687  1v3-4  53 - 54    11 ordering information  table  24 ? delivery information  part number  marking  package type  delivery form  description  AS3687-ZWLT 1  as3687  wl-csp  4x5 balls  tape&reel  as3687  wafer level chip scale package,   size 4x5 balls, 0.5mm pitch,  rohs compliant, pb-free  as3687xm-zwlt as3687xm  wl-csp  4x5 balls  tape&reel  as3687xm  wafer level chip scale package,   size 4x5 balls, 0.5mm pitch,  rohs compliant, pb-free    1   do not use as3687 for new designs ? use as3687xm (drop in pin to pin compatible replacement for  as3687) instead.     description:    AS3687-ZWLT       as3687    as3687 lighting management unit  as3687xm    as3687xm lighting management unit (including audio controlled light)  -    z   ?  temperature range:   z = -30c ? 85c       wl ?  package:  wl = wafer level chip scale package      t ?  delivery form:  t = tape&reel       ams  ag  technical  content  still  valid

   as3687/87xm     datasheet            www.austriamicrosystems.com/as3687  1v3-4  54 - 54    copyright    copyright ? 1997-2010, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria- europe. trademarks registered ?. all rights reserved. t he material herein may not be reproduced, adapted,  merged, translated, stored, or used without the pr ior written consent of the copyright owner.     all products and companies mentioned are trademarks or re gistered trademarks of their respective companies.    diclaimer    devices sold by austriamicrosystems ag are covered  by the warranty and patent indemnification provisions  appearing in its term of sale. austriamicrosystems ag make s no warranty, express, stat utory, implied, or by  description regarding the information set forth herein or  regarding the freedom of t he described devices from  patent infringement. austriamicrosystems ag reserves the ri ght to change specifications and prices at any time  and without notice. therefore, prior to designing this pr oduct into a system, it is necessary to check with  austriamicrosystems ag for current information. this  product is intended for use in normal commercial  applications. applications requiring extended temperatur e range, unusual environmental  requirements, or high  reliability applications, such as military, medical life-supp ort or life-sustaining equipment are specifically not  recommended without additional processing by austriamicros ystems ag for each application. for shipments of  less than 100 parts the manufacturing flow might show dev iations from the standard production flow, such as test  flow or test location.  the information furnished here by austriamicrosystems  ag is believed to be correct and accurate. however,  austriamicrosystems ag shall not be liable to recipient  or any third party for any damages, including but not  limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect,  special, incidental or consequential da mages, of any kind, in connection with or arising out of the furnishing,  performance or use of the technical data  herein. no obligation or liability to re cipient or any third party shall arise  or flow out of austriamicrosystems ag  rendering of technical or other services                                  contact information    headquarters  austriamicrosystems ag  tobelbaderstrasse 30  schloss premst?tten  a-8141 austria    tel:   +43 (0) 3136 500 0  fax:   +43 (0) 3136 525 01    for sales offices, distributors and representatives, please visit:    http://www.austriamicrosystems.com/contact    ams  ag  technical  content  still  valid

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