cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 1/10 MTA65N15H8 cystek product specification n-channel enhancement mode power mosfet MTA65N15H8 bv dss 150v i d @v gs =10v 20a 60m v gs =10v, i d =15a v gs =5v, i d =10a 59m r dson(typ) v gs =3v, i d =3a 60m description the MTA65N15H8 is a n-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. features ? single drive requirement ? low on-resistance ? fast switching characteristic ? dynamic dv/dt rating ? repetitive avalanche rated ? pb-free lead plating and halogen-free package symbol outline MTA65N15H8 dfn5 6 pin 1 g gate d drain s source
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 2/10 MTA65N15H8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 150 gate-source voltage v gs 16 v continuous drain current @ t c =25 c, v gs =10v (note 1) 20 continuous drain current @ t c =100c, v gs =10v (note 1) i d 14 continuous drain current @ t a =25 c, v gs =10v (note 2) 4.0 *3 continuous drain current @ t a =70 c, v gs =10v (note 2) i dsm 3.2 *3 pulsed drain current (note 3) i dm 60 *1 avalanche current (note 3) i as 20 a avalanche energy @ l=0.1mh, i d =20a, v dd =50v (note 2) e as 20 repetitive avalanche energy @ l=0.05mh (note 3) e ar 6 *2 mj t c =25 (note 1) 60 t c =100 (note 1) p d 30 t a =25 c (note 2) 2.5 total power dissipation w t a =70 c (note 2) p dsm 1.6 operating junction and storage temp erature range tj, tstg -55~+175 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max 2.5 r jc c/w thermal resistance, junction-to-ambient, max (note 2) 50 r ja c/w thermal resistance, junction-to-ambient, max (note 4) r ja 125 c/w note : 1 . the power dissipation p d is based on t j(max) =175 c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150 c. the value in any given application de pends on the user?s specific board design. 3 . repetitive rating, pulse width limited by junction temperature t j(max) =175 c. ratings are based on low frequency and low duty cycles to keep initial t j =25 c. 4. when mounted on the minimum pad size recommended (pcb mount), t 10s. ordering information device package shipping MTA65N15H8-0-t6-g dfn 5 6 3000 pcs / tape & reel (pb-free lead plating and halogen-free package) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t6 : 3000 pc s / tape & reel,13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 3/10 MTA65N15H8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 150 - - v v gs =0v, i d =250 a ? bv dss / ? tj - 0.12 - v/ c reference to 25c, i d =250 a v gs(th) 0.4 0.8 1.5 v v ds = v gs , i d =250 a g fs *1 - 48 - s v ds =5v, i d =10a i gss - - 100 na v gs = 16v - - 1 v ds =120v, v gs =0v i dss - - 25 a v ds =100v, v gs =0v, tj=125 c - 60 75 v gs =10v, i d =15a - 59 75 v gs =5v, i d =10a r ds(on) *1 - 60 78 m v gs =3v, i d =3a dynamic ciss - 2282 - coss - 120 - crss - 66 - pf v gs =0v, v ds =25v, f=1mhz qg *1, 2 - 30 - qgs *1, 2 - 4.8 - qgd *1, 2 - 16 - nc i d =10a, v ds =80v, v gs =5v t d(on) *1, 2 - 23 - tr *1, 2 - 22 - t d(off) *1, 2 - 91 - t f *1, 2 - 63 - ns v ds =75v, i d =1a, v gs =4.5v, r g =6 source-drain diode i s *1 - - 20 i sm *3 - - 60 a v sd *1 - 0.85 1.3 v i s =20a, v gs =0v trr - 50 - ns qrr - 120 - nc i f =20a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature.
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 4/10 MTA65N15H8 cystek product specification recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 5/10 MTA65N15H8 cystek product specification typical characteristics typical output characteristics 0 10 20 30 40 50 60 0246810 v ds , drain-source voltage(v) i d , drain current(a) 10v, 9v, 8v, 7v, 6v,5v,4v,3v v gs =2v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs = 2.5v 3v 4.5v 10v v gs =1.5v v gs =1.8v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 i dr , reverse drain current(a) v sd , source-drain voltage(v) static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 024681 0 0 tj=25c tj=150c drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =15a r dson @ tj=25c : 60m typ v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =15a
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 6/10 MTA65N15H8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss normalizedthreshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 1020304050 total gate charge---qg(nc) v gs , gate-source voltage(v) v ds =80v v ds =50v i d =10a maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s 1s r ds( on) limit t c =25c, tj=175, v gs =10v r jc =2.5c/w, single pulse maximum drain current vs case temperature 0 5 10 15 20 25 25 50 75 100 125 150 175 200 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =2.5c/w
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 7/10 MTA65N15H8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 10 20 30 40 50 60 70 0246810 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v single pulse maximum power dissipation 0 500 1000 1500 2000 2500 3000 3500 4000 4500 5000 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j(max) =175c t c =25c jc =2.5c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc(t) =r(t)*r jc 2.duty factor, d=t1/t2 3.t jm -t c =p dm *r jc (t) 4.r jc =2.5c/w
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 8/10 MTA65N15H8 cystek product specification reel dimension carrier tape dimension pin #1
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 9/10 MTA65N15H8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c739h8 issued date : 2014.02.11 revised date : page no. : 10/10 MTA65N15H8 cystek product specification dfn5 6 dimension marking : 8-lead dfn5 6 plastic package cys package code : h8 date code device name a65 n15 millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.900 1.000 0.035 0.039 k 1.190 1.390 0.047 0.055 a3 0.254 ref 0.010 ref b 0.350 0.450 0.014 0.018 d 4.944 5.096 0.195 0.201 e 1.270 typ. 0.050 typ. e 5.974 6.126 0.235 0.241 l 0.559 0.711 0.022 0.028 d1 3.910 4.110 0.154 0.162 l1 0.424 0.576 0.017 0.023 e1 3.375 3.575 0.133 0.141 h 0.574 0.726 0.023 0.029 d2 4.824 4.976 0.190 0.196 10 12 10 12 e2 5.674 5.826 0.223 0.229 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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