applications note:SY7104 high efficiency 6v, 4a, 1mhz step up regulator SY7104 rev. 0.9b silergy corp. confidential- prepared for customer use only 1 general description SY7104 is a high efficiency, current-mode control boost dc to dc regulator with an integrated 90m ? r ds(on) n-channel mosfet. the fixed 1mhz switching frequency and internal compensation reduc e external component count and save the pcb space. th e build-in internal soft start circuitry minimizes th e inrush current at start-up. ordering information temperature code optional spec code SY7104 ( ) package code temperature code optional spec code SY7104 ( ) package code temperature range: - 40c to 85c features wide input range: 2-6v 1mhz switching frequency minimum on time: 100ns typical minimum off time: 100ns typical max output voltage: 6v internal 4a switch internal soft start over temperature protection over current protection low r ds(0n) : 90m ? typical rohs compliant and halogen free compact package: dfn 3 3-10 applications 1-cell li-ion battery powered applications portable devices typical applications figure 1. schematic diagram figure 2. efficiency vs load current ordering number package type note SY7104dbc dfn 33-10 4a s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for internal use only 2 pinout ( top view) nc fb nc lx lx nc vdd nc en nc 12 3 4 5 6 7 8 9 10 gnd 11 (dfn3 3-10 ) top mark: el xyz ( device code: el , x=year code, y=week code, z= lot number code ) ` pin name pin number pin description nc 1,3,6, 8,10 no connection. gnd 11 ground pin. lx 4,5 phase node. connect an inductor across the p ower input and this pin. fb 2 feedback pin. connect a resistor r1 between v out and fb, and a resistor r2 across fb and gnd to program the output voltage: v out =0.6v (r1/r2+1) en 9 enable control. pull high to turn on. do not l eave it floating. vdd 7 ic power supply input absolute maximum ratings (note 1) fb pin--------------------------------------------- --------------------------------------------------- -------------------- -0.3v to 4v all other pins------------------------------------- --------------------------------------------------- -------------------- -0.3v to 7v power dissipation, p d @ t a = 25c dfn 33-10 , ------------------------------------------------- ----------------------2.6w package thermal resistance (note 2) ja --------------------------------------------------- --------------------------------------------------- -----------38c/w jc --------------------------------------------------- --------------------------------------------------- ------------ 8c/w junction temperature range ------------------------ --------------------------------------------------- ----------- -40 to 150c lead temperature (soldering, 10 sec.) ------------- --------------------------------------------------- ------------------- 260c storage temperature range ------------------------- --------------------------------------------------- -------- - 65c to 150c dynamic lx voltage in 50ns duration --------------- --------------------------------------------------- --------------- vin+3v recommended operating conditions (note 3) fb pin--------------------------------------------- --------------------------------------------------- ------------------ -0.3v to 3.6v vdd pin-------------------------- ----------------- --------------------------------------------------- ---------------------- 2v to 6v all other pins-------------------------- ---------- --------------------------------------------------- ----------------------- 0v to 6v junction temperature range ------------------------ --------------------------------------------------- --------- -40c to 125c ambient temperature range ------------------------- --------------------------------------------------- ---------- - 40c to 85c s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for internal use only 3 block diagram s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for internal use only 4 electrical characteristics (v in = 3v, v out =5v, i out =1a, t a = 25c unless otherwise specified) parameter symbol test conditions min typ max unit input voltage range v in 2 6 v quiescent current i q v fb =0.66v 100 a shutdown current i shdn en=0 10 a low side main fet r on r ds(on) 90 m ? main fet current limit i lim 4 a switching frequency f sw 1 mhz feedback reference voltage v ref 0.588 0.6 0.612 v vdd uvlo rising threshold v in _ uvlo 1.9 v uvlo hysteresis v uvlo _ hys 0.1 v thermal shutdown temperature t sd 150 c en rising threshold v enh 1.5 v en falling threshold v enl 0.4 v en pin input current i en 0 100 na note 1 : stresses beyond the absolute maximum ratings ma y cause permanent damage to the device. these are stress ratings only. functional operation of the de vice at these or any other conditions beyond those indicated in the operational sections of the specification is not im plied. exposure to absolute maximum rating conditio ns for extended periods may affect device reliability. note 2 : ja is measured in the natural convection at ta = 25 c on a low effective single layer thermal conductivity test board of jedec 51-3 thermal measu rement standard. test condition: device mounted on 2 x 2 fr-4 substrate pcb, 2oz copper, with minimum recomm ended pad on top layer and thermal vias to bottom l ayer ground plane. note 3: the device is not guaranteed to function outside it s operating conditions s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for internal use only 5 typical performance characteristics s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for internal use only 6 v lx (2v/div) i l (2a/div) time(400ns/div) output ripple (v in =3.3v, v out =5v,i o =1.5a) ?v out (ac) (50mv/div) v lx (2v/div) i l (1a/div) time(400ns/div) output ripple (v in =3.3v, v out =5v,i o =0.75a) ?v out (ac) (50mv/div) v lx (2v/div) i l (1a/div) time(4us/div) output ripple (v in =3.3v, v out =5v,i o =0.15a) ?v out (ac) (50mv/div) s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for customer use only 7 applications information because of the high integration in SY7104, the application circuit based on this regulator ic is r ather simple. only input capacitor c in , output capacitor c out , inductor l and feedback resistors (r 1 and r 2 ) need to be selected for the targeted applications. feedback resistor divider r 1 and r 2 choose r 1 and r 2 to program the proper output voltage. to minimize the power consumption under light load, it is desirable to choose large resistance values f or both r 1 and r 2 . a value between 10k and 1m is recommended for both resistors. if r 1 =200k is chosen, then r 2 can be calculated to be: 1 2 out 0.6r r ( ) v 0.6 = w - input capacitor c in the ripple current through input capacitor is calcu lated as: in out in cin_rms sw out v (v v ) i (a) 2 3 l f v - = to minimize the potential noise problem, place a typical x5r or better grade ceramic capacitor reall y close to the vdd and gnd pins. care should be taken to minimize the loop area formed by c in , and vdd/gnd pins. in this case a 22uf low esr ceramic capacitor is recommended. output capacitor c out the output capacitor is selected to handle the outp ut ripple noise requirements. both steady state ripple and transient requirements must be taken into account w hen selecting this capacitor. for the best performance, it is recommended to use x5r or better grade ceramic capacitor with 10v rating and more than two 22uf capacitors. boost inductor l there are several considerations in choosing this inductor. 1) choose the inductance to provide the desired ripple current. it is suggested to choose the rippl e current to be about 40% of the maximum average input current. the inductance is calculated as: 2 in out in out sw out_max v (v v ) l (h) v f i 40% - ? ? = ? ? ? ? where f sw is the switching frequency and out_max i is the maximum load current. SY7104 regulator ic is less sensitive to the ripple current variations. consequently, the final choice of inductance can be slightly off the calculation valu e without significantly impacting the performance. 2) the saturation current rating of an inductor must be selected to guarantee an adequate margin to the peak inductor current under full load conditions. 2 out in out in sat_min out_max in out sw v v (v v ) i i v v 2 f l - ? ? ? ? > + ? ? ? ? ? ? ? ? 3) the dcr of the inductor and the core loss at the switching frequency must be low enough to achieve the desired efficiency requirement. it is desirable to choose an inductor with dcr<10m w to achieve a good overall efficiency. enable operation pulling the en pin low (<0.4v) will shut down the device. during the shut down mode, the SY7104 shut down current drops to lower than 10 a. driving the en pin high (>1.5v) will turn on the ic again. rectifier diode selection schottky diode is a good choice for high efficiency operation because of its low forward voltage drop a nd fast reverse recovery. the maximum current rating o f the diode must be higher than maximum input current . and the average current rating of the diode must be higher than the output current. fb gnd r 1 r 2 v out s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for customer use only 8 layout design the layout design of SY7104 regulator is highly simplified. to achieve a higher efficiency and bett er noise immunity, following components should be placed close to the ic: c in , l, r 1 and r 2 . 1) it is desirable to maximize the pcb copper area connecting to gnd pin to achieve a better thermal performance and noise immunity. if the board space allowed, a designated ground plane layer is highly recommended. 2) c in must be close to vdd and gnd pins. the loop area formed by c out , lx and gnd pins must be minimized. 3) the pcb copper area associated with lx pin must be minimized to improve the noise immunity. 4) the components r 1 and r 2 , and the trace connecting to the fb pin must not be adjacent to th e lx node on the pcb layout to minimize the noise coupling to fb pin. 5) if the system chip interfacing with the en pin h as a high impedance state at shutdown mode and the vdd pin is connected directly to a power source such as a li-ion battery, it is desirable to add a pull down 1m ? resistor across the en and gnd pins to prevent the noise from falsely turning on the regulator at shut down mode. s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for customer use only 9 dfn3 x 3-10 package outline top view pcb layout (recom mended) side view detail a pin1 identifier: two options bottom view notes: all dimensions are in millimeters and exclu de mold flash & metal burr. s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
SY7104 SY7104 rev0.9b silergy corp. confidential- prepared for customer use only 10 reel size reel width taping & reel specification 1. dfn3x3-10 taping orientation feeding direction 2. carrier tape & reel specification for packages package types tape width (mm) pocket pitch(mm) reel size (inch) reel width(mm) trailer length(mm) leader length (mm) qty per reel dfn3x3 10 8 13" 12.4 400 400 5000 3. others: na 3.9/4.1 1.45/1.55 11.7/12.3 s i l e r g y c o r p . c o n f i d e n t i a l - p r e p a r e d f o r c o n t e c free datasheet http://www.0pdf.com
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