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september 2009 doc id 10163 rev 3 1/167 1 stv8247, stv8257, stv8277, stv8287 digital audio decoder/processors for a2 and nicam television/video recorders features full-automatic multi-standard demodulation ? b / g / i / l / m / n / d / k standards ? mono am and fm ? fm 2-carrier (german and korean zweiton) and nicam multi-channel capability ? 3 i2s digital inputs, s/pdif (pass-thru/out) ? 1 i2s digital output (shared with one of the i2s digital inputs) ? 5.1 analog outputs ?dolby ? pro logic ? and dolby ? pro logic ii ? sound processing: loudspeaker ? st royalty-free processing: st widesurround tm , st omnisurround tm (virtual dolby ? ? surround and virtual dolby ? ? digital compliant) and st dynamic bass tm ?srs ? ? wow tm , srs ? ? trusurround xt tm (virtual dolby ? ? surround and virtual dolby ? ? digital compliant) ? independent volume/balance ? svc (smart volume control), 5-band equalizer and loudness sound processing: headphone ? svc (smart volume control), bass-treble, loudness and srs ? ? trubass tm ? independent volume/balance analog audio matrix ? 4 stereo inputs and 3 stereo outputs ? thru mode ?2 v rms capability audio delay for audio video synchronization ? embedded stereo delay up to 90 ms when processing at 32khz (demodulator input mode) and up to 60 ms when processing at 48khz (scart only input mode) ? independent delay on headphone and loudspeaker channels description the stv82x7 family, based on audio dsps (digital signal processors), performs high quality and advanced dedicated digital audio processing.the stv82x7 devices provide all of the necessary resources for automatic detection and demodulation of analog audio transmissions for european and asian terrestrial tv broadcasts. virtual or true, multi-channel capabilities and easy digital links make them ideal for digital audio low cost consumer applications. starting from enhanced stereo up to independent control of 5 loudspeakers and a subwoofer (5.1 channels), the stv82x7 family offers standard and advanced features plus sound enhancements, spatial and virtual effects to enhance television viewer comfort and entertainment. ? s tv 8 2 x 7 www.st.com
contents stv8247, stv8257, stv8277, stv8287 2/167 doc id 10163 rev 3 contents 1 general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 stv82x7 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.1 core features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 software information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.2.1 device input modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.2.2 electrical features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.3 typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2 system clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 digital demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 sound if signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2 demodulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 digital signal processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 back-end processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2 audio processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 st widesurround . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.4 st omnisurround . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.5 dolby pro logic ii decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.6 bass management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.7 bass management configuration 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.8 bass management configuration 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.9 bass management configuration 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.10 bass management configuration 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.11 bass management configuration 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.12 srs wow and trusurround xt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.13 srs trusurround . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.14 srs wow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.14.1 srs 3d mono/stereo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
stv8247, stv8257, stv 8277, stv8287 contents doc id 10163 rev 3 3/167 5.14.2 srs dialog clarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.14.3 srs trubass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.15 svc (smart volume control) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.16 st dynamic bass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.17 5-band audio equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.18 bass/treble control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.19 automatic loudness control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.20 volume/balance control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.21 soft mute control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.22 beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.23 internal audio/video delay (lip sync) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.24 analog audio matrix (input/output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6 i2s interface (input/output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 6.1 i2s inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 6.2 i2s output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7 s/pdif input/output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 8 power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 8.1 standby mode (loop-through mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 8.2 power on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 9 additional controls and flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 9.1 headphone detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 9.2 irq generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 9.2.1 i2c bus expander . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 10 stv82x7 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 11 i2c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 11.1 i2c address and protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 11.2 start-up and configuration change procedure . . . . . . . . . . . . . . . . . . . . . 44 11.3 process flow during patch loading and dsp initialization . . . . . . . . . . . . . 47 11.4 input configuration change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
contents stv8247, stv8257, stv8277, stv8287 4/167 doc id 10163 rev 3 12 register list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 12.1 i2c register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 12.2 stv82x7 general control registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 12.3 clocking 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 12.4 demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 12.5 demodulator channel 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 12.6 demodulator channel 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 12.7 nicam registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 12.8 stereo mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 12.9 analog control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 12.10 dsp control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 12.11 automatic standard recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 12.12 audio preprocessing and selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 12.13 matrixing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 12.14 audio processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 12.15 5-band equalizer/bass-treble for loudspeakers . . . . . . . . . . . . . . . . . . . 120 12.16 headphone bass-treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 12.17 volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 12.18 beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 12.19 mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 12.20 s/pdif . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 12.21 headphone configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 12.22 dac control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 12.23 autostandard coefficients settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 13 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 14 application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 15 system clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 16 input/output groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 17 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 17.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
stv8247, stv8257, stv 8277, stv8287 contents doc id 10163 rev 3 5/167 17.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 17.3 power supply data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 17.4 crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 17.5 analog sound if signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 17.6 sif to i2s output path characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 17.7 scart to scart analog path characteristics . . . . . . . . . . . . . . . . . . . 158 17.8 scart and mono in to i2s path characteristics . . . . . . . . . . . . . . . . . 159 17.9 i2s to ls/hp/sub/c path characteristics . . . . . . . . . . . . . . . . . . . . . . . . 159 17.10 i2s to scart path characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 17.11 mute characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 17.12 digital i/os characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 17.13 i2c bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 17.14 i2s bus interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 18 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 18.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 19 order information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 20 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
general description stv8247, stv8257, stv8277, stv8287 6/167 doc id 10163 rev 3 1 general description the stv82x7 is a multi-standard tv s ound demodulator and audio processor which integrates srs ? ? wow tm , srs ? ? trusurround xt tm , dolby ? ? pro logic ? ? dolby ? ? pro logic ii ? ? virtual dolby ? ? surround (vds) and virtual dolby ? ? digital (vdd) capability. st advanced algorithms such as st omnisurround tm , st widesurround tm , st dynamic bass tm are also available in this audio sound processor. st omnisurround tm is a certified dolby ? ? algorithm for the virtual dolby ? ? digital (vdd) and the virtual dolby ? ? surround (vds). when using vdd or vds, either a dolby ? ? digital or a pro logic ? ? (or pro logic ii ? ) decoder is mandatory respectively. this chip performs automatic multi-standard analog tv stereo sound identification and demodulation (no specific i2c programming is required). it offers various audio processing functions such as equalization, loudness, beeper, volume, balance, and surround effects. it provides a cost-effective solution for analog and digital tv designs. the stv82x7 is perfectly suited to current and future digital tv platforms, based on audio/video digital chips (std2000, dtv100 platform) which include an internal digital decoder (mpeg, dolby ? ? digital...). in the case where a dolby ? ? digital decoder is embedded in the audio/video digital chip, virtual dolby ? ? digital can be obtained. for the ctv100/120 platforms, this device is offered as an alternative solution to the first- generation chassis that uses the stv82x6 table 1. stv82x7 version list stv8247 stv8257 stv8277 stv8287 s t v 8 2 4 7 d s t v 8 2 4 7 d s x s t v 8 2 5 7 d s t v 8 2 5 7 d s x s t v 8 2 5 7 s x s t v 8 2 7 7 d s t v 8 2 7 7 d s x s t v 8 2 8 7 d demodulation fm 2 carrier a nd nicam xxxxxxx x multi-channel capabilities analog loudspeakers output number 2.1 2.1 2.1 2.1 2.1 5.1 5.1 5.1 i2s in (exclusive with i2s out) 1 1 3 3 3 3 3 3 s/pdif (pass-thru or output) 1 1 1 1 1 1 1 1 virtual dolby? surround x x x x x x vds plii virtual dolby ? ? digital capability (1) xxxxx x
stv8247, stv8257, stv8277, stv8287 general description doc id 10163 rev 3 7/167 1.1 stv82x7 overview 1.1.1 core features single audio source processing: ? if source and/or analog stereo input (scart) ? one digital source with a maximum of 6 synchronous channels (5.1 is obtained across three i2s) sif input signal with agc (automatic gain control) digital demodulator with automatic standard detection and demodulation for am, fm mono, fm 2 carriers (german or korean fm 2-carrier) and nicam audio processor working at 32 khz, 44.1 khz or 48 khz with specific features: ? for loudspeakers (l, r, l s , r s , subw, c): dolby ? pro logic ii ? decoder with bass management srs ? wow tm or trusurround xt tm including virtual dolby ? surround and virtual dolby ? digital st widesurround tm st omnisurround tm st dynamic bass tm 5-band equalizer or bass-treble dolby ? ? pro logic ? ? (dpli) or dolby ? ? pro logic ii ? ? (dplii) dpli (intern al) dpli (intern al) dpli (inter nal) dpli (intern al) dpli dpli dplii audio processing srs ? ? wow tm (wow) srs ? ? trusurround xt tm xxxx st voice tm , st dynamic bass tm xxxxxxx x st widesurround tm , st omnisurround tm (2) xxxxxxx x 1. dolby ? ? digital bypass capability or virtual dolby ? ? digital are obtained with the use of an external dolby ? ? digital decoder (for example std2000). 2. when using virtual dolby ? ? digital or virtual dolby ? ? surround with st omnisurround tm or srs? trusurround xt tm a dolby ? ? digital or a pro logic ? ? (or pro logicii ? ) decoder is mandatory. table 1. stv82x7 version list (continued) stv8247 stv8257 stv8277 stv8287 s t v 8 2 4 7 d s t v 8 2 4 7 d s x s t v 8 2 5 7 d s t v 8 2 5 7 d s x s t v 8 2 5 7 s x s t v 8 2 7 7 d s t v 8 2 7 7 d s x s t v 8 2 8 7 d
general description stv8247, stv8257, stv8277, stv8287 8/167 doc id 10163 rev 3 loudness svc (smart volume control) volume/balance/soft-mute beeper video processing delay compensation ? for headphone: srs ? trubass tm svc (smart volume control) bass-treble loudness volume/balance/soft-mute beeper video processing delay compensation shared outputs for headphone and loudspeakers surround channels: analog matrix with: ? five external inputs: four scart inputs (2 v rms capable) one analog mono input (0.5 v rms ) ? one internal input from a digital matrix via a dac ? three external outputs (2 v rms capable) ? one internal output for the digital matrix (using an internal adc) digital matrix with: ? three input modes (demodulator/scart, scart only and i2s) ? three stereo outputs (loudspeakers, headphone and scart) high-end audio dac s/pdif pass-thru/output for connection with an external amplifier/decoder internal multiplexer for the s/pdif output (to share the internal s/pdif output and the s/pdif output generated by the external decoder of the digital broadcast) specific stand-by mode (loop-through) control by i2c bus (two i2c addresses) system pll and clock generation using either a single quartz oscillator or a differential clock input 1.2 software information the different software combinations are listed in ta bl e 2 . table 2. input/output software configurations input (number of channels) output (number of channels) 2 (+1) 4 (+1) 5 (+1) 1 st widesurround tm or srs ? ? wow tm
stv8247, stv8257, stv8277, stv8287 general description doc id 10163 rev 3 9/167 note: 1 in addition to the above sound processing, it is always possible to add st voice and also st dynamic bass algorithms. 2 the srs ? trusurround ? and st omnisurround tm are approved by dolby ? as virtual dolby ? surround (vds) and virtual dolby ? digital (vdd). the srs ? ? trusurround xt tm system is composed of: srs ? ? trusurround srs ? ? wow tm the srs ? ? wow tm system includes: srs ? ? 3d mono/stereo tm srs ? ? dialog clarity tm srs ? ? trubass tm 1.2.1 device input modes demodulator only mode (with output f s = 32 khz) demodulator and scart mode (with output f s = 32 khz) scart only mode (with output f s = 48 khz) i2s mode (with output f s = 32, 44.1 or 48 khz) external audio input interface using 3 x i2s (for decoded streams such as dolby? digital and/or standard stereo streams) 2 (l and r) st widesurround or srs ? ? wow tm 2 (l t and r t ) st widesurround tm or srs ? ? trusurround xt tm or st omnisurround tm or dolby ? ? pro logic ? ? + srs ? ? trusurround xt tm or dolby ? ? pro logic ? ? + st omnisurround tm dolby ? ? pro logic ? 4 (+1) srs ? ? trusurround xt tm or st omnisurround tm or downmix no processing 5 (+1) srs ? ? trusurround xt tm or st omnisurround tm or downmix downmix no processing table 2. input/output software configurations (continued) input (number of channels) output (number of channels) 2 (+1) 4 (+1) 5 (+1)
general description stv8247, stv8257, stv8277, stv8287 10/167 doc id 10163 rev 3 1.2.2 electrical features multi power supply: 1.8 v, 3.3 v and 8 v. power consumption: lower than 1 w in functional mode (full features) 200 mw in loop-through mode corresponding to switch-off of all digital blocks 1.3 typical applications the stv82x7 is specified to enable flexible, analog and digital tv chassis design (refer to figure 1 , figure 2 and figure 3 ). the main considerations are: all necessary connections between devices can be provided through the tv set, pseudo stand-by mode used to copy to vcr or the dvd sources when the tv set is off, possible application compatibility with stv82x6 (tqfp80 package) tv design, pin-to-pin compatibility with stv82x8 (tqfp80 package) tv design. the stv82x7 is used to process a single audio source (analog or digital). however, it is possible to process two audio sources simultaneously using an stv82x7 interconnection (two chips can be easily connected). in the case of a single audio source, it is possible to hear and record in the same time: the same audio stream can be simultaneously output on headphone, loudspeakers, s/pdif and the scart connectors. note: headphone and loudspeakers can be used simultaneously for dual-language purposes or for different sound settings (for example, volume). in this case, certain restrictions occur (see section 5.2: audio processing ). for more connections, the scart-to-scart path can be used. the use of these full analog paths implies that the sound is not digitally processed.
stv8247, stv8257, stv8277, stv8287 general description doc id 10163 rev 3 11/167 figure 1. stv8247 typical application (analog virtual sound) figure 2. stv8257 typical application (digital: virtual sound) or tuner stv8247dsx multi-standard demodulation sound processing - volume, balance, 5-band equalizer left right - fm 2-carrier and nicam - srs ? trusurround xt tm r subw l - virtual dolby ? surround 1 - st omnisurround tm 1. when using vds with st omnisurround tm or srs trusurround xt tm , a pro logic ? decoder is mandatory. or tuner stv8257dsx multi-standard demodulation audio processing - volume, balance, 5-band equalizer - srs ? trusurround xt tm - virtual dolby ? surround 1 multi-channel digital decoder left right i2s - fm 2-carrier and nicam s/pdif pass-thru - virtual dolby ? digital 2 r subw l (dolby ? digital) - st omnisurround tm 1. when using vds with st omnisurround tm or srs trusurround xt tm , a pro logic ? decoder is mandatory. 2. when using vdd with st omnisurround tm or srs trusurround xt tm , a dolby ? digital decoder is mandatory.
general description stv8247, stv8257, stv8277, stv8287 12/167 doc id 10163 rev 3 figure 3. stv8277 typical application (digit al tv: multi-channel and virtual sound) or tu n e r stv8277dsx multi-standard demodulation audio processing - volume, balance, 5-band equalizer - srs ? trusurround xt tm - virtual dolby ? surround 1 multi-channel digital decoder left right i2s - fm 2-carrier and nicam s/pdif pass-thru - virtual dolby ? digital 2 r subw l (dolby ? digital) - st omnisurround tm 1. when using vds with st omnisurround tm or srs trusurround xt tm m , a pro logic ? decoder is mandatory. 2. when using vdd with st omnisurround tm or srs trusurround xt tm , a dolby ? digital decoder is mandatory.
stv8247, stv8257, stv8277, stv8287 system clock doc id 10163 rev 3 13/167 2 system clock the system clock integrates 2 independent frequency synthesizers. the first frequency synthesizer can be used in one of two modes: in mode 1, it is used by the demodulator, and the frequency is 49.152 mhz. in mode 2, it is used by the i2s input and is synchronous with the input frequency (f s = 32, 44.1 or 48 khz) and the frequency is 49.152 mhz (for f s = 32 or 48 khz) or 45.1584 mhz (for f s = 44.1 khz). the second frequency synthesizer is used by the dsp core and can be adjusted between 100 and 150 mhz depending on the application (around 106 mhz at reset value). in i2s output mode, clocks are generated by synthesizer 1. the default values are designed for a standard 27 mhz reference frequency provided by a stable single crystal or an external differential clock signal (for example, from the stv35x0) depending on the clk_sel pin configuration (clk_sel = 1 means a single crystal, 0 means an external differential clock). the 27 mhz value is the recommended frequency for minimizing potential rf interference in the application. the sinusoidal clock frequency, and any harmonic products, remain outside the tv picture and sound ifs (pif/sif) and band-i rf. note: a change in the reference frequency is compatible with other default i2c programming values, including those of the built-in automatic standard recognition system.
digital demodulator stv8247, stv8257, stv8277, stv8287 14/167 doc id 10163 rev 3 3 digital demodulator the digital demodulator (see figure 4 ) is composed of two channels. the first channel demodulates an fm or an am signal. the se cond channel demodulates fm 2-carrier or nicam signals (stereo demodulation). all channel parameters are programmed automatically by the built-in automatic standard recognition system (autostandard) in order to find the correct sound standard. channels can also be programmed manually via the i2c interface for very specific standards not included among the known standards. figure 4. demodulator block diagram 3.1 sound if signal the analog sound carrier if is connected to the stv82x7 via the sif pin. before adc (analog-to-digital conversion), an agc (automatic gain control) is performed to adjust the incoming if signal to the full scale of the adc. a preliminary video rejection is recommended to optimize conversion and demodulation performances. the agc system provides a gain value allowing for a wide range of sif input levels and is activated for all standards, except l/l?. in this particular case, the sound carrier is am-modulated and an automatic level adjustment would only damage the transmitted audio signal. a preset i2c parameter is provided to define the gain of the agc used in manual mode (registers agc_ctrl and agc_gain ). note: for optimum am demodulation performance, it is recommended to use the mono input. mixer mixer dco2 + channel filter fir1 channel filter fir2 am demodulator fm demodulator fm demodulator dqpsk demodulator autostd agc control sif nicam decoder dco1+ zweiton a/d nicam l nicam r am/fm mono am fml fm stereo autostd_ctrl (8ah) autostd_standard_detect (8bh) autostd_stereo_detect (8ch) autostd_status (8eh) demod_stat(0dh) zwt_stat (42h) nicam_stat(3fh) caroffset1 (22h) caroffset2 (3ah) channel 1 = mono left channel 2 = stereo/mono right agc_ctrl (0eh) agc_gain (0fh) (to sound preprocessing) (to sound preprocessing) (to sound preprocessing) decoder agc amp autostd_timers (8dh)
stv8247, stv8257, stv8277, st v8287 digital demodulator doc id 10163 rev 3 15/167 3.2 demodulation the demodulation system operates by default in automatic mode. in this mode, the stv82x7 is able to identify and demodulate any tv sound standard including nicam and a2 systems (see ta bl e 3 ) without any external control via the i2c interface. it consists of the two demodulation channels (channel 1 = mono left and channel 2 = mono right/stereo) to simultaneously process two sound carriers in order to handle all transmission modes (stereo and up to three mono languages). the built-in automatic standard recognition system (autostandard) automatically programs the appropriate bits in the i2c registers which are forced to read-only mode for users (see section 12.1 ). the programming is optimized for each standard to be identified and demodulated. each mono and stereo standard can be removed (or added) from the list of standards to be recognized by programming registers autostd_standard_detect and autostd_stereo_detect , respectively. the identified standard is displayed in register autostd_status and any change to standard is flagged to the host system via pin irq. this flag must be reset by re-programming the msbs of register autostd_ctrl while checking the detected standard st atus by reading registers autostd_status , nicam_stat and zwt_stat . moreover, the detection of stereo mode during demodulation is also flagged in register autostd_status . important : l/l? and d/k standards cannot be automatically processed because the same frequency is used for the mono carrier. an exclusive l/dk selection must programmed in register autostd_ctrl . this may be externally controlled by detecting the rf modulation sign, which is negative for all tv standards except l/l?. to recover out-of standard fm deviations or the sound carrier frequency offset, additional i2c controls are provided without interfering with the automatic standard recognition system (autostandard). dk-nicam overmodulation recovery : four different fm deviation ranges can be selected (via register autostd_ctrl ) for the dk standard while the autostandard system remains active. the maximum fm deviation is 500 kh z in dk mono mode and 350 khz in dk nicam mode (limited by overlapping fm and nicam spectrum values). the demodulated signal peak level (proportional to the fm deviation) is detected by the peak detector and written to registers peak_det_l and peak_det_r . this value is used to implement automatic overmodulation detection via an external i2c control. important : only the selection of the 50 khz fm deviation standard is compatible with the other dk-a2* standards (dk1, dk 2 or dk3). these standards must be removed from the list of standards (registers autostd_standard_detect and autostd_standard_detect ) when programming larger fm deviations reserved only for dk-nicam standards. table 3. recognized standards syste m sound type type name carrier 1 (mhz) carrier 2 (mhz) fm deviation de- emphasi s roll -off (%) pilot freq. (khz) nom . max. over b/g fm mono 5.5 fm/nicam 5.5 5.850 27 50 80 j17 40 fm 2-carrier a2 5.5 5.742 27 50 80 50 s 54.6875
digital demodulator stv8247, stv8257, stv8277, stv8287 16/167 doc id 10163 rev 3 for chinese tv transmissions (dk-nicam) whic h are subject to overmodulation, different fm deviations are proposed for sound demodulation. sound carrier frequency offset recovery: both mono and stereo if carrier frequencies can be adjusted independently (registers caroffset1 and caroffset2 ) within a large range (up to 120 khz for standard mono fm deviations) while the automatic standard recognition system remains active. the frequency offset estimation is written in registers dc_removal_l and dc_removal_r (mono left / channel 1 and mono right / channel 2, respectively) and can be used to implement the automatic frequency control (afc) via an external i2c control. manual mode: if required, the automatic standard recognition system system can be disabled (manual mode) and the user can contro l all registers including those only controlled by the automatic standard recognition system function when active. manual mode is selected in register autostd_standard_detect (bit ldk_sck, i_sck, bg_sck and mn_sck set to 0). d/k fm mono 6.5 fm/nicam 6.5 5.850 27 50 80 j17 40 d/k1 fm 2-carrier a2* 6.5 6.258 50 s 54.6875 d/k2 fm 2-carrier a2* 6.5 6.742 50 s 54.6875 d/k3 fm 2-carrier a2* 6.5 5.742 50 s 54.6875 i fm mono 6.0 fm/nicam 6.0 6.552 27 50 80 j17 100 l am/nicam 6.5 5.850 j17 40 m/n fm mono 4.5 15 27 50 75 s fm 2-carrier a2+ 4.5 4.724 15 27 50 75 s 55.069 table 3. recognized standards (continued) syste m sound type type name carrier 1 (mhz) carrier 2 (mhz) fm deviation de- emphasi s roll -off (%) pilot freq. (khz) nom . max. over
stv8247, stv8257, stv8277, stv8287 block diagram doc id 10163 rev 3 17/167 4 block diagram figure 5. block diagram ls_c ls_sub output analog audio matrix input analog audio matrix audio a/d i2c interface clock generator stereo audio dac headphone volume, balance, loudness, smart volume control, loudspeakers volume, equalizer, balance, st widesurround, st dynamic bass, loudness,smart volume control, digital audio matrix pre-scaler control logic agc digital fm/am nicam fm 2-carrier irq detection sc1_in_l ls_l headphone hp_lss_l scl sda sif s/pdif in bass management, beeper srs? wow? or trusurround xt? digital audio processing bass/treble, srs? trubass? demodulation stereo audio dac stereo audio dac a/d 2 vrms 2 vrms 2 vrms digital audio processing mono_in sc1_in_r sc2_in_l sc2_in_r sc3_in_l sc3_in_r sc4_in_l sc4_in_r clk_sel xtalin xtalout sc1_out_l sc1_out_r sc2_out_l sc2_out_r sc3_out_l sc3_out_r hp_lss_r ls_r dolby? pro logic? i2c dolby? pro logic ii?, st omnisurround, s/pdif out stereo audio dac i2s interface s_clk data_0 data_1 data_2 lr_clk pcm_clk i2s inputs/output volume balance mute matrix loudspeakers headphone/ surround scart outputs scart inputs sound if mono i
digital signal processor stv8247, stv8257, stv8277, stv8287 18/167 doc id 10163 rev 3 5 digital signal processor a dedicated dsp (digital signal processor) takes charge of all audio processing features and the low frequency signal processing features of the demodulator. the internal 24-bit architecture will ensure a high quality signal treatment and an excellent dynamic. 5.1 back-end processing the ?back-end? processing corresponds to the low frequency signal processing (32 khz or higher frequencies) of the demodulat or and other inputs (i2s, adc). figure 6 shows a flowchart of the back-end processing tasks. however, the figure shows that the processing is only a single sour ce processing flow (no processing is possible with ?demod + scart? and i2s inputs simultaneously) and that the selection of a headphone output restricts the loudspeakers configuration to 2+1 instead of 5+1 figure 6. back-end audio processing dc digital audio matrix fm channel 1 fm channel 2 nicam l de-emphasis prescale dematrix autostandard fm fm fm removal prescale i2s i2s in 1 i2s in 2 i2s in 3 dc prescale nicam removal dc prescale scart removal nicam r dematrix nicam scart l scart r src x2/x4 ?i2s? input mode downmix ls 2 hp 2 scart 2 ls 2 to 6 hp 2 scart 2 stereo peak detector: 9d, bit 7 = 0 stereo peak detector: 9d, bit 7 = 0 (l and r) (l and r) (l and r) (l,r,c,lfe,ls,rs) (l and r) (l and r) de-emphasis nicam stereo peak detector: 9d, bit 7 = 1 stereo peak detector: 9d, bit 7 = 1 ?demod + scart? or ?scart only? input modes
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 19/167 the main features depend on the path: fm channel ?dc removal ? prescaling ? de-emphasis (50 or 75 us) ? stereo dematrix nicam channel ?dc removal ? prescaling ? de-emphasis (j17) ? dematrix input scart channel ?dc rmoval ? prescaling input i2s channel ? i2s prescaling digitalaudio matrix ? audio channel multiplexer between the differ ent sources (if, i2s, scart) towards all outputs (s/pdif, ls, hp or scart). autostandard management ? device configuration depending on the standard to be detected ? freeze the device when a standard is detected ? once a standard detected, check that there is no change in the detection status ? set the correct action depending on any change in the detection status (mono backup or mute setup and new standard detection) scart ? downmixing: l t / r t or l 0 / r 0 (see ac-3 specification) ? soft mute
digital signal processor stv8247, stv8257, stv8277, stv8287 20/167 doc id 10163 rev 3 5.2 audio processing the following software is provided for main loudspeakers (l, r, c, l s , r s , subw): downmix dolby ? pro logic ii ? decoder (l t , r t l, r, c, ls, rs, subw) with bass management st widesurround tm ,, st omnisurround tm , srs ? wow tm , or srs ? trusurround xt tm , (certified virtual dolby ? surround and virtual dolby ? digital) st dynamic bass tm , svc (smart volume control) 5-band equalizer or bass-treble loudness volume with independent channels (smooth volume control) master volume control mute/soft-mute balance beeper pink noise generator (used to position the loudspeakers) programmable delay for each loudspeaker adjustable delay for ?lip sync? to compensate audio/video latency up to 60 ms in scart only mode (processing at 48 khz) and up to 90 ms in demodulator and scart mode (processing at 32 khz) the following software is provided fo r the headphone or auxiliary output: downmix srs ? trubass tm , svc (smart volume control) bass/treble loudness independent volume for each channel (smooth volume control) soft mute balance beeper adjustable delay for ?lip sync? up to 120 ms (to compensate audio/video latency) in scart only mode and up to 180 ms in demodulator and scart mode the following software is provided for scart or s/pdif outputs: downmix soft mute
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 21/167 figure 7. stv82x7 audio processing flowchart (front end) virtualiser n to 2 peak detector dc fm fm fm removal prescale deemphasis dematrix dc nicam nicam removal prescale deemphasis dc scart removal prescale i2s prescale if scart i2s noise generator l r c lfe ls rs l r c lfe ls rs l r srs tru- surround xt nicam dematrix 2 to n decoder l r ls dolby prologic i c l r c ls rs autostd r hp audio matrix for demod/scart input downmix for i2s inputs r scart l scart 90ms / l hp src x2 x4 l r c lfe ls rs r scart l scart r hp l hp st wide surround rs 60ms 90ms / 60ms
digital signal processor stv8247, stv8257, stv8277, stv8287 22/167 doc id 10163 rev 3 figure 8. stv82x7 audio processing flowchart (back end) s/pdif output scart output headphone output ls output center output subwoofer output surround output loudness bass / loudness bass/ tr e bl e tr e b l e o r 5 bands equalizer volume volume volume s s beeper 2/0 svc digital soft mute digital soft mute digital soft mute digital soft mute digital soft mute balance volume balance volume balance and 3/2 svc output select l r lfe c ls rs l hp r hp bass mgmt volume digital soft mute balance digital soft mute s/pdif copy tr u b a s s x t trubass xt r scart l scart i2s out select
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 23/167 5.3 st widesurround stv82x7 offers three preset st widesurround tm sound effects on the loudspeakers path: music, for a concert hall effect movie, for films on tv simulated stereo, which generates a pseudo-stereo effect from mono source st widesurround tm sound is an extension of the conventional stereo concept which improves the spatial characteristics of the sound. this could be done simply by adding more speakers and coding more channels into the source signal as is done in the cinema, but this approach is too costly for normal home use. the st widesurround system exploits a method of phase shifting to achieve a similar result using only two speakers. it restores spatiality by adding artificial phase differences. the surround/pseudo-stereo mode is automatically selected by the automatic standard recognition system (autostandard) depending on t he detected stereo or mono source. by default, ?movie? is selected for surround mode. this value may be changed to ?music? by the stsrnd_mode bit in the stsrnd_control register. additional user controls are provided to better adapt the spatial effect to the source. the st widesurround tm gain ( stsrnd_level ) and st widesurround tm frequency ( stsrnd_freq ) registers can be used to enhance music predominancy in music mode and theater effect and voice predominancy in movie mode. 5.4 st omnisurround stv82x7 offers a spatial virtualizer to output any multi-channel input in stereo on the loudspeakers path: st omnisurround tm will recreate a multi-channel spatial sound environment using only the left and right front speakers. it can be adapted to any input configuration (omnisrnd_input_mode). st voice tm will allow you to enhance the voice content of your program to increase the intellegibility and the presence of the sound. 5.5 dolby pro logic ii decoder dolby ? pro logic ii ? is a matrix decoder that decodes the five channels of surround sound that have been encoded onto the stereo sound tracks of dolby ? surround program material such as dvd movies and tv shows. it is even possible to decode standard stereo signals like music or non encoded movies. furthermore, it is an active process designed to enhance sound localization through the use of very high-separation decoding techniques. the dolby ? pro logic ii ? decoder is also able to emulate the former dolby ? pro logic ? decoder in a specific mode.
digital signal processor stv8247, stv8257, stv8277, stv8287 24/167 doc id 10163 rev 3 5.6 bass management this processing will generate the subwoofer signal and adjust all loudspeakers channels gain and bandwidth. speakers capable of reproducing the entire frequency range will be referred to as ?full range speakers?, then signals sent to full range speaker will be full bandwidth (no filtering). speakers that have limited bass handling capabilities will be referred to as ?satellite speakers?, then signals sent to satellite speaker will be high-pass filtered to remove bass information below 100 hz. in the stv82x7, five output configuration modes have been implemented according to ?dolby digital consumer decoder? specifications. they are described below. 5.7 bass management configuration 0 in some cases, the bass management filters are available in the decoder itself, so there is no need to reproduce these filters. the output configuration shown in figure 9 offers this possibility. figure 9. bass management configuration 0 (wit h pro logic switch indicating its reset state) r l c ls rs lfe l r c ls rs subw + -15 db -5 db pro logic off switch
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 25/167 5.8 bass management configuration 1 configuration 1, shown in figure 10 , assumes that all five speakers are not full range and that all of the bass information will be redirected to and reproduced by a single subwoofer. this configuration is intended for use with 5 satellite speakers. to prevent signal overload, the five main channels are attenuated by 15 db, while the lfe channel is attenuated by 5 db to maintain the proper mixing ratio. figure 10. bass management configuration 1 (wit h pro logic switch indicating its reset state) r l c ls rs l r c ls rs pro logic off switch -15 db
digital signal processor stv8247, stv8257, stv8277, stv8287 26/167 doc id 10163 rev 3 5.9 bass management configuration 2 configuration 2 assumes that the left and right speakers, are full range while the center and surround speakers are smaller speakers. also, all bass data is redirected to the left and right speakers. this configuration include output level adjustment that allows 12 db attenuation for the 3 smaller speakers (c, ls, rs). when the level adjustment will be disabled the decoder boosts by 12 db the full range speakers (left, right). figure 11. bass management configuration 2 (all switches indicate their reset state) subw c l r ls rs lfe l c r ls rs + + + + level adjustment off switch subwoofer on switch pro logic off switch +12 db -1.5 db -12 db +12 db -12 db -12 db -1.5 db -12 db -12 db -15 db -5 db
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 27/167 5.10 bass management configuration 3 the third configuration, shown in figure 12 , assumes that all speakers except the center are full range, then all bass information will be directed to and reproduced by the front left and front right and both surround speakers. in order to provide more flexibility to this configuration, a switch will offer an option which will produce a subwoofer channel by the lfe channel. when the subwoofer switch is off, the input channels will be attenuated by 8 db. configuration 3 is required in certain high-end products. figure 12. bass management configuration 3 (all switches indicate their reset state) c l r ls rs l c r ls rs subw lfe + + + + -4db -8db -4db -8db -4db -8db -4db -8db + + +10db +8db +4db +8db +4db +8db +4db +8db +4db +8db +4db subwoofer on switch subwoofer on switch level adjustment off switch -4db -4db -8db -8db -4.5 db
digital signal processor stv8247, stv8257, stv8277, stv8287 28/167 doc id 10163 rev 3 5.11 bass management configuration 4 this configuration implements the simplified dolby ? configuration. the center, left surround and right surround channels are summed and then filtered by the lpf. the composite bass information is either summed back into the left and right channels or summed with the lfe channel and sent to the subwoofer output, see figure 13 . figure 13. implementation of the bass management configuration 4 (sim plified configuration) 5.12 srs wow and trusurround xt the srs ? trusurround xt ? is a processing system that can accept from 1 to 6 channels on input and generate a 2-channel output signal. this processing system includes the latest srs ? algorithms: srs ? wow ? srs ? trusurround ? (multi-channel signal virtualizer) c l r ls rs l c r ls rs + + + subw lfe pro logic off switch -5db -10.5db + -4.5db subwoofer on switch
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 29/167 5.13 srs trusurround the srs ? trusurround ? is a processing system that can accept from 2 to 5 channels on input and generate a 2-channel output signal. srs ? trusurround ? uses hrtf (head-related transfer function) -based frequency tailoring of (l/r) difference signals to extend the sound image out past the physical boundaries of the speaker placements to surround channel information. these rear channel hrtf curves have much greater peak to valley differences at center frequencies. these were chosen to cause rear channel difference signals to virtualize farther behind the listener and directed to a different virtual position as compared to front channel signals. information that is equal (l+r) in the rear surround channels is processed by an identical hrtf curve but mixed in at a much lower amount. this hrtf processi ng of equal (l/r) signals was again used to virtualize information to the rear of the listener. the srs ? trusurround ? is certified by dolby laboratories to be a virtual dolby ? digital and virtual dolby ? surround. 5.14 srs wow the srs ? wow tm is an a sound processing system including: srs ? 3d mono/stereo tm srs ? dialog clarity tm srs ? trubass tm 5.14.1 srs 3d mono/stereo the srs ? 3d mono/stereo tm system is used to create a pseudo-stereo signal for mono inputs or a three-dimensional spatial signal for stereo inputs. 5.14.2 srs dialog clarity the digital clarity tm system is used to enhance dialog perception. 5.14.3 srs trubass the srs ? trubass tm audio enhancement technology provides deep, rich bass to small speaker systems without the need for a subwoofer or additional extra physical components. for systems with a subwoofer, srs ? trubass tm complements and enhances bass performance. psycho-acoustically, when the human ear is presented with a low frequency sound signal that is missing the fundamental harmonic, it will fill in the fundamental frequency based on the higher harmonics that are present. by accentuating the second and higher frequency harmonics of the bass portion of a signal, srs ? trubass tm gives the perception of greatly improved bass response. srs ? trubass tm is implemented on loudspeakers path, headphone path or on both in parallel.
digital signal processor stv8247, stv8257, stv8277, stv8287 30/167 doc id 10163 rev 3 5.15 svc (smart volume control) svc (smart volume control) regulates the audio signal level before audio processing. this regulation is necessary in order for the signal level to be independent from the source (terrestrial channels, i 2 s or scart), its modulation (am, fm or nicam) and annoying volume changes (advertising, etc.). svc works as an audio compressor/expander; that is, when the input signal exceeds the threshold level, a very rapid attenuation (-2 db/ms) is applied to rescale the signal down to the threshold value. when the input signal is below the threshold level, the previous attenuation is reduced slowly in order to retrieve the original input level (0 db gain). if the input signal is too low, an addition gain of 6 db can be provided. to personalize the action of the svc, five parameters are available: 1. threshold: maximum quasi-peak level that can be expected on output 2. peak measurement mode: selects the channel on which the peak measurement must be performed (left, right, center...) 3. release time: applies gain slope to the amplification phase 4. expander switch: allows a +6db amplification of small signals in order to reduce the output dynamic range 5. make up gain: allows compensation of the signal amplitude limitation thanks to a 0 to 24 db adjustable gain. the svc is implemented on the loudspeakers path, headphone path or on both in parallel (independent settings). also, the svc can be applied in six-channel mode (l, r, l s , r s , c and subw). 5.16 st dynamic bass stv82x7 offers dynamic bass boost processing on the loudspeakers path. st dynamic bass tm is a bass boost process that can dramatically increase the bass content of any program without any output level saturation. 3 cutoff frequencies (bass_freq) can be chosen, 100 hz, 150 hz and 200 hz to adapt the effect to your loudspeakers. the amount of bass (bass_level) can also be fine tuned in order to adapt the effect loudness. 5.17 5-band audio equalizer the loudspeakers audio spectrum is split into 5 frequency bands and the gain of each of band can be adjusted within a range from -12 db to +12 db in steps of 0.25 db. the audio equalizer may be used to pre-define frequency band enhancement features dedicated to various kinds of music or to attenuate frequency resonances of loudspeakers or the listening environment. the equalizer is enabled by the ls_eq_on bit in the ls_eq_bt_ctrl register. the gain value for band x is programmed in register eq_bandx_gain . the 5-band audio equalizer is exclusive with bas s-treble control. bit ls_eq_bt_sw in register ls_eq_bt_ctrl is used to select either the 5-band audio equalizer or the bass- treble control for the loudspeakers path. depending on the ls equalizer or ls bass-treble value, the volume level can be clamped to the ls output to prevent any possible signal clipping from occuring using the anticlip_ls_vol_clamp bit in the volume_modes (d7h) register.
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 31/167 figure 14. equalizer 5.18 bass/treble control the gain of bass and treble frequency bands for headphone can be also tuned within a range from -12 db to +12 db in steps of 0.25 db. it may be used to pre-define frequency band enhancement features dedicated to various kinds of music. the headphone bass/treble feature is enabled by setting the hp_bt_on bit in the hp_bt_control register. the bass and treble gain values are adjusted in registers hp_bass_gain and hp_treble_gain , respectively. depending on the hp bass-treble value, the volume level can be clamped to the hp output to prevent any possible signal clipping from occuring using the anticlip_hp_vol_clamp bit in the volume_modes (d7h) register. 5.19 automatic loudness control as the human ear does not hear the audio frequency range the same way depending on the power of the audio source, the loudness control corrects this effect by sensing the volume level and then boosting bass and treble frequencies proportionally to middle frequencies at lower volume. while maintaining the amplitude of the 1 khz components at an approximately constant value, the gain values of lower and higher frequencies are automatically progressively amplified up to +18 db when the audio volume level decreases.the maximum treble amplification can be adjusted from 0 db (first order loudness) to +18 db (second order loudness) in steps of 3 db. as the volume is proportional to the external audio amplification power, the loudness amplification threshold is programmable in order to tune the absolute level. the loudspeakers loudness function is enabled by setting the ls_loud_on bit in register ls_loudness . the loudspeakers loudness threshold and maximum treble gain values are also programmed in this register. the headphone loudness function is enabled by setting the hp_loud_on bit in register hp_loudness . the headphone loudness threshold and maximum treble gain values are also programmed in this register. the loudness cut-off frequency is 100 hz. 5.20 volume/balance control the stv82x7 provides a volume/balance control for all output channels configuration (except for s/pdif) with different volume level per channel (l, r, c, l s , r s , subw, scart). f 1 =100hz f 2 =330hz f 3 =1khz f 4 =3.3khz f 5 =6.6khz f 1 = 100 hz, f 2 = 330 hz, f 3 = 1 khz, f 4 = 3.3 khz and f 5 = 10 khz
digital signal processor stv8247, stv8257, stv8277, stv8287 32/167 doc id 10163 rev 3 its wide range (from +11.875 to -116 db, in a db linear scale with a 0.125 db step) largely covers typical home applications (approx. 60 db) while maintaining a good s/n ratio. figure 15. volume control an extra master volume control can apply an extra gain/attenuation on l, r, c, l s , r s and subw channels. the volume/balance control can operate in one of two different modes: in differential mode (default value), the volume control is a common volume value for both the left and right loudspeakers or headphone channels (see figure 15 ) and complimentary balance control is used (see figure 16 ). in independent mode , the volume for the left and right channels for loudspeakers or headphone is controlled independently. figure 16. differential balance note: each step is 0.25 db output gain +11.875 db -116 db mute 00h 3ffh i2c control output gain 100% mute 200h 1ffh i2c control (10 bits) 000h r i ght c hannel le ft c hannel
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 33/167 5.21 soft mute control the digital soft mute is applied smoothly (20 ms for 120 db range) to avoid any switch noise on output. it is available on all output channels pairs: s/pdif channel (left/right) scart channels (left/right) loudspeakers channels (left/right) center subwoofer headphone/surround channels (left/right) another soft mute (analog) is also available on each dac output. 5.22 beeper the beeper is used to generate a tone on the loudspeakers or headphone outputs or both. the beeper sound (square wave) is added to the audio signal which is attenuated by 20 db. the beep sound amplitude includes a smooth attack and decay to avoid any parasitic noise when starting and stopping. it can be used for various applications such as beep sounds for remote control, alarm clock or other features. the beeper operates in one of two modes: pulse mode (beep applications): a tone with a programmable short duration (0.1, 0.25, 0.5 and 1.0 s) is generated. afterwards, the beeper is automatically disabled and the output is switched back to the audio signal, see figure 17 . continuous mode (alarm application): a tone with a programmable long duration is generated. its start and stop controls must be programmed by i2c, see figure 18 . the beeper function is enabled by setti ng the beeper_on bit in register beeper_on . beeper parameters are controlled in register beeper_mode . the beeper tone level and frequency are programmed in register beeper_freq_vol . the level (or volume) ranges between 0 db and -93 db in steps of 3 db and the tone frequency ranges between 62.5 hz and 8 khz in steps of 1 octave. a beep generator is shared only by the loudspeakers or headphone outputs. therefore, in the event of simultaneous beeps when in pulse mode, only the first beep will define the effective duration that will be the same for both outputs.
digital signal processor stv8247, stv8257, stv8277, stv8287 34/167 doc id 10163 rev 3 figure 17. pulse mode figure 18. continuous mode 5.23 internal audio/video delay (lip sync) since increasing processing on the video signal implies more delay compared to the audio signal, there is a possibility inside the device of compensating by inserting a delay on the audio path in order to resynchronize the two signals: 60ms with 48 khz sampling frequency (scart only input mode) 90ms with 32 khz sampling frequency (demodulator input mode) the same delay is available for the ls or hp path or both. 5.24 analog audio matrix (input/output) the analog part of the audio matrix can be divided into two parts: the scart input matrix and the scart output matrix. figure 19. scart input matrix 62.5 hz < f < 8 khz beep_on = 1 beep_on = 0 t predefined 0.1, 0.25, 0.5 and 1.0 s 62.5 hz < f < 8 khz beep_on = 1 beep_on = 0 t defined by i2c write s1in s2in s3in mono_in 2 audio adc select digital matrix s4in
stv8247, stv8257, stv8277, st v8287 digital signal processor doc id 10163 rev 3 35/167 the scart input matrix is an input for the digital matrix (after the adc) which select which source will be sent to the dsp. figure 20. scart1/2/3 output matrix the scart output matrix selects the sound to output, which can be directly a scart input or the output of the dsp. a mute function is provided to switch off the outputs. a soft-mute function is provided to avoid all spurious sounds when switching from one position to another position. the scart 2 and 3 output matrices have the same functions as the scart 1 output matrix. the particularity of the matrix is to accept input signal of 2 v rms and to have the capability to output such level. in this case, the power supply must be 8 v. note: the mono audio input is able to accept signals with a 0.5 v rms amplitude. s1in s2in s3in stereo dac 2 s1out select or mute s4in mono_in soft mute
i2s interface (input/output) st v8247, stv8257, stv8277, stv8287 36/167 doc id 10163 rev 3 6 i2s interface (input/output) the stv82x7 offers three input/output choices: one i2s input, three i2s inputs or one i2s output. 6.1 i2s inputs the stv82x7 can interface with a digital sound decoder. in this case, the digital data can be input at a speed of 0.384 mbytes/s (3.072 mhz for a 48 khz sampling frequency with 32 bits of data). in compliance with dolby ? specifications, only the sampling frequency is subject to restrictions. all other requirements are ex tracted from other various specifications .i the pcmclk (possible clock for upsampling) is provided by the master which is the digital sound decoder. a sample rate conversion (src) will be necessary in the second case (stv82x7 slave) in order to have a fixed frequency output from this block (either 32 khz, 44.1 khz or 48 khz). note: the src function is only available in single i2s input mode. the i 2 s interface is used in two ways depending on the package: 1. the interface with one i 2 s (i2s_data0) connection (only stereo or stereo-coded dolby ? pro logic ? ); 2. one interface with three i 2 s connections connected to the dsp to allow the processing of a multi-channel signal (maximum of 6 channels). table 4. i2s characteristics sampling frequency (khz) 8, 11.025, 12,16, 22.05, 24, 32, 44.1 and 48 data size 16, 18*, 20*, 24*, 32 pcmclk 1. 512 x f s (1) (2) 1. means that the number is the number of effective bits but the transmission is with 32 bits. 2. 512 x f s is used by the dacs if 512 x f s is present.
stv8247, stv8257, stv8277, stv8287 i2s interface (input/output) doc id 10163 rev 3 37/167 figure 21. i2s block diagram note: 1 the i 2s input and output modes are exclusive (this means that the i2s_data0 can be used as input or as output). 2 simultaneous processing of i2s inputs and sif inputs and/or adc inputs (scart or mono inputs) is not possible with the device. 3 i2s_pcm_clk is not needed for the device both standard and non-standard modes are available, see figure 24 audio processing src x 2 src x 4 i2s_data0 i2s_data1 i2s_data2 fs input = 8 to 48 khz fs input = 32 to 48 khz fs input = 32 to 48 khz i2s_sclk i2s_lr_clk fs input = 32 to 48 khz fs input * 64 table 5. i2s frequency configuration i2s (max. number of channels) f s input (khz) f s output (khz) after src src use 1 (i2s_data0) 8 32.0 x 4 1 (i2s_data0) 16 32.0 x 2 33232.0no 1 (i2s_data0) 11.025 44.1 x 4 1 (i2s_data0) 22.05 44.1 x 2 3 44.1 44.1 no 1 (i2s_data0) 12 48.0 x 4 1 (i2s_data0) 24 48.0 x 2 34848.0no
i2s interface (input/output) st v8247, stv8257, stv8277, stv8287 38/167 doc id 10163 rev 3 6.2 i2s output a digital stereo output (i2s compatible) is also available for routing the demodulated signal or a converted input audio signal to an external device. in this case, the i2s_data0 signal and all clock signals are set as outputs by setting bit d6 in register reset to 1. the stv82x7 i2s drives the serial bus (sclk, lr_clk, i2s_data0) in master mode in 64.fs format with a sampling frequency (f s ) of 32 khz. the i2s_pcm_clk signal can be used as a master clock in 512.fs format if required for the slave interface. both standard and non- standard modes are available, see figure 24 . figure 22. tqfp 80 i2s output block diagram note: the i2s input and output modes are exclusive (this means that the i2s_data0 can be used as input or as output) figure 23. . i2s output selection audio processing i2s_data0 fs output = 32 khz i2s_sclk i2s_lr_clk fs output = 32 khz fs output * 64 48 khz dsp processing i2s_pcm_clk fs output * 512 ls output c/sub output srnd/hp output scart output i2s_data0 register 56h: bits[7:6]
stv8247, stv8257, stv8277, stv8287 i2s interface (input/output) doc id 10163 rev 3 39/167 figure 24. i2s data format: lch = low, rch = high (i2s input or output mode) i2s_sclk 1 2 323 24 22 msb lsb 1 2 3 23 24 22 msb lsb 1 2 1 2 3 23 24 22 msb lsb 12 323 24 22 msb lsb 12 3 1/fs lch rch i2s_lr_clk (= 64fs) i2s_datax (standard mode) i2s_datax (non-standard mode)
s/pdif input/output stv8247 , stv8257, stv8277, stv8287 40/167 doc id 10163 rev 3 7 s/pdif input/output an s/pdif output is available for connection with an external a/v decoder/amplifier. the signal on this s/pdif output is selected by an on chip multiplexer between the internal signal and an external signal present on s/pdif bypass input (pin 44) with spdif_mux bit in the dac_control register. the outputted internal signal can be selected from: l/r c/subwoofer hp or surround l/r scart l/r the external signal is for example the signal provided by an external dolby ? digital decoder (std2000). mute facility is also provided on the s/pdif output. note: the s/pdif_in pin (pin 44) is a cmos digital pin and input signals on this pin must fulfill the characteristics as mentioned in section 17.12: digital i/os characteristics on page 160 (0.5 v pp standard s/pdif input level is not directly supported by the device and needs external circuitry).
stv8247, stv8257, stv8277, stv8287 power supply management doc id 10163 rev 3 41/167 8 power supply management a mixed supply voltage environment requires the following voltages: 3.3 v capable inputs/outputs for digital pins; 1.8 v digital core; 8 v capable inputs/outputs for analog audio interfaces (capability to output 2 v rms for scart requirements); 3.3 v for stereo adc and dac (analog part); 1.8 v for stereo adc and dac (digital part); 1.8 v for if adc and agc. these voltages will be delivered by the application with an accuracy of 5% . for more information, refer to section 17.3: power supply data . other specific dc voltages or features are provided: voltage reference and biasing generation (agc, adcs, dacs), bandgap reference. 8.1 standby mode (loop-through mode) the stv82x7 provides a loop-through mode confi guration that bypasses ic functions via a scart i/o pin (full analog path only). in this case, only a minimum power of 200 mw is required. in standby mode, the digital and analog power supplies are switched off, except for pins vcc_h, vcc33_ls, vcc33_sc, and vcc_niso which are used to maintain the scart path with the last configuration programmed by analog matrixing (register scart1_2_output_ctrl and scart3_output_ctrl ). when switching back to normal full power mode, all i2c registers are reset except for those used in standby mode to maintain the original configuration. in standby mode, the i2c bus does not operate. however, the bus can still be used by other ics since the i2c i/o pins (sda and scl) of the stv82x7 are forced into a high-impedance configuration. 8.2 power on reset the following supply voltages are involved for power on reset for the stv82x7: for 1.8 v: vdd18 on pins 38, 42, 50 and 66, vcc18_clk1 on pin 54 and vcc18_clk2 on pin 57. for 3.3 v: vdd33_ioi on pin 46 and vdd33_io2 on pin 59. the first condition for a valid reset is that all 1.8 v supply voltages involved have reached a minimum valid voltage of 1.7 v and that all 3.3 v supply voltages involved have reached a minimum valid voltage of 3.1 v. when this is the case and starting from this point, the reset must be maintained at a low level (<1 v) for at least 100 s then put to a high level.
additional controls and flag stv8247, stv8257, stv8277, stv8287 42/167 doc id 10163 rev 3 9 additional controls and flag this logic contains: the headphone detection, the irq generation, signal to be output to the mcu, the i2c bus expander output pin. 9.1 headphone detection for headphone, the hp_det input can be used to automatically mute the loudspeakers and subwoofer outputs when the hp_ls_mute bit is set in register headphone_config (active low). when a headphone is detected (the hp_det pin is set to 0) and the mute function is enabled. each change on the hp_det pin generates an irq request to the microprocessor on the irq pin. 9.2 irq generation four irqs are generated by the stv82x7. on each irq generation, the irq pin is set to 1. the pending irq status must be read at the i22s address 81h and the acknowledge is done by writing 0 to this register. the four availables irqs are: irq0 : the identified tv sound standard is displayed in register autostd_status . each change in the detected standard is flagged to the host system via hardware pin irq. the flag must be reset by re-programming the irq bit in register autostd_ctrl and then checking the detected standard st atus by reading registers autostd_status , nicam_stat , and zwt_stat . irq1 : this irq is enabled only in digital input mode. in case of i 2 s synchronisation loss, this irq is set to 1. irq2 : this irq is set to 1 when the device detects any change on the hp detection pin (headphone connection or deconnection). irq3 : on the stv82x7, same pins are used for both headphone and surround loudspeaker signal output. a change in the headphone configuration (hp active or not active) will lead to a signal switch on those hardware pins. in or der to ensure a smooth audio transition, the output is soft muted before the signal is switched. the irq3 is then set to 1 to advise the master processor that the signal has been switched and to request a hp/srnd ouput un- mute. 9.2.1 i2c bus expander pin bus_exp can be used to control external switchable if saw filters or audio switches. this pin can be directly programmed by register reset .
stv8247, stv8257, stv 8277, stv8287 stv82x7 reset doc id 10163 rev 3 43/167 10 stv82x7 reset all stv82x7 features are controlled via the i2c bus. the stv82x7 can be "reset" in 2 ways: 1. by software via the i2c bus: this clears all synchronous logic, except for the i2c bus registers. 2. by hardware via the reset pin: in addi tion to clearing all synchronous logic, the reset input (active on the low level) re sets all the i2c bus registers to the default values listed below. table 6. reset default values function default mode demodulation auto-standard on scanned standards m/n, b/g, i, l/l? fm deviation 125 khz (max.) audio outputs automatic mte mode on loudspeaker source demodulated sound loudspeaker volume -40 db, differential mode, muted loudspeaker l/r balance l/r = 100% subwoofer -40 db / off headphone source demodulated sound headphone automatic detection on headphone volume -40 db, differential mode, muted headphone l/r balance l/r = 100% scart-1 out demodulated sound scart-2 out scart1 source scart volume -5.5 db, independent mode, muted i2s out off audio processing loudspeaker/headphone svc off, 0 db reference value loudspeaker surround off loudspeaker 5-band equalizer off, 0 db (flatband) loudspeaker loudness off headphone bass/treble off, 0 db (flat band) loudspeaker/headphone beeper -40 db / off
i2c interface stv8247, stv8257, stv8277, stv8287 44/167 doc id 10163 rev 3 11 i2c interface 11.1 i2c address and protocol the stv82x7 i2c interface works in slave mode and is fully compliant with i2c standards in fast mode (maximum frequency of 400 khz). two pairs of i2c chip addresses are used to connect two stv82x7 chips to the same i2c serial bus. the device address pairs are defined by the polarity of the adr_sel pin and are listed in the following table: protocol description write protocol read protocol w = write address r = read address a = acknowledge n = no acknowledgement sub-address is the register address pointer; this value auto-increments for both write and read. 11.2 start-up and configuration change procedure the dsp running loop is: read i2c registers and update internal structures (memory variables) process sound samples write i2c registers with new updated values the step ?process sound sample? duration is 1ms . this is shown in figure 25 . table 7. i2c read/write addresses adr write address (w) read address (r) low (connected to gnd1) 80h 81h high (connected to vdd1) 84h 85h start w a sub-address a data a .... a data a stop start w a sub-address a stop start r a data a .... a data n
stv8247, stv8257, stv8277, stv8287 i2c interface doc id 10163 rev 3 45/167 figure 25. simplified dsp processing flow when programming i2c read/write register with addresses between 80h and ffh this flow has to be taken into account. for example, if two different values are written in the same register in less than 2 ms, it is possible that the dsp doesn?t see the first value (because the second value over-writes the first one during the ?dsp processing? phase, before dsp can read the registers again). in the same way, when waiting for a register value change, the software programme must wait for at least 2 ms in order to allow sufficient time for the dsp to update the register values. (dsp run) hw_reset bit = 1 (bit 2 in host_cmd register) init_mem bit status? (bit 0 in dsp_status register (dsp initialization) (start dsp processing) host_run bit = 1 (bit 0 in dsp_run register) , (simultaneously read the 128 i2c registers) (dsp processing time = 1ms) (simultaneously write the load patch file 1 0 read i2c registers update internal structures dsp processing update i2c registers i2c registers (hw space) 80h 81h 82h 83h 84h ... ... feh ffh 128 i2c registers)
i2c interface stv8247, stv8257, stv8277, stv8287 46/167 doc id 10163 rev 3 figure 26. initialization procedure at sartup (duration of init phase < 1ms) =0 (bit 0 in dsp_status register) device input configuration set-up (if needed) init_mem bit ? hardware reset pin low power on hardware reset pin high delay > 100 us clock pll programmation (note 1) load patch file see figure 32 =0 (ffh register) check patch version =1 host_run bit = 1 delay 2 ms initialization procedure (bit 0 in dsp_run register) (hw_reset bit = 1 is done by p file at the end of patch loading) note 2 2: the customer can also set bit hw_reset = 1 here. (if input configuration has to be changed, it has to be done here) (start dsp processing) see figure 33 1: only when the crystal frequency is not 27 mhz. =1
stv8247, stv8257, stv8277, stv8287 i2c interface doc id 10163 rev 3 47/167 11.3 process flow during patch loading and dsp initialization patch loading and dsp firmware initialization are shown in figure 27 figure 27. patch loading and dsp initialization hw_reset bit = 0 firmware initialization patch loading load patch file in memory firmware init phase write patch version (reg ffh = xxh) firmware initialization finished (init_mem = 1) (software launch patch loading) (this action is included in the patch load file) note 1 note 1: the customer can also set hw_reset = 1 here. (bit 2 in host_cmd register) (duration of firmware init ialization is less than 1ms) (firmware set init_mem = 1 (done inside patch file) (bit 0 in dsp_status register)) (software must test init _mem = 1 before continuing) (bit 2 in host_cmd register) (dsp stop) hw_reset bit = 1 (bit 2 in host_cmd register)
i2c interface stv8247, stv8257, stv8277, stv8287 48/167 doc id 10163 rev 3 11.4 input config uration change the input configuration change must be programmed as shown in figure 28 : figure 28. input configuration change set bit init_mem = 0 change input configuration dacs unmute dacs mute & wait 50 ms for complete mute =1 & restart dsp firmware init_mem bit ? configuration change stop dsp firmware & wait 5 ms =0 end (bit 0 in dsp_status register) (host_run bit = 1 in dsp_run register) (host_run bit = 0 in dsp_run register)
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 49/167 12 register list note: the unused bits (defined as ?reserved?) in the i2c registers must be kept to zero. the system clock registers (from address 0x08 to 0x0b and from address 0x5a to 0x5d) do not need to be modified if a standard 27 mhz quartz crystal oscillator is used. the default values of the demodulator regist ers (from address 0x0c to 0x55) are for optimum performances and any change is not recommended, except for: agc_gain (0x0f) to adjust agc gain for am carrier in l/l' standard (agc used in open loop). caroffset1 (0x22) and caroffset2 (0x3a) to compensate if carrier frequency with an out-of-standard offset. soundlevel prescaling prescale_am (0x94), prescale_fm (0x95), prescale_nicam (0x96) and prescale_scart (0x97) to equalize demodulated or external audio signal before audio processing. peak detector registers peak_det_input (0x9d), peak_det_l (0x9e), peak_det_r (0x9f), peak_det_l_r (0xa0) can be used to measure internal sound level. sound source selection for each audio output channel loudspeakers, headphone and scart to be done using audio_matrix_input (0xa2). in multilingual mode, audio_matrix_language (0xa4) selects separately the language for each audio output channel. register autostd_ctrl (0x8a) is used to select between l/l' or d/k/k1/k2/k3 standard which can be discriminated automatically. to be used also to change maximum fm deviation (125 khz, by default) in case of wide overmodulation. autostd_standard_detect (0x8b) and autostd_stereo_detect (0x8c) to define the list of mono and stereo standards to be recognized automatically. note: () used in reset value column means that the bit or the byte is read-only. (s) symbol indicates that the field value is represented in signed binary format. (*) the field agc_err[4:0] ( agc_gain ) can be written by user if the bit agc_cmd ( agc_ctrl ) is set to one (by default controlled by automatic standard recognition system). to be used to adjust manually the input gain of analog agc amplifier for am carrier (l/l').
register list stv8247, stv8257, stv8277, stv8287 50/167 doc id 10163 rev 3 12.1 i2c register map by default, all i2c registers controlled by automatic standard recognition system (autostandard) are forced to read-only mode fo r the user. these registers and bits are shaded in ta bl e 8 . table 8. list of i2c registers name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ic general control cut_id 0x00 (0000 0001) 0 0 cut_number[5:0] reset 0x01 0000 0000 bus_ex p i2s_out put 0 en_stb y 0 soft_ lrst2 soft_ lrst1 soft_r st i2s_ctrl 0x04 0000 0000 sync_o ff sync_si gn 0 lock_th[1:0] lock_m ode sync_cst[1:0] i2s_stat 0x05 (0000 0000) 000000lr_off lock_ flag i2s_sync_offset 0x06 0000 0000 i2s_sfo[7:0] clocking 1 sys_config 0x07 0000 0000 i2s_ch_nb[1:0] input_freq[3:0] input_config[1:0] fs1_div 0x08 0001 0010 en_pro g 0 ndiv1[1:0] 0 sdiv1[2:0] fs1_md 0x09 0001 0001 0 0 0 md1[4:0] fs1_pe_h 0x0a 0011 0110 pe_h1[7:0] fs1_pe_l 0x0b 0000 0000 pe_l1[7:0] demodulator demod_ctrl 0x0c 0000 0110 00 far_mo de gap_mo de am_sel demod_mode[2:0] demod_stat 0x0d (0000 0000) 000 qpsk_l k fm2_ca r fm2_sq fm1_ca r fm1_sq agc_ctrl 0x0e 0001 0001 agc_ cmd 0 0 agc_ref[2:0] agc_cst[1:0] agc_gain 0x0f (0000 0000) 0 agc_err[4:0] sig_ove r sig_ under dc_err_if 0x10 (0000 0000) dc_err[7:0] demodulator channel 1 carfq1h 0x12 0011 1110 carfq1[23:16] carfq1m 0x13 1000 0000 carfq1[15:8] carfq1l 0x14 0000 0000 carfq1[7:0] fir1c0 0x15 0000 0000 fir1c0[7:0] (s)
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 51/167 fir1c1 0x16 1111 1110 fir1c1[7:0] (s) fir1c2 0x17 1111 1100 fir1c2[7:0] (s) fir1c3 0x18 1111 1101 fir1c3[7:0] (s) fir1c4 0x19 0000 0010 fir1c4[7:0] (s) fir1c5 0x1a 0000 1101 fir1c5[7:0] (s) fir1c6 0x1b 0001 1000 fir1c6[7:0]6 (s) fir1c7 0x1c 0001 1111 fir1c7[7:0] (s) acoeff1 0x1d 0010 0011 acoeff1[7:0] bcoeff1 0x1e 0001 0010 bcoeff1[7:0] crf1 0x1f (0000 0000) crf1[7:0] (s) ceth1 0x20 0010 0000 ceth1[7:0] sqth1 0x21 0011 1100 sqth1[7:0] caroffset1 0x22 0000 0000 caroffset1[7:0] (s) demodulator channel 2 iagcr 0x25 1000 1000 iagc_ref[7:0] iagcc 0x26 0000 0011 iagc_ off far_flt _en mono_f lt_ e n bg_sel mono_p rog iagc_cst[2:0] iagcs 0x27 (0000 0000) iagc_ctrl[7:0] carfq2h 0x28 0100 0100 carfq2[23:16] carfq2m 0x29 0100 0000 carfq2[15.8] carfq2l 0x2a 0000 0000 carfq2[7:0] fir2c0 0x2b 0000 0000 fir2c0[7:0] (s) fir2c1 0x2c 0000 0000 fir2c1[7:0] (s) fir2c2 0x2d 0000 0000 fir2c2[7:0] (s) fir2c3 0x2e 0000 0000 fir2c3[7:0] (s) fir2c4 0x2f 1111 1111 fir2c4[7:0] (s) fir2c5 0x30 0000 0100 fir2c5[7:0] (s) table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
register list stv8247, stv8257, stv8277, stv8287 52/167 doc id 10163 rev 3 fir2c6 0x31 0001 0100 fir2c6[7:0] (s) fir2c7 0x32 0010 0101 fir2c7[7:0] (s) acoeff2 0x33 1001 0000 acoeff2[7:0] bcoeff2 0x34 1010 1100 bcoeff2[7:0] scoeff 0x35 0001 1100 scoeff[7:0] srf 0x36 (0000 0000) srf[7:0] (s) crf2 0x37 (0000 0000) crf2[7:0] (s) caroffset2 0x3a 0000 0000 caroffset2[7:0] (s) nicam nicam_ctrl 0x3d 0000 0000 00000dif_polectmae nicam_ber 0x3e (0000 0000) error[7:0] nicam_stat 0x3f (0000 0000) nic_det f_mute loa cbi[3:0] nic_mu te stereo fm zwt_ctrl 0x40 0011 0001 lrst_ tone_o ff std_mo de thresh[3:0] tsctrl[1:0] zwt_time 0x41 0000 0100 00000 zwt_time[2:0] zwt_stat 0x42 (0000 0000) 0000 zw_sta t_ rdy zw_det zw_st zw_dm analog control adc_ctrl 0x56 0000 1000 i2s_data0_ctrl[1: 0] 00 adc_ power_ up adc_input_sel[2:0] scart1_2_output_ctrl 0x57 1010 1000 sc2_mu te sc2_output_sel[2:0] sc1_mu te sc1_output_sel[2:0] scart3_output_ctrl 0x58 0000 1011 0000 sc3_mu te sc3_output_sel[2:0] clocking 2 fs2_div 0x5a 0001 0001 0 ndiv2[1:0] 0 sdiv2[2:0] fs2_md 0x5b 0001 0001 0 0 0 md2[4:0] fs2_pe_h 0x5c 0101 1100 pe_h2[7:0] fs2_pe_l 0x5d 0010 1001 pe_l2[7:0] dsp control table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 53/167 host_cmd 0x80 0000 0000 it_in_d sp 0000 hw_res et 00 irq_status 0x81 0000 0000 0000 irq3 (hp/srnd unmute ready) irq2 (hp detected) irq1 (i2s sync lost) irq0 (autostd) soft_version 0x82 (0000 0002) soft_version[7:0] onchip_algos 0x83 (0000 0000) 0 pro_lo gic_sel ect nicam i2s_inp ut trubas s tru surrou nd pro_lo gic multich anel dsp_status 0x84 0000 0000 0000000 init_me m dsp_run 0x85 0000 0000 000000 host_ no_init host_r un i2s_in_config 0x86 1000 1110 lock_ mode_e n 0sync lrclk_ start lrclk_ polarit y sclk_ polarit y data_cf g i2s_mo de av_delay 0x89 0000 0000 delay_time[6:0] delay_ on automatic standard recognition system autostd_ctrl 0x 8a 0000 0001 000 force_ squelc h single_ shot dk_dev[1:0] ldk_sw autostd_standard_de tect 0x8b 0010 1111 0 nicam_ c4_off nicam_ gap_mo de nicam_ mono_i n ldk_sc k i_sck bg_sck mn_sck autostd_stereo_dete ct 0x8c 0001 1111 ldk_zw t3 ldk_zw t2 ldk_sw t1 ldk_ nicam i_nicam bg_zwt bg_nic am mn_zwt autostd_timers 0x8d 1010 0100 fm_time[1:0] nicam_time[2:0] zweiton_time[2:0] autostd_status 0x8e (0000 0000) stereo _ id stereo _ ok mono_ ok autost d_on stereo_sid[1:0] mono_sid[1:0] audio preprocessing & selection dc_removal_input 0x90 0000 0111 00000 dc_sca rt dc_nic am dc_ demod dc_removal_l 0x91 (0000 0000) dc_removal_l[7:0] (s) dc_removal_r 0x92 (0000 0000) dc_removal_r[7:0] (s) prescale_select 0x93 0000 0000 0000000 am_fm_ select prescale_am 0x94 0000 0000 0 prescale_am[6:0] (s) prescale_fm 0x95 0000 1100 0 prescale_fm[6:0] (s) prescale_nicam 0x96 0001 1010 0 prescale_nicam[6:0] (s) prescale_scart 0x97 0000 0000 0 0 prescale_scart[5:0] (s) prescale_i2s_0 0x98 0000 0000 0 0 prescale_i2s_0[5:0] (s) table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
register list stv8247, stv8257, stv8277, stv8287 54/167 doc id 10163 rev 3 prescale_i2s_1 0x99 0000 0000 0 0 prescale_i2s_1[5:0] (s) prescale_i2s_2 0x9a 0000 0000 0 0 prescale_i2s_2[5:0] (s) deemphasis_dematrix 0x9b 0000 0000 00 nicam_ dematr ix nicam_ deemph _ bypass fm_dematrix[1:0] fm_dee mph_by pa s s fm_dee mph_s w peak_det_input 0x9d 0000 0000 peak_ locatio n 0 peak_l_r_range peak_det_input[ 1:0] peak_det_l 0x9e 0(0000 0000) overlo ad_l[7:0 ] peak_l[6:0] peak_det_r 0x9f 0(0000 0000) overlo ad_r[7:0 ] peak_r[6:0] peak_det_l_r 0xa0 0(0000 0000) overlo ad_l_r[ 7:0] peak_l_r[6:0 matrixing audio_matrix_input 0xa2 0000 0000 00000 scart_ input_ source hp_inpu t_ source ls_inpu t_ source audio_matrix_config 0xa3 0000 0000 000 scart_ matrix demod_matrix[3:0] audio_matrix_languag e 0xa4 0000 0000 mute_ stereo mute_ all scart_language [1:0] hp_language[1:0] ls_language[1:0] downmix_in_mode 0xa6 0000 0010 0000lfe_inmix_in_mode[2:0] downmix_out_mode 0xa7 0100 1010 0 hp_mode[1:0] scart_mode[1:0] mix_out_mode[2:0] downmix_dual_mode 0xa8 0000 0000 0 dual_o n ls_dual_select[ 1:0] scart_dual_sel ect [1:0] hp_dual_select[ 1:0] downmix_config 0xa9 0000 0001 0 0 srnd_factor[1:0] center_factor[1 :0] lr_upmi x normal ize audio processing pro_logic2_control 0xaa 0011 1010 pl2_lfe pl2_output_downmix[2:0] pl2_modes[2:0] pl2_act ive pcm_srnd_delay 0xab 0000 0000 0 0 0 snrd_delay[4:0] pcm_center_delay 0xac 0000 0000 0000 center_delay[3:0] pro_logic2_config 0xad 0000 0000 0 0 0 pl2_srnd_filter pl2_rs_ polarit y pl2_ panora ma pl2_aut o balanc e pro_logic2_dimension 0xae 0000 0000 0 pl2_c_width 0 pl2_dimension pro_logic2_level 0xaf 0000 0000 pl2_level table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 55/167 noise_generator 0xb0 0000 0000 10_db_ at t e n u at e sright_ noise sleft_ noise sub_ noise center _ noise right_ noise left_ noise noise_ on trusrnd_control 0xb1 0000 0000 0 trusrn d_mon o_ srnd trusrnd_input_mode[3:0] trusrn d_ mode trusrn d_ on trusrnd_input_gain 0xb6 0000 0000 trusrnd_input_gain[7:0] trusrnd_hp_dcl 0xb7 0000 0000 00000 dialog_ clarity _on headph one_on 0 trusrnd_dc_elevation 0xb8 0000 1100 trusrnd_dc_elevation[7:0] trubass_ls_control 0xba 0000 0110 0 0 0 trubass_ls_size[3:0] trubas s_ ls_on trubass_ls_level 0xbb 00001 1001 trubass_ls_level[7:0] trubass_hp_control 0xbc 0000 0110 0 0 0 trubass_hp_size[3:0] trubas s_ hp_on trubass_hp_level 0xbd 0000 1001 trubass_hp_level[7:0] svc_ls_control 0xbe 0000 0010 0000svc_ls_input[1:0] svc_ ls_amp svc_ ls_on svc_ls_time_th 0xbf 1001 1000 svc_ls_time[2:0] svc_ls_threshold[4:0] (s) svc_hp_control 0xc0 0000 0010 000000 svc_ lhp_am p svc_ hp_on svc_hp_time_th 0xc1 1001 1000 svc_hp_time[2:0] svc_hp_threshold[4:0] (s) svc_ls_gain 0xc2 0000 0000 0 0 0 svc_ls_make_up_gain[4:0] svc_hp_gain 0xc3 0000 0000 0 0 0 svc_hp_make_up_gain[4:0] stsrnd_control 0xc4 0000 0000 stsrnd _ stereo stsrnd _ mode stsrnd _ on stsrnd_freq 0xc5 0001 0101 0 0 stsrnd_bass[1:0] stsrnd_medium[1 :0] stsrnd_treble[1 :0] stsrnd_level 0xc6 1000 0000 stsrnd_gain[7:0] omnisurround_contr ol 0xc7 0000 0000 st_voice omnisrnd_input_mode omnisr nd_on st_dynamic_bass 0xc8 0000 0000 bass_level bass_freq dyn_ba ss_on ls_eq_bt_ctrl 0xc9 0000 0000 000000 ls_eq_ bt_ sw ls_eq_ on ls_eq_band1 0xca 0000 0000 eq_band1[7:0] (s) table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
register list stv8247, stv8257, stv8277, stv8287 56/167 doc id 10163 rev 3 ls_eq_band2 0xcb 0000 0000 eq_band2[7:0] (s) ls_eq_band3 0xcc 0000 0000 eq_band3[7:0] (s) ls_eq_band4 0xcd 0000 0000 eq_band4[7:0] (s) ls_eq_band5 0xce 0000 0000 eq_band5[7:0] (s) ls_bass_gain 0xcf 0000 0000 ls_bass[7:0] (s) ls_treble_gain 0xd0 0000 0000 ls_treble[7:0] (s) hp_bt_control 0xd1 0000 0000 0000000 hp_bt_ on hp_bass_gain 0xd2 0000 0000 hp_bass[7:0] (s) hp_treble_gain 0xd3 0000 0000 hp_treble[7:0] (s) output_bass_mngt 0xd4 0000 0000 bass_ manage _on 0 sub_ active gain_ switch 0 ocfg_num[2:0] ls_loudness 0xd5 0000 0100 0 ls_loud_threshold[2:0] ls_loud_gain_hr[2:0] ls_ loud_o n hp_loudness 0xd6 0000 0100 0 hp_loud_threshold[2:0] hp_loud_gain_hr[2:0] hp_ loud_o n volume volume_modes 0xd7 1100 0111 antclip _hp_vo l_clam p anticli p_ ls_vol_ clamp 00 scart_ volume _ mode srnd_ volume _ mode hp_ volume _ mode ls_ volume _ mode ls_l_volume_msb 0xd8 1001 1000 ls_l_volume_msb[7:0] ls_l_volume_lsb 0xd9 0000 0000 000000 ls_l_volume_lsb [1:0] ls_r_volume_msb 0xda 0000 0000 ls_r_volume_msb[7:0] ls_r_volume_lsb 0xdb 0000 0000 000000 ls_r_volume_ls b[1:0] ls_c_volume_msb 0xdc 1001 1000 ls_c_volume_msb[7:0] ls_c_volume_lsb 0xdd 0000 0000 000000 ls_c_volume_ls b[1:0] ls_sub_volume_msb 0xde 1001 1000 ls_sub_volume_msb[7:0] ls_sub_volume_lsb 0xdf 0000 0000 000000 ls_sub_volume_ lsb[1:0] ls_sl_volume_msb 0xe0 1001 1000 ls_sl_volume_msb[7:0] ls_sl_volume_lsb 0xe1 0000 0000 000000 ls_sl_volume_ls b[1:0] table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 57/167 ls_sr_volume_msb 0xe2 0000 0000 ls_sr_volume_msb[7:0] ls_sr_volume_lsb 0xe3 0000 0000 000000 ls_sr_volume_l sb[1:0] ls_master_volume_ms b 0xe4 1110 1000 ls_master_volume_msb[7:0] ls_master_volume_ls b 0xe5 0000 0000 000000 ls_master_volu me_ lsb[1:0] hp_l_volume_msb 0xe6 1001 1000 hp_l_volume_msb[7:0] hp_l_volume_lsb 0xe7 0000 0000 000000 hp_l_volume_ls b[1:0] hp_r_volume_msb 0xe8 0000 0000 hp_r_volume_msb[7:0] hp_r_volume_lsb 0xe9 0000 0000 000000 hp_r_volume_ lsb[1:0] scart_l_volume_msb 0xea 1101 1101 scart_l_volume_msb[7:0] scart_l_volume_lsb 0xeb 0000 0000 000000 scart_l_volume _ lsb[1:0] scart_r_volume_msb 0xec 1101 1101 scart_r_volume_msb[7:0] scart_r_volume_lsb 0xed 0000 0000 000000 scart_r_volume _ lsb[1:0] beeper beeper_on 0xee 0000 0000 0000000 beeper _ on beeper_mode 0xef 0000 0011 000 beeper_duratio n[1:0] beeper _ pulse beeper_path[1:0] beeper_freq_vol 0xf0 0111 0000 beeper_freq[2:0] beeper_volume[4:0] mute mute_digital 0xf1 1001 1111 autost d_ mute_o n 00 scart_ d_mute srnd_h p_d_mu te sub_ d_mute c_ d_mute ls_ d_mute s/pdif s/pdif_out_config 0xf2 0000 0100 00000 spdif_o ut_mut e s/pdif_out_sele ct[2:0] headphone configuration headphone_config 0xf3 0000 001(0) 0000 hp_for ce hp_ls_ mute hp_det _ active hp_ detect ed table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
register list stv8247, stv8257, stv8277, stv8287 58/167 doc id 10163 rev 3 dac control dac_control 0xf4 0001 1111 00 s/pdif_ mux dac_sc art_mu te dac_sh p_mute dac_cs ub_mut e dac_ls lr_mut e power_ up dac_sw_channels 0xf5 0000 0000 sur_hp_sw c_sub_sw ls_l_r_sw scart_sw spdif_sw_channels 0xf6 0000 0000 000000 spfi_sw spdif_channel_status 0xf9 0000 0000 channel_status emphasis copyri ght non_au dio pro_co n autostandard coefficients settings autostd_coeff_ctrl 0xfb 0000 0001 000000 autostd_coeff_ ctrl[1:0] autostd_coeff_index_ msb 0xfc 0000 0000 0000000 autost d_ coeff_ index_ msb autostd_coeff_index_ lsb 0xfd 0000 0000 autostd_coeff_index_lsb[7:0] autostd_coeff_value 0xfe 0000 0000 autostd_coeff_value[7:0] patch_version 0xff 0000 0000 patch_version[7:0] table 8. list of i2c registers (continued) name addr. reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 59/167 12.2 stv82x7 general control registers cut_id version identification address: 0x00 type: r reset: 0x01 reset software reset address: 0x01 type: r/w reset: 0x00 description: the built-in automatic standard recognition system (autostandard) can be disabled. in this case, the software reset function (bits soft_lrst1 and soft_lrst2) can be used to implement the automatic standard recognition by i2c software. this is not required if the built-in automatic standard recognition system function is used (default). 76543210 0 0 cut_number[5:0] r [7:6] reserved [5:0] dice version identification 76543210 bus_exp i2s_output 0 en_stby 0 soft_lrst2 soft_lrst1 soft_rst r/w [7] static control by i 2 c of hardware pin bus_exp [6] 0: i2s input (i2s_data0 , i2s_sclk, i2s_lr_clk, i2s_pcm_clk in input mode) 1: i2s output (i2s_data0 , i2s_sclk, i2s_lr_clk, i2s_pcm_clk in output mode, 512 x fs will be provided on the i2s_pcm_clk pin) [5] reserved. [4] standby mode enabling: 0: normal mode 1: to lock the digital signals before to settle the device in standby mode [3] reserved. [2] softreset (active high) of channel 2 detectors only. [1] softreset (active high) of channel 1 detectors only. [0] general softreset (active high) to reset all hardware registers except for i2c data.
register list stv8247, stv8257, stv8277, stv8287 60/167 doc id 10163 rev 3 i2s_ctrl i 2 s synchronization control address: 0x04 type: r/w reset: 0x01 i2s_stat i2s sync hronization status address: 0x05 type: r/w reset: 0x00 76543210 sync_off sync_sign 0 lock_th[1:0] lock_mode sync_cst[1:0] r/w [7] open the loop of synchronization - external pc m clock is used internally and must be equal to 512 x f sout [6] sign of the loop reversion (to be used in case of gain inversion of the frequency synthesizer) [5] reserved [4:3] lock detector threshold programming: 00: 1 clk period error of accumulation 01: 2 clk period error of accumulation 10: 4 clk period error of accumulation 11: 8 clk period error of accumulation [2] lock detector mode 0: lock when accumulation error within lock th reshold and lr detected (period counter not saturated) 1: lock when only accumulation error within lo ck threshold. disregar d the lr detection [1:0] synchronization time constant defines the measurement period of lr: 00: half period measured (lowest accuracy) 01: one full period measured 10: two full periods measured 11: four full periods measured (highest accuracy) 76543210 000000lr_offlock_flag r/w [7:2] reserved. [1] lr signal detection: 0: lr signal detected and correct 1: missing lr pulses detected [0] lock flag allowing unmute of audio output
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 61/167 i2s_sync_offset i2s synchroni zation offset frequency address: 0x06 type: r/w reset: 0x00 12.3 clocking 1 a low-jitter pll clock is integrated and can be fully reprogrammed using the registers described below. by default, the programming is defined for a 27-mhz quartz crystal frequency, which is the frequency recommended for reducing potential rf interference in the application. however, if necessary, the pll clock can be re-programmed for other quartz crystal frequencies within a range from 23 to 30 mhz. other quartz crystal frequencies can be programmed on your demand. note: a crystal frequency change is compatible with other default i2c programming including the built-in automatic standard recognition system. sys_config system configuration control address: 0x07 type: r/w reset: 0x00 76543210 i2s_sfo[7:0] r/w [7:0] i2s synchronization frequency offset (450 ppm full scale) 76543210 i2s_ch_nb[1:0] input_freq[3:0] input_config[1:0] r/w [7:6] number of i 2 s channels input: 00: n/a 01: 2 channels 10: 4 channels 11: 6 channels [5:2] i 2 s input frequency: 0000 : 32 khz 0001: 44.1 khz 0010: 48 khz 0011: 8 khz (i 2 s input, 2 channels only) 0100 : 11.025 khz (i 2 s input, 2 channels only) 0101 : 12 khz (i 2 s input, 2 channels only) 0110 : 16 khz (i 2 s input, 2 channels only) 0111 : 22.05 khz (i 2 s input, 2 channels only) 1000 : 24 khz (i 2 s input, 2 channels only)
register list stv8247, stv8257, stv8277, stv8287 62/167 doc id 10163 rev 3 fs1_div fs1 i/o divider programming address: 0x08 type: r/w reset: 0x02 fs1_md fs1 coarse selection address: 0x09 type: r/w reset: 0x11 [1:0] input stream to process 0 : sif & scart input (32 khz) 1 : scart input only (48 khz) 2 : i 2 s input only 76543210 en_prog 0 ndiv1[1:0] 0 sdiv1[2:0] r/w [7] fs1 programming enable: 0: fs1 i 2 c registers programming ignored by syste m - fs1 pre-programmed automatically by sys-config register (normal us e with standard quartz of 27 mhz) 1: fs1 i 2 c registers programming used by system - fs1 pre-programming by sys-config desactivated (to be used in case of no standard quartz, different from 27 mhz) [6] reserved. [5:4] fs1 input clock divider selection [3] reserved. [2:0] fs1 output clock divider selection 76543210 000 md1[4:0] r/w [7:5] reserved. [4:0] fs1 coarse selection
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 63/167 fs1_pe_h fs1 fine selection (msbs) address: 0x0a type: r/w reset: 0x36 fs1_pe_l fs1 fine selection (lsbs) address: 0x0b type: r/w reset: 0x00 12.4 demodulator demod_ctrl demodulator control address: 0x0c type: r/w reset: 0x06 76543210 pe_h1[7:0] r/w [7:0] fs1 fine selection (msbs) 76543210 pe_l1[7:0] r/w [7:0] fs1 fine selection (lsbs) 76543210 0 0 far_mode gap_mode am_sel demod_mode[2:0] r/w [7:6] reserved [5] 1: farrow and mono filter for nicam active note: the following register bits are controlled by autostandard and are forced by default to read-only mode. [4] defines the clock gappi ng mode of the demodulator 0: (default), the fs1 freq is controlled by stl- error (clock-pll mode) to align the instantaneous value of the internal clock with respect to the received nicam clock 1: the fs1 freq is fixed and the m ean value of the internal clock is aligned by variable gapping (src-error) with respect to the received nicam clock
register list stv8247, stv8257, stv8277, stv8287 64/167 doc id 10163 rev 3 demod_stat demodulator detection status address: 0x0d type: r reset: 0x00 note: these registers allow direct acce ss to the demodulator signal detectors. [3] demodulator configuration select: 0: fm configuration of demodulator (default) 1: am configuration of demodulator [2:0] demodulator mode select: ch1 fm ch2 fm/qpsk 000: normal fm normal 001: wide fm wide 010: normal qpsk system b/g/l/d/k 011: wide qpsk system b/g/l/d/k 100: normal fm wide 101: wide fm normal 110: normal qpsk system i 111: wide qpsk system i 76543210 0 0 0 qpsk_lk fm2_car fm2_sq fm1_car fm1_sq r [7:5] reserved. [4] qpsk lock detection flag 0: not detected 1: detected [3] channel 2 fm/am carrier detection flag 0: not detected 1: detected [2] channel 2 fm squelch detection flag 0: not detected 1: detected [1] channel 1 fm/am carrier detection flag 0: not detected 1: detected [0] channel 1 fm squelch detection flag 0: not detected 1: detected
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 65/167 agc_ctrl if agc control address: 0x0e type: r/w reset: 0x11 agc_gain if agc control and status address: 0x0f type: r/w reset: 0x00 76543210 agc_cmd 0 0 agc_ref[2:0] agc_cst[1:0] r/w note: the following register bit is controlled by autostandard and is forced by default to read-only mode. [7] automatic gain control command mode: normally set to 0 enabling automatic mode. fo r l/l? standards, the agc should be switched off due to the presence of the am sound carrier. in this case, a fixed gain value should be set using the agcs register. 0: automatic mode. agc controlled by the autostandard function. (default) 1: manual/forced mode [6:5] reserved. [4:2] this bit is used to defines the clipping level wh ich adjusts the allowable proportion of samples at the input of the adc which will be clipped. the agc tries to maximize the use of the full scale range of the adc. the default setting gives a ratio of 1/256. clipping ratio clipping ratio 000: 1/16 (single carrier) 100: 1/256 (default) 001: 1/32 101: 1/512 010: 1/64 110: 1/1024 011: 1/128 111: 1/2048 (multiple carriers) [1:0] agc time constant this is the time constant between each step of 1.5 db by the agc. step duration (ms) 00 1.33 01 2.66 10 5.33 11 10.66 76543210 0 agc_err[4:0] sig_over sig_under r/w [7] reserved.
register list stv8247, stv8257, stv8277, stv8287 66/167 doc id 10163 rev 3 note: when agc_cmd = 0, agc_err[4:0] can be read -- indicating the input level. it can also be written to -- presetting the agc level which will then adjust itself to the final value. when agc_cmd = 1 , the agc is off and writing to agc_err[4:0] directly controls the agc amplifier gain. reading agc_err just confirms the fixed value. dc_err_if dc offset status for if adc address: 0x10 type: r reset: 0x00 12.5 demodulator channel 1 carfq1h channel 1 carrier dco frequency address: 0x12 type: r/w reset: 0x3e [6:2] amplifier gain control: this is the gain control value of agc. there are 20 steps of +1.5 db (see note below). 00000: gain-min 10100: gain-min + 30 db 11111: gain-min + 30 db [1] agc input signal upper threshold 0: normal signal 1: signal too large and agc is overloaded [0] agc input signal lower threshold: 0: normal signal 1: signal too small and agc is underloaded when the agc is in automatic mode (agc_c md = 0), bits sig_over and sig_under indicate if the input signal is too small/large and the agc is under/overloaded. this is useful when setting the stv82x7 sif input level. 76543210 dc_err[7:0] r [7:0] dc offset error of if adc output 76543210 carfq1h[23:16] r/w [7:0] channel 1 dco carrier frequency (8 msbs).
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 67/167 carfq1m channel carrier dco frequency address: 0x13 type: r/w reset: 0x80 carfq1l channel 1 carrier dco frequency address: 0x14 type: r/w reset: 0x00 note: carrier frequency: carfq1(dec).f s / 2 24 with f s = 24.576 mhz (crystal oscillator frequency independent) fir1c channel 1 fir coefficients note: this register is controlled by autost andard and is forced by default to read-only mode 76543210 carfq1m[15:8] r/w [7:0] channel 1 dco carrier frequency. note: this register is controlled by autost andard and is forced by default to read-only mode 76543210 carfq1l[7:0] r/w [7]:0 channel 1 dco carrier frequency (8 lsbs), see ta bl e 9 note: this register is controlled by autost andard and is forced by def ault to read-only mode. table 9. mono carrier frequencies by system system mono carrier freq. (mhz) carfq1[23:0] (dec) carfq1[23:0] m/n 4.5 3072000 0x2ee000 b/g 5.5 3754667 0x394aab i 6.0 4096000 0x3e8000 l 6.5 4453717 0x43f555 d/k/k1/k2 6.5 4437333 0x43b555 76543210 fir1c0[7:0] to fir1c7[7:0] r/w
register list stv8247, stv8257, stv8277, stv8287 68/167 doc id 10163 rev 3 address: 0x15 to 0x1c type: r/w acoeff1 channel 1 baseband pll loop filter proportional coefficient address: 0x1d type: r/w reset: 0x23 bcoeff1 channel 1 baseband pll loop filter integral coefficient and dco gain address: 0x1e table 10. channel 1 fir coefficients bitfield description fm 27 khz (1) fm 50 khz (2) fm 75 khz fm 100 khz fm 200 khz fm 350 khz fm 500 khz am fir1c0[7:0] 0xff 0x00 0x01 0xff 0x00 0x02 0x01 0x00 fir1c1[7:0] 0xfe 0xfe 0x03 0x00 0x01 0x01 0x00 0xfe fir1c2[7:0] 0xfe 0xfc 0x02 0x05 0x01 0xfc 0x04 0xfd fir1c3[7:0] 0x00 0xfd 0xfc 0x02 0xfc 0x03 0xfa 0xfe fir1c4[7:0] 0x06 0x02 0xf8 0xf8 0x08 0x04 0x05 0x04 fir1c5[7:0] 0x0e 0x0d 0x01 0xf9 0xf6 0xf2 0x00 0x0d fir1c6[7:0] 0x16 0x18 0x18 0x15 0xf8 0x06 0xf2 0x16 fir1c7[7:0] 0x1b 0x1f 0x2d 0x35 0x4a 0x43 0x4d 0x1d 1. default mode for m/n standard. 2. default mode for b/g/i/d/k standards note: the above registers are controlled by autostandard and are forced by default to read-only mode. 76543210 acoeff1[7:0] r/w note: this register is controlled by autost andard and is forced by def ault to read-only mode. [7:0] used to program the proportional coeffici ent of the baseband pll loop filter (channel 1) defines the damping factor of the loop. for values, refer to table 11. 76543210 bcoeff1[7:0] r/w
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 69/167 type: r/w reset: 0x12 note: this register is controlled by autost andard and is forced by def ault to read-only mode. [7:0] used to program the integral coefficient of the baseband pll loop filter and dco gain defines the bandwidth of the loop. for values, refer to table 11. table 11. baseband pll loop filter adjustment (fm mode) fm mode small standard medium wide (1) a2 standard acoeff 0x10 0x22 0x2c 0x2c 0x10 bcoeff 0x1a 0x12 0x0a 0x0a 0x11 fm_dev max (khz) 62.5 125 250 500 125 dco range (khz) 96 192 384 768 192 1. refer to demod_mode[2:0] bits in the demod_ctrl register. note: 1 fm pre-scale has to be adj usted depending on the chosen fm mode. 2 fm squelch threshold has to be adjusted depending on the chosen fm mode.
register list stv8247, stv8257, stv8277, stv8287 70/167 doc id 10163 rev 3 crf1 channel 1 baseband p ll demodulator offset address: 0x1f type: r reset: 0x00 ceth1 channel 1 fm/am carrier level threshold address: 0x20 type: r/w reset: 0x20 sqth1 channel 1 fm squelch threshold address: 0x21 type: r/w reset: 0x3c 76543210 crf1[7:0] r [7:0] channel 1 carrier recovery frequency displays the instantaneous frequency offset of the channel 1 baseband pll demodulator. 76543210 ceth1[7:0] r/w [7:0] this register is used to compare the carrier level in the channel and the threshold value. this level is measured after the channel filter and is relative to the fu ll scale reference level (0 db). this is used as part of the validation of an fm si gnal, if the carrier level is below the threshold, the signal is considered to be non-valid. ceth threshold (db) ceth threshold (db) 0xff -6 0x10 -32 (recommended value) 0x80 -12 0x08 -38 0x40 -18 0x00 off (all carrier levels are accepted) 0x20 -24 (default) 76543210 sqth1[7:0] r/w
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 71/167 note: fm squelch threshold has to be adjusted depending on the chosen fm mode. caroffset1 channel 1 dco carrier offset compensation address: 0x22 type: r/w reset: 0x00 12.6 demodulator channel 2 iagcr channel 2 internal agc reference for qpsk address: 0x25 type: r/w reset: 0x88 [7:0] the squelch detector measures the level of high frequency noise and compares it to the threshold level (sqth). if the level is below this value, the s/n of the fm signal is considered to be acceptable. values are giv en for fm with standard deviation. sqth s/n (db) 0xfa 0 0x77 10 0x3c 15 (default) 0x23 20 0x19 25 76543210 caroffset1[7:0] (s) r/w [7:0] this value is used to correct the carrier fr equency offset of the incoming if signal. automatic frequency control in fm mode c an be implemented by registers dc_removal_l and dc_removal_r . a dco frequency offset (in two?s complement fo rmat) is added to the pre-programming value by autotsd in the carfq1 registers (corresp onding to the standard if carrier frequency). the programmable carrier offset ranges from -192 khz to +190.5 khz with a resolution of 1.5 khz. for standard fm deviation, the value displays by dc_removal_l and dc_removal_r can be directly loaded in caroffset1 to exactl y compensate the carrier offset on channel 1. 76543210 iagc_ref[7:0] r/w [7:0] sets the mean value of the internal agc, used for qpsk demodulation. the default setting corresponds to half full scale amplitude at the baseband pll input.
register list stv8247, stv8257, stv8277, stv8287 72/167 doc id 10163 rev 3 iagcc channel 2 internal agc time constant for qpsk address: 0x26 type: r/w reset: 0x03 iagcs channel 2 internal agc status for qpsk address: 0x27 type: r reset: 0x00 76543210 iagc_off far_flt_en mono_flt_en bg_sel mono_prog iagc_cst[2:0] r/w [7] agc disable: 0: internal agc is active 1: internal agc is disabled [6] 1: enable farrow filter for nicam [5] 1: enable mono filter for nicam [4] 1: bg nicam mono filter selected note: the above register bits are controlled by au tostandard and are forced by default to read-only mode. [3] 1: enable programming of mono filter [2:0] i nternal agc programmable step constant. these bits control the time per step (values given for qpsk mode). the default value defines the optimum trade-off between fast settling time (for the fastest nicam identification) and the noise immunity (minimum ber degradation) step time (us) time response (ms) 000 703 128 001 352 64 010 176 32 011 88 16 100 44 8 101 22 4 110 11 2 111 5.5 0.82 76543210 iagc_ctrl[7:0] r [7:0] indicates the value of the internal agc gain control
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 73/167 carfq2h channel 2 carrier dco frequency address: 0x28 type: r/w reset: 0x44 carfq2m channel 2 carrier dco frequency address: 0x29 type: r/w reset: 0x40 carfq2l channel 2 carrier dco frequency address: 0x2a type: r/w reset: 0x00 76543210 carfq1h[23:16] r/w [7:0] channel 2 dco carrier frequency (8 msbs). note: this register is controlled by autost andard and is forced by default to read-only mode 76543210 carfq1m[15:8] r/w [7:0] channel 2 dco carrier frequency. note: this register is controlled by autost andard and is forced by default to read-only mode 76543210 carfq1l[7:0] r/w [7]:0 channel 2 dco carrier frequency (8 lsbs), see ta bl e 1 2 .. note: this register is controlled by autost andard and is forced by def ault to read-only mode. table 12. stereo carrier frequencies by system system stereo carrier freq. (mhz ) carfq2[23:0] (dec) carfq2[23:0] m/n a2+ 4.724212 3225062 0x3135e6 b/g nicam 5.85 3993600 0x3cf000 bg a2 5.7421875 3920000 0x3bd080 i nicam 6.552 4472832 0x444000
register list stv8247, stv8257, stv8277, stv8287 74/167 doc id 10163 rev 3 fir2c channel 2 fir coefficients address: 0x2b to 0x32 type: r/w note: the above registers are controlled by autostandard and are forced by default to read-only mode. acoeff2 channel 2 baseband pll loop filter proportional coefficient address: 0x33 l nicam 5.85 3993600 0x3cf000 dk nicam 5.85 3993600 0x3cf000 dk1 a2* 6.2578125 4272000 0x412f80 dk2 a2* 6.7421875 4602667 0x463b2b dk3 a2* 5.7421875 3920000 0x3bd080 76543210 fir2c0[7:0] to fir2c7[7:0] r/w table 12. stereo carrier frequencies by system (continued) system stereo carrier freq. (mhz ) carfq2[23:0] (dec) carfq2[23:0] [7:0] channel 2 fir coefficients table 13. channel 2 fir coefficients bitfield description fm 27 khz fm 50 khz qpsk 40% (reset state) qpsk100% fir2c0[7:0] 0xff 0x00 0x00 0x00 fir2c1[7:0] 0xfe 0xfe 0x00 0x00 fir2c2[7:0] 0xfe 0xfc 0xff 0x00 fir2c3[7:0] 0x00 0xfd 0x03 0x00 fir2c4[7:0] 0x06 0x02 0x00 0xff fir2c5[7:0] 0x0e 0x0d 0xf4 0x04 fir2c6[7:0] 0x16 0x18 0x0a 0x14 fir2c7[7:0] 0x1b 0x1f 0x3d 0x25 76543210 acoeff2[7:0] r/w
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 75/167 type: r/w reset: 0x90 bcoeff2 channel 2 baseband pll loop filter integral coefficient and dco gain address: 0x34 type: r/w reset: 0xac scoeff channel 2 symbol tracking loop coefficients address: 0x35 type: r/w reset: 0x1c note: this register is controlled by autost andard and is forced by def ault to read-only mode. [7:0] this value defines the loop cl amping factor used to program t he proportional coefficient of the baseband pll loop filter (channel 2). see ta bl e 1 4 and ta b l e 1 5 . 76543210 bcoeff2[7:0] r/w [7:0] this value defines the loop bandwidth used to program the integral coefficient of the baseband pll loop filter and dco gain. see ta bl e 1 4 and ta b l e 1 5 . table 14. baseband pll loop filter adjustments (fm mode) fm mode small standard mid wide a2 standard acoeff 0x10 0x22 0x2c 0x2c 0x10 bcoeff 0x1a 0x12 0x0a 0x0a 0x11 fm_dev max (khz) 62.5 125 250 500 125 dco range (khz) 96 192 384 768 192 table 15. baseband pll loop filt er adjustments (qpsk mode) qpsk mode small medium large extra-large acoeff 0x90 0x90 0x90 0x90 bcoeff 0xac 0xa3 0x9a 0x91 dco_dev max (khz) 2.84375 5.6875 11.375 22.75 76543210 scoeff[7:0] r/w
register list stv8247, stv8257, stv8277, stv8287 76/167 doc id 10163 rev 3 srf channel 2 symbol tracking loop frequency address: 0x36 type: r/w reset: 0x00 crf2 channel 2 baseband pll demodulator offset address: 0x37 type: r/w reset: 0x00 note: this register is controlled by autost andard and is forced by def ault to read-only mode. [7:0] this value is used to program the proporti onal and integral coefficients of the qpsk symbol tracking loop. see ta bl e 1 6 and ta b l e 1 7 . table 16. qpsk system - bg/l/dk standards (40% roll-off) extra-small small medium large extra-large open loop scoeff 0x1e 0x25 0x24 0x26 0x2a 0x80 table 17. qpsk system - i standard (100% roll-off) extra-small small medium large extra-large scoeff 0x16 0x1d 0x1c 0x23 0x22 76543210 srf[7:0] r/w [7:0] displays in two?s complement format t he frequency deviation betw een the incoming nicam bitstream and the quartz clocks. the maximum error is 250 ppm. 76543210 crf2[7:0] r/w [7:0] channel 2 carrier recovery frequency. displays the instantaneous frequency of fset of the channel 2 baseband pll
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 77/167 caroffset2 channel 2 dco carrier offset compensation address: 0x3a type: r/w reset: 0x00 12.7 nicam registers nicam_ctrl nicam decoder control address: 0x3d type: r/w reset: 0x00 76543210 caroffset2[7:0] (s) r/w [7:0] this value is used to correct the carrier fr equency offset of the incoming if signal. automatic frequency control in fm mode c an be implemented by registers dc_removal_l and dc_removal_r . a dco frequency offset (in two?s complement fo rmat) is added to the pre-programming value by autotsd in the carfq2 registers (corresp onding to the standard if carrier frequency). the programmable carrier offset ranges from -192 khz to +190.5 khz with a resolution of 1.5 khz. for standard fm deviation, the value displayed by register dc_removal_r can be directly loaded in register caroffset2 to exactly compensate the carrier offset on channel 2. 76543210 00000dif_polectmae r/w [7:3] reserved. [2] 0: no polarity inversion (default) 1: polarity inversion of the differential decoding [1] error counter timer: defines the nicam error measurement period 0: 128 ms (default) 1: 64 ms [0] max. allowed errors: defines the nicam error decoding for mute function. 0: 511 max (default) 1: 255 max
register list stv8247, stv8257, stv8277, stv8287 78/167 doc id 10163 rev 3 nicam_ber nicam bit error rate address: 0x3e type: r reset: 0x00 nicam_stat nicam detection status address: 0x3f type: r reset: 0x00 12.8 stereo mode zwt_ctrl zweiton detector control address: 0x40 type: r/w 76543210 error[7:0] r [7:0] nicam error counter value 76543210 nic_det f_mute loa cbi[3:0] nic_mute r [7] nicam signal detect: 0: nicam signal no detected 1: nicam signal detected [6] frame mute: 0: no mute 1: mute due to superframe alignment loss [5] loss of the frame alignment word (faw): 0: no alignment lost 1: frame alignment word lost [4:1] indicates the received nicam control bits [0] indicates the nicam decoder mute 76543210 lrst_tone_o ff std_mode thresh[3:0] tsctrl[1:0] r/w
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 79/167 reset: 0x30 zwt_time zweiton detector timing address: 0x41 type: r/w reset: 0x04 [7] control of the reset of the tone detector: 0: periodical reset of tone detection enabled 1: periodical reset of tone detection disabled note: the following register bit is controlled by autostandard and is forced by default to read-only mode. [6] 0: german standard (default) 1: korean standard [5:2] defines the threshold of the detector for pilot and tone frequencies: level (% of the mid scale) level (% of the mid scale) 0000 0 1000 50 0001 6.25 1001 56.25 0010 12.5 1010 62.5 0011 18.75 1011 68.75 0100 25 1100 (default) 75 0101 31.25 1101 81.25 0110 37.5 1110 87.5 0111 43.75 1111 93.75 [1:0] defines both the detection time and the e rror probability (r eliability of the detection). sample accumulation decision count time (ms) error probability 00 1024 2 256 10 -4 01 (default) 1024 3 384 10 -6 10 2048 2 512 10 -7 11 2048 3 768 10 -9 76543210 00000 zwt_time[2:0] r/w [7:3] reserved. note: the following register bits are controlled by autostandard and are forced by default to read-only mode. [2:0] defines the period (durat ion) of the reset tone used for tone detection system reset. 000: 256 ms 100: 1280 ms 001: 512 ms 101: 1536 ms 010: 768 ms 110: 1792 ms 011: 1024 ms 111: 2040 ms
register list stv8247, stv8257, stv8277, stv8287 80/167 doc id 10163 rev 3 zwt_stat zweiton status address: 0x42 type: r reset: 0x00 12.9 analog control adc_ctrl i2s_data0 and adc input selection and power-up address: 0x56 type: r/w reset: 0x08 76543210 lrst_tone_o ff 000 zw_stat_ rdy zw_det zw_st zw_dm r [7] indicates the status of the control bit programmed in the reg zwt-ctrl: 0: periodical reset of tone detection enabled 1: periodical reset of tone detection disabled [6:4] reserved. [3] periodic flag indicating when the tone detec tion flags are updated and ready to be read [2] pilot detection flag [1] stereo tone detection flag [0] dual mono tone detection flag 76543210 i2s_data0_ctrl[1:0] 0 0 adc_power_ up adc_input_sel[2:0] r/w [7:6] source selection for output i2s_data0 00 = scart 01 = l, r 10 = hp or srnd 11 = c/sub [5:4] reserved. [3] control of the power up of the audio adc: 0: adc in power down mode 1: wake up of the adc
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 81/167 scart1_2_output_ctrl scart 1_2 output selection and mute address: 0x57 type: r/w reset: 0xa8 scart3_output_ctrl scart 3 output selection and mute address: 0x58 type: r/w reset: 0x0b [2:0] selection of the adc input signal: 000: scart 1 (default) 011: scart 4 001: scart 2 100: mono input 010: scart 3 other: reserved 76543210 sc2_mute sc2_output_sel[2:0] sc1_mute sc1_output_sel[2:0] r/w [7] mute command for the output scart 2: 0: output not muted 1: output muted [6] selection of the output scart 2 configuration: 000: dsp 100: input scart 3 001: mono input 101: input scart 4 010: input scart 1 (default) other: reserved 011: input scart 2 [5] mute command for the output scart 1: 0: output not muted 1: output muted [4] selection of the output scart 1 configuration: 000: dsp (default) 100: input scart 3 001: mono input 101: input scart 4 010: input scart 1 other: reserved 011: input scart 2 76543210 0 0 0 0 sc3_mute sc3_output_sel[2:0] r/w [7:4] reserved. [3] mute command for the output scart 3: 0: output not muted 1: output muted
register list stv8247, stv8257, stv8277, stv8287 82/167 doc id 10163 rev 3 clocking 2 fs2_div fs2 i/o divider programming address: 0x5a type: r/w 0x11 fs2_md fs2 coarse selection address: 0x5b type: r/w reset: 0x10 [2:0] selection of the output scart 3 configuration: 000: dsp 100: input scart 3 001: mono input 101: input scart 4 010: input scart 1 other: reserved 011: input scart 2 (default) 76543210 0 0 ndiv2[1:0] sdiv2[2:0] r/w [7:6] reserved. [5:4] fs2 input clock divider selection [3] reserved. [2:0] fs2 output clock divider selection 76543210 0 0 0 md2[4:0] r/w [7:5] reserved. [4:0] fs2 coarse selection
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 83/167 fs2_pe_h fs2 fine selection (msbs) address: 0x5c type: r/w reset: 0x5c fs2_pe_l fs2 fine selection (lsbs) address: 0x5d type: r/w reset: 0x29 12.10 dsp control host_cmd dsp hardware control address: 0x80 type: r/w reset: 0x00 76543210 pe_h2[7:0] r/w [7:0] fs2 fine selection (msbs) 76543210 pe_l2[7:0] r/w [7:0] fs2 fine selection (lsbs) 76543210 it_in_dsp 0 0 0 0 hw_reset r/w [7] valid i 2 c table. [6:3] reserved. [2] dsp hardware run when set [1:0] reserved.
register list stv8247, stv8257, stv8277, stv8287 84/167 doc id 10163 rev 3 irq_status irq status address: 0x81 type: r/w reset: 0x00 soft_version embedded software version address: 0x82 type: r reset: 0x02 onchip_algos display algorithms available on the chip address: 0x83 type: r reset: 0x00 76543210 irq7 irq6 irq5 irq4 irq3 irq2 irq1 irq0 r/w [7:4] reserved [3] unmute hp/srnd dac irq [2] hp connection/deconnection irq [1] i 2 s lock lost irq [0] autostandard irq 76543210 soft_version[7:0] r [7:0] version of the embedded software. 76543210 0 pro_logic_s elect nicam i2s_input trubass tru surround pro_logic multichannel r [7] reserved. [6] 0: dolby pro logic i 1: dolby pro logic ii [5] nicam demodulator is present when set. [4] 0: 1 i 2 s input 1: 3 i 2 s inputs
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 85/167 dsp_status dsp status address: 0x84 type: r reset: 0x00 dsp_run dsp configuration and run address: 0x85 type: r/w reset: 0x00 [3] srs trubass algorithm is present when set. [2] srs trusurround algorithm is present when set. [1] dolby pro logic algorithm is present when set. [0] multi-channels output is present when set. 76543210 0000000init_mem r [7:1] reserved. [0] dsp initialization: 0: dsp is not initialized. 1: dsp is initialized. 76543210 000000 host_ no_init host_run r/w [7:2] reserved [1] 0: i 2 c register table is initialized when we soft reset 1: i 2 c register table is not initialized when we soft reset [0] 0: soft reset dsp 1: start dsp processing
register list stv8247, stv8257, stv8277, stv8287 86/167 doc id 10163 rev 3 i2s_in_config i2s configuration address: 0x86 type: r/w reset: 0x86 av_delay audio/video delay address: 0x89 type: r/w reset: 0x00 note: av_delay acts on both ls and hp paths simultaneously (same delay) 76543210 lock_mode_ en 0 sync lrclk_start lrclk_ polarity sclk_ polarity data_cfg i2s_mode r/w [7] 0: disable lock mode for external i 2 s input 1: enable lock mode for external i 2 s input [6] reserved. [5] i 2 s synchronisation: 0: capture directly 1: wait for synchro [4] according to lrclk polarity, first data take: 0: left 1: right [3] polarity of the left data [2] 0: falling edge 1: rising edge [1] 0: lsb first 1: msb first [0] 0: non standard mode 1: standard mode 76543210 delay_time delay_on r/w [7] audio delay time (see ta bl e 1 8 ) 0000000: 0 ms ... 0111100: 60 ms (48 khz) ... 1011010: 90 ms (32 khz) [6] audio/video delay is enabled when set.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 87/167 note: all audio delay values are in milliseconds. 12.11 automatic standard recognition autostd_ctrl automatic standard recognition control address: 0x8a type: r/w reset: 0x01 table 18. audio/video delay (lip sync) configuration register values output input source av_delay (89h) ls_l ls_r hp_l/r scart_l scart_r delay_time[6: 0] delay_ on snrd_delay[4: 0] center_delay [3:0] source sif source scart source sif source scart source sif source scart source sif source scart source sif source scart sif or scart (32khz) 10110100 90 1 xxx00000 0 xxxx0000 0 90 90 90 90 90 90 0 0 0 0 10110100 90 1 xxx00000 0 xxxx1010 10 60 60 60 60 60 60 0 0 0 0 10110100 90 1 xxx11110 30 xxxx0000 0 60 60 60 60 60 60 0 0 0 0 10110100 90 1 xxx11110 30 xxxx1010 10 60 60 60 60 60 60 0 0 0 0 scart only (48khz) 01111000 60 1 xxx00000 0 xxxx0000 0 - 60 - 60 - 60 - 0 - 0 01111000 60 1 xxx00000 0 xxxx1010 10 - 30 - 30 - 30 - 0 - 0 01111000 60 1 xxx11110 30 xxxx0000 0 - 30 - 30 - 30 - 0 - 0 01111000 60 1 xxx11110 30 xxxx1010 10 - 30 - 30 - 30 - 0 - 0 76543210 000 force_squel ch single_shot dk_dev[1:0] ldk_sw r/w [7:5] reserved. [4] allow to force squelch detection 0: fm squelch is taken into consideration for mono detection 1: fm squelch is not taken into consideration for mono detection [3] single shot mode selection: 0: single shot mode is not selected 1: single shot mode is selected (1) [2:1] selects fm deviation configuration to take into account of overmodulation in dk_nicam standard. 00: fm 50 khz (default) 01: fm 200 khz 10: fm 350 khz 11: fm 500 khz [0] makes exclusive the auto search of dk/k1/k2/k3 and l/l? standard 0: dk/k1/k2/k3 standard auto -search / l/l? disabled 1: l/l? standard auto-search dk/k1/k2/k3 disabled
register list stv8247, stv8257, stv8277, stv8287 88/167 doc id 10163 rev 3 autostd_standard_detect auto standard check standard address: 0x8b type: r/w reset: 0x2f note: autostandard is off when all mono standards are disabled (ldk_sck = 0, i_sck = 0, bg_sck = 0 and mn_sck = 0). 1. single_shot mode can be used before disabling the automatic standard recognition (autostandard) to pre-program demodulator registers in a defined standard and reduce i2c programming in manual mode note: only standard deviation fm 50k khz is com patible with other d/k1/k2/k3 standards in automatic standard recognition search mode. fm deviation superior to 350 khz will degrade strongly nicam reception due to overlapping of fm and qpsk if spectrum in dk-nicam standard. l/l? and dk/k1/k2/k3 standard cannot be discriminated in automatic standard recognition search mode because the same frequency is used for the mono if carrier. 76543210 0 nicam_c4_off nicam_gap_m ode nicam_mono_ in ldk_sck i_sck bg_sck mn_sck r/w [7] reserved. [6] 0: autostandard considers the c4 bit for mono backup 1: autostandard ignores the c4 bit for mono backup [5] 0: nicam, fast search 1: nicam, slow search (no perturbat ions on left channel in search mode) [4] 0: the mono backup for nicam comes from the internal demodulator 1: the mono backup for nicam comes from the mono input [3] l/l? or d/k mono standard enable: 0: disabled 1: enabled [2] i mono standard enable: 0: disabled 1: enabled [1] b/g mono standard enable: 0: disabled 1: enabled [0] m/n mono standard enable: 0: disabled 1: enabled
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 89/167 autostd_stereo_detect auto standard check stereo address: 0x8c type: r/w reset: 0x1f note: stereo standard covers all transmission modes (stereo or multilanguage) of the nicam or zweiton (a2, a2* or a2+) system. 76543210 ldk_zwt3 ldk_zwt2 ldk_zwt1 ldk_nic i_nic bg_zwt bg_nic mn_zwt r/w [7] d/k3 zweiton (a2*) stereo standard enable: 0: disabled 1: enabled [6] d/k2 zweiton (a2*) stereo standard enable: 0: disabled 1: enabled [5] d/k1 zweiton (a2*) stereo standard enable: 0: disabled 1: enabled [4] d/k nicam stereo standard enable: 0: disabled 1: enabled [3] i nicam stereo standard enable: 0: disabled 1: enabled [2] b/g zweiton (a2) standard enable: 0: disabled 1: enabled [1] b/g nicam standard enable: 0: disabled 1: enabled [0] m/n zweiton (a2+) standard enable: 0: disabled 1: enabled
register list stv8247, stv8257, stv8277, stv8287 90/167 doc id 10163 rev 3 autostd_timers detection time-out address: 0x8d type: r/w reset: 0xa4 note: the time-out default value is optimum and does not normally need to be changed. 76543210 fm_time[1:0] nicam_time[2:0] zweiton_time[2:0] r/w [7:6] fm/am detection time-out: 00 : 16 ms 01: 32 ms 10: 48 ms (default) 11: 64 ms [5:3] nicam detection time-out: 000: 96 ms 001: 128 ms 010: 160 ms 011: 192 ms 100: 224 ms (default) 101: 256 ms 110: 288 ms 111: 320 ms [2:0] zweiton detection time-out: 000: forbidens 001: 512 ms 010: 768 ms 011: 1024 ms 100: 1280 ms (default) 101: 1536 ms 110: 1792 ms 111: 2040 ms
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 91/167 autostd_status detection standard status address: 0x8e type: r reset: 0x00 76543210 stereo_id stereo_ok mono_ok autostd_on stereo_sid[1:0] mono_sid[1:0] r [7] stereo mode detection flag activated when al l of the following conditions are true: 1. stereo standard coming from the demodulator is se lected on the loudspeakers output 2. stereo transmi ssion modes are: - zweiton stereo carrier and stereo modulati on (indifferently german or korean standard) - nicam stereo with backup (cbi = 1000) - nicam stereo with no backup (cbi = 0000) 3. stereo is selected for loudspea ker ouput (bit ls_language[1:0]) [6] stereo standard recognition status: 0: stereo standard not detected 1: stereo standard detected [5] mono standard recognition status: 0: mono standard not detected 1: mono standard detected [4] automatic standard recognition system status 0: automatic standard recognition system is off 1: automatic standard recognition system is on [3:0] identification of the det ected tv sound standard. see ta bl e 1 9 . table 19. tv sound standards system mono sound (mhz) mono_sid [1:0] ldk_sw dk_dev [1:0] stereo sound (mhz) stereo_sid [1:0] m/n 4.5 (fm 27k) 00 x xx 4.724 (zweiton a2+) 00 b/g 5.5 (fm 50k) 01 xxx 5.85 (nicam 40%) 00 xxx 5.742 (zweiton a2) 01 i 6.0 (fm 50k) 10 x xx 6.552 (nicam 100%) 00
register list stv8247, stv8257, stv8277, stv8287 92/167 doc id 10163 rev 3 note: x means not important. 12.12 audio preprocessing and selection dc_removal_input dc removal address: 0x90 type: r/w reset: 0x07 l6.5 (am) 11 1xx 5.85 (nicam 40%) 00 d/k 6.5 (fm 50k) 0 00 5.85 (nicam 40%) 00 6.5 (fm 200k) 01 6.5 (fm 350k) 10 6.5 (fm 500k) 11 d/k1/k2/k3 6.5 (fm 50k) 0xx 5.85 (nicam 40%) 00 0xx 6.258 (zweiton a2*) 01 0xx 6.742 (zweiton a2*) 10 0xx 5.742 (zweiton a2*) 11 76543210 0 0 0 0 0 dc_scart dc_nicam dc_demod r/w table 19. tv sound standards (continued) system mono sound (mhz) mono_sid [1:0] ldk_sw dk_dev [1:0] stereo sound (mhz) stereo_sid [1:0] [7:3] reserved. [2] 0: scart input, dc removal inactive 1: scart input, dc removal active [1] 0: nicam input, dc removal inactive 1: nicam input, dc removal active [0] 0: fm input, dc removal inactive 1: fm input, dc removal active
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 93/167 dc_removal_l fm dc offset left address: 0x91 type: r reset: 0x00 dc_removal_r fm dc offset right address: 0x92 type: r reset: 0x00 76543210 dc_removal_l[7:0] r [7:0] displays (in two?s complement format) the fm (or am) dc offset level after demodulation on channel 1 (and removed automatically). in fm mode, the dc offset value gives a direct value of the carrier frequency offset which is used to compensate the dco with the caroffset 1 value in the event of an out-of-standard offset. the range and the resolution depend upon the fm bandwidth programmed defined in register bcoeff1. see ta bl e 2 0 . 76543210 dc_removal_r[7:0] r [7:0] displays (in two?s complement format) the fm (or am) dc offset level after demodulation on channel 2 (and removed automatically). in fm mode, the dc offset value gives a direct value of the carrier frequency offset which is used to compensate the dco with the caroffset 2 value in the event of an out-of-standard offset. the range and the resolution depend upon the fm bandwidth programmed defined in register bcoeff2. see ta bl e 2 0 . table 20. dc_removal_l/r range and resolution fm mode range (khz) resolution (khz) small 96 0.750 standard & a2 standard 192 1.5 medium 384 3 large 768 6
register list stv8247, stv8257, stv8277, stv8287 94/167 doc id 10163 rev 3 prescale_select am/fm prescaling select address: 0x93 type: r/w reset: 0x00 prescale_am am prescaling address: 0x94 type: r/w reset: 0x00 76543210 0000000 am_fm_ select r/w [7:1] reserved. note: the following register bit is controlled by autostandard and is forced by default to read-only mode. [0] 0: fm prescale is applied to demodulator channels 1: am prescale is applied to demodulator channels 76543210 0 prescale_am r/w [7] reserved. [6:0] -12 to + 24 db am prescaling to normalize the am demodulated signal level before audio processing. auto level control can be implemented by i 2 c software using the peak level detector. (default value = 0 db) g (db) g (db) 0110000 +24 1101100 -10 0101111 +23.5 1101011 -10.5 0101110 +23 1101010 -11 0101101 +22.5 1101001 -11.5 0101100 +22 1101000 -12 and so on.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 95/167 prescale_fm fm prescaling address: 0x95 type: r/w reset: 0x0c prescale_nicam nicam prescaling address: 0x96 type: r/w reset: 0x00 76543210 0 prescale_fm r/w [7] reserved. [6:0] -12 to + 24 db fm prescaling to normalize the fm demodulated signal level before audio processing. auto level control can be implemented by i 2 c software using the peak level detector. (default value = +6 db) g (db) g (db) 0110000 +24 1101100 -10 0101111 +23.5 1101011 -10.5 0101110 +23 1101010 -11 0101101 +22.5 1101001 -11.5 0101100 +22 1101000 -12 and so on. 76543210 0 prescale_nicam r/w [7] reserved. [6:0] -6 to + 24 db nicam prescaling to normali ze the nicam demodulated signal level before audio processing. auto level control can be implemented by i 2 c software using the peak level detector. (default value = +13 db) g (db) g (db) 0110000 +24 1111000 -4 0101111 +23.5 1110111 -4.5 0101110 +23 1110110 -5 0101101 +22.5 1110101 -5.5 0101100 +22 1110100 -6 and so on.
register list stv8247, stv8257, stv8277, stv8287 96/167 doc id 10163 rev 3 prescale_scart scart prescaling address: 0x97 type: r/w reset: 0x00 prescale_i2s_0 i2s_0 prescaling address: 0x98 type: r/w reset: 0x00 76543210 0 0 prescale_scart r/w [7:6] reserved. [5:0] -12 to + 12 db scart prescaling to normalize the scart signal level before audio processing. auto level control can be implemented by i 2 c software using the peak level detector. (default value = 0 db) g (db) g (db) 011000 +12 101100 -10 010111 +11.5 101011 -10.5 010110 +11 101010 -11 010101 +10.5 101001 -11.5 010100 +10 101000 -12 and so on. 76543210 0 0 prescale_i2s_0[5:0] r/w [7:6] reserved. [5:0] -12 to + 12 db i2s_0 prescaling to normalize the i2s_0 signal level before audio processing. auto level control can be implemented by i 2 c software using the peak level detector. (default value = 0 db) g (db) g (db) 011000 +12 101100 -10 010111 +11.5 101011 -10.5 010110 +11 101010 -11 010101 +10.5 101001 -11.5 010100 +10 101000 -12 and so on.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 97/167 prescale_i2s_1 i 2 s1 prescaling address: 0x99 type: r/w reset: 0x00 prescale_i2s_2 i 2 s2 prescaling address: 0x9a type: r/w reset: 0x00 76543210 0 0 prescale_i2s_1[5:0] r/w [7] reserved. [6] -12 to + 12 db i2s_1 prescaling to normalize the i2s_1 signal level before audio processing. auto level control can be implemented by i 2 c software using the peak level detector. (default value = 0 db) g (db) g (db) 011000 +12 101100 -10 010111 +11.5 101011 -10.5 010110 +11 101010 -11 010101 +10.5 101001 -11.5 010100 +10 101000 -12 and so on. 76543210 0 0 prescale_i2s_2[5:0] r/w [7:6] reserved. [5:0] -12 to + 12 db i2s_2 prescaling to normalize the i2s_2 signal level before audio processing. auto level control can be implemented by i 2 c software using the peak level detector. (default value = 0 db) g (db) g (db) 011000 +12 101100 -10 010111 +11.5 101011 -10.5 010110 +11 101010 -11 010101 +10.5 101001 -11.5 010100 +10 101000 -12 etc.
register list stv8247, stv8257, stv8277, stv8287 98/167 doc id 10163 rev 3 deemphasis_dematrix de-emphasis-dematrix address: 0x9b type: r/w reset: 0x00 76543210 00 nicam_ dematrix nicam_ deemph_b ypass fm_dematrix fm_deemp h_bypass fm_deemp h_sw r/w [7:6] reserved. [5] dematrixing for ni cam demodulator input: 00: l=ch0, r=ch1 01: l=ch1, r=ch0 [4] 0: nicam de-emphasis is not bypassed. 1: nicam de-epmhasis is bypassed. note: the following register bits are controlled by autostandard and are forced by default to read-only mode. [3:2] dematrixing for fm demodulator input: 00: l=ch0, r=ch1 01: l=ch0+ch1, r=ch0-ch1 10: l=2ch0-ch1, r=ch1 11: l=(ch0+ch1)/2 , r=(ch0-ch1)/2 [1] 0: fm de-emphasis is not bypassed. 1: fm de-epmhasis is bypassed. [0] 0: 50 s fm de-emphasis. 1: 75 s fm de-epmhasis.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 99/167 peak_det_input peak detector input source address: 0xd9 type: r/w reset: 0x00 peak_det_l peak level detector status (l channel) address: 0x9e type: r reset: 0x00 76543210 peak_locatio n 0 peak_l_r_range peak_det_input[1:0] r/w [7] peak detector location: 0: peak detector placed between fm/nicam dematrix and audio matrix or between i2s prescale and downmix 1: peak detector placed before dc re moval (for input saturation detection) [6] reserved. [5:2] peak l-r range: 0000 : 0 dbfs to -42 dbfs 0001 : -6 dbfs to -48 dbfs 0010 : -12 dbfs to -54 dbfs 0011 : -18 dbfs to -60 dbfs ... [1:0] peak level detector source selection: 00: am/fm or i 2 s 0 01: nicam or i 2 s 1 10: scart or i 2 s 2 76543210 overload_l peak_l[6:0] r [7] memorize overload on the peak detection. this field can be reset.
register list stv8247, stv8257, stv8277, stv8287 100/167 doc id 10163 rev 3 peak_det_r peak level dete ctor status (r channel) address: 0x9f type: r/w reset: 0x00 peak_det_l_r peak level detector status (l - r) address: 0xa0 type: r reset: 0x00 [6:0] displays the absolute peak level of the audio source selected. the measured value is updated continuously every 64 ms. the range varies linearly from the full scale (0 db) down to 1/256 of the full scale (-48 db). in am/fm mono mode, only the peak_l[7:0] value must be taken into account. in fm mono mode, the audio peak level range depends upon the programmed fm bandwidth. the unique difference is that the measurement is done after sound pre-processing (dc offset removal, prescaling, de-emphasis and dematrixing). in fm stereo mode, the maximum value may be used to check if the incoming signal level is correctly adjusted by the prescaling factor or if there are no fm ov ermodulation problems (clipping). programmable values are listed in ta b l e 2 0 . 76543210 overload_r peak_r[6:0] r/w [7] memorize overload on the peak detection. this field can be reset. [6:0] displays the absolute peak level of the audio source selected. the measured value is updated continuously every 64 ms. the range varies linearly from the full scale (0 db) down to 1/256 of the full scale (-48 db). for more information, refer to register peak_det_l 76543210 overload_ l_r peak_l_r[6:0] r [7] memorize overload on the peak detection. this field can be reset. [6:0] displays the difference between l and r (l - r) channels for the audio source selected. for more information, refer to register peak_det_l .
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 101/167 12.13 matrixing audio_matrix_input audio matrix input selection address: 0xa2 type: r/w reset: 0x00 audio_matrix_config audio matrix configuration address: 0xa3 type: r/w reset: 0x00 76543210 00000 scart_ input_ source hp_input_ source ls_input_ source r/w [7:3] reserved. [2] select input source for scart output: 0: demod 1: scart input [1] select input source for hp output: 0: demod 1: scart input [0] select input source for ls output: 0: demod 1: scart input 76543210 000 scart_ matrix demod_matrix[3:0] r/w [7:5] reserved. [4] indicates the scart input signal matrixing (see ta bl e 2 2 . note: the following register bits are controlled by autostandard and are forced by default to read-only mode. [3:0] indicates the demod input signal matrixing (see ta bl e 2 1 .)
register list stv8247, stv8257, stv8277, stv8287 102/167 doc id 10163 rev 3 note: switching between stereo and forced mono m odes can be done using (fm_l + fm_r)/2 or (nic_l + nic_r)/2 configurations. table 21. demod matrix input mode language -> demod_m x stereo mono a mono b mono c backup mode lrlrlrlr mono am/fm with backup 0000 fm fm fm fm mono am/fm no backup 0001 - - - fm zwt st 0100 fm_l fm_r (fm_l + fm_r)/2 (fm_l + fm_r)/2 (fm_l + fm_r)/2 zwt dual 0101 fm_m1 fm_m2 fm_m1 fm_m2 (fm_m1 + fm_m2)/2 nicam mn, backup 1000 nic_m1 nic_m1 nic_m1 fm mono am/fm with backup nicam dual backup 1001 nic_m1 nic_m2 nic_m1 nic_m2 fm mono am/fm with backup nicam st, backup 1010 nic_l nic_r (nic_l + nic_r)/2 (nic_l + nic_r)/2 fm mono am/fm with backup nicam mn, no backup 1100 nic_m1 nic_m1 nic_m1 fm mono am/fm no backup nicam dual, no backup 1101 nic_m1 nic_m2 nic_m1 nic_m2 fm mono am/fm no backup nicam st, no backup 1110 nic_l nic_r (nic_l + nic_r)/2 (nic_l + nic_r)/2 fm mono am/fm no backup
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 103/167 audio_matrix_language audio matrix language selection address: 0xa4 type: r/w reset: 0x00 downmix_in_mode downmix in mode address: 0xa6 type: r/w reset: 0x02 table 22. scart matrix scart_m x stereo mono a mono b mono c scart_m x left right left right left right left 0 scart_l scart_r scart_l scart_r (scart_l + scart_r) /2 0 1 scart_r scart_l scart_r scart_l (scart_l + scart_r) /2 1 76543210 mute_stereo mute_all scart_language[1:0] hp_language[1:0] ls_language[1:0] r/w [7] mute outputs with stereo signal input [6] mute all outputs [5:4] select language for scart output [3:2] select language for hp output [1:0] select language for ls output 00: stereo 01: mono a 10: mono b 11: mono c 76543210 0 0 0 0 lfe_in mix_in_mode[2:0] r/w [7:4] reserved [3] 0: lfe signal is not inputed throught the downmix block 1: lfe signal is inputed th rought the downmix block
register list stv8247, stv8257, stv8277, stv8287 104/167 doc id 10163 rev 3 downmix_out_mode downmix out mode address: 0xa7 type: r/w reset: 0x4a [2:0] see ta b l e 2 3 table 23. downmix in modes parameter coding (decimal format) parameter field label function 0 mode11 mode not used in stv82x7 1mode101/0 (c) 2 mode20 2/0 (l,r) 3 mode30 3/0 (l,r,c) 4 mode21 2/1 (l,r,s) 5 mode31 3/1 (l,r,c,s) 6 mode22 2/2 (l,r,ls,rs) 7 mode32 3/2 (l,r,c,ls,rs) 76543210 0 hp_mode[1:0] scart_mod e[1:0] ls_out_mode[2:0] r/w [7] reserved. [6:5] see ta bl e 2 4 . [4:3] see ta bl e 2 5 . [2:0] see ta bl e 2 5 . table 24. downmix scart/hp modes parameter coding (decimal format) parameter field label function 0 mix_vcr_off switch off the vcr table setup 1 mix_vcr_prologic vcr table setup for tape outputs (for later decoding by a dolby prologic decoder - lt,rt) 2 mix_vcr_stereo vcr table setup for stereo and headphone listening (lo,ro) 3 mix_costom reserved
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 105/167 downmix_dual_mode downmix dual mode configuration address: 0xa8 type: r/w reset: 0x00 table 25. downmix ls out modes parameter coding (decimal format) parameter field label function 0 mode20t 2/0 dolby surround (lt,rt) 1 mode10 1/0 (c) 2 mode20 2/0 (l,r) 3 mode30 3/0 (l,r,c) 4 mode21 2/1 (l,r,s) 5 mode31 3/1 (l,r,c,s) 6 mode22 2/2 (l,r,ls,rs) 7 mode32 3/2 (l,r,c,ls,rs) 76543210 0 dual_on ls_dual_select[1:0] scart_dual_select[1:0] hp_dual_select[1:0] r/w [7] reserved. [6] 0: dual mode disable 1: dual mode enable [5:4] dual mono mode on ls output: 00: ls dual stereo 01: ls dual left mono 10: ls dual right mono 11: ls dual mixed [3:2] dual mono mode on scart output: 00: scart dual stereo 01: scart dual left mono 10: scart dual right mono 11: scart dual mixed [1:0] dual mono mode on hp output: 00: hp dual stereo 01: hp dual left mono 10: hp dual right mono 11: hp dual mixed
register list stv8247, stv8257, stv8277, stv8287 106/167 doc id 10163 rev 3 downmix_config downmix configuration address: 0xa9 type: r/w reset: 0x01 12.14 audio processing pro_logic2_control dolby pro logic 2 mode configuration address: 0xa4 type: r/w reset: 0x00 76543210 0 0 srnd_factor[1:0] center_factor[1:0] lr_upmix normalize r/w [7:6] reserved [5:4] 00: -3 db 01: -4.5 db 10: -6 db 11: -6 db [3:2] 00: -3 db 01: -4.5 db 10: -6 db 11: -4.5 db [1] 0: disable upmixing 1: enable upmixing (dts specified) [0] 0: disable normalization 1: enable normalization 76543210 pl2_lfe pl2_output_downmix[2:0] pl2_modes[2:0] pl2_active r/w [7] 0: reset the lfe channel 1: bypass the lfe channel [6:4] 000: not applicable 001: not applicable 010: not applicable 011: 3/0 output mode (l,r,c) 100: 2/1 output mode (l,r,ls - phantom) 101: 3/1 output mode (l,r,c,ls) 110: 2/2 output mode (l,r,ls,rs - phantom) 111: 3/2 output mode (l,r,c,ls,rs)
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 107/167 (x = user defined parameter) pcm_srnd_delay dolby surround delay address: 0xab type: r/w reset: 0x00 note: see ta bl e 1 8 for audio/video delay configuration. [3:1] 000: pro logic 1 emulation (forced if dpl version) 001: virtual (dpl2 version only) 010: music (dpl2 version only) 011: movie (standard) (dpl2 version only) 100: matrix (dpl2 version only) 101: custom (dpl2 version only) 110: not applicable (dpl2 version only) 111: not applicable (dpl2 version only) [0] 0: dolby prologic 2 is not active 1: dolby prologic 2 is active table 26. prologic ii decode mode configuration pl2 mode decode mode dimension center width auto- balance panorama surround coherence sur filtering 0 pro logic mmulation 301002 1virtual301010 2musicx x 0 x 1 1 3 movie/stand ard 301000 4matrix300011 5customxxxxxx 76543210 0 0 0 snrd_delay[4:0] r/w [7:5] reserved. [4:0] surround channel delay range: 0 to 30 (in ms)
register list stv8247, stv8257, stv8277, stv8287 108/167 doc id 10163 rev 3 pcm_center_delay dolby center delay address: 0xac type: r/w reset: 0x00 note: see ta bl e 1 8 for audio/video delay configuration. pro_logic2_config dolby pro logic 2 configuration address: 0xad type: r/w reset: 0x00 note: see ta bl e 2 6 for programming of these bits depending on the decode mode. 76543210 0000 center_delay[3:0] r/w [7] reserved. [6] center channel delay range: 0 to 10 (in ms) 76543210 pl2_lfe 0 0 pl2_srnd_filter[1:0] pl2_rs_ polarity pl2_ panorama pl2_ autobalance r/w [7] 0: reset the lfe channel 1: bypass the lfe channel [6:5] reserved. [4:3] 00: 0: off 01: 1: shelf filter (for music and matrix modes) 10: 2: 7 khz lp 11: 3: not applicable [2] 0: rs polarity normal 1: rs polarity inverted [1] 0: panorama off 1: panorama on [0] 0: autobalance off 1: autobalance on
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 109/167 pro_logic2_dimension dolby pro logic 2 dimension address: 0xae type: r/w reset: 0x00 note: see ta bl e 2 6 for programming of these bits depending on the decode mode. pro_logic2_level dolby pro logic 2 input level address: 0xaf type: r/w reset: 0x00 76543210 0 pl2_c_width 0 pl2_dimension r/w [7] reserved. [6:4] pro logic 2 center width: 000: 0, no spread = off 001: 20 010: 28 011: 36 100: 54 101: 62 110: 69 111: 90, phantom [3] reserved. [2:0] 000: -3, most surround 001: -2 010: -1 011: 0, neutral = off 100: 1 101: 2 110:3, most center 111: not applicable 76543210 pl2_level r/w [7:0] input gain attenuation: 0000 0000: 0 db 0000 0001: -0.5 db ... 1111 1111: -127.5 db
register list stv8247, stv8257, stv8277, stv8287 110/167 doc id 10163 rev 3 noise_generator pink noise generator address: 0xb0 type: r/w reset: 0x00 trusrnd_control srs trusurround control address: 0xb1 type: r/w reset: 0x00 76543210 10_db_ at t e n uat e sright_ noise sleft_ noise sub_ noise center_ noise right_ noise left_ noise noise_on r/w [7] 0: noise is output with full range 1: noise is output with a 10 db attenuation [6] 1: generates noise on ls right surround output [5] 1: generates noise on ls left surround output [4] 1: generates noise on ls subwoofer output [3] 1: generates noise on ls center output [2] 1: generates noise on ls right output [1] 1: generates noise on ls left output [0] 0: noise generation not active 1: noise generation is active 76543210 0 trusrnd_ mono_srnd trusrnd_input_ mode[3:0] trusrnd_ mode trusrnd_ on r/w [7] reserved. [6] 0: left mono srnd mode 1: right mono srnd mode [5:2] 0000: mono 0001: l/r stereo (srs mode) 0010: l/r/s (srs mode, prologic 1 process) 0011: l/r/ls/rs (srs mode) 0100: l/r/c (trusurround mode) 0101: l/r/c/s (trusurround mode, prologic 1 process) 0110: l/r/c/ls/rs (trusurround mode) 0111: lt/rt (trusurround mode) 1000: l/r/c/ls/rs (srs m ode, bs digital broadcast) 1001: l/r/c/ls/rs (trusurr ound, prologic 2 music mode)
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 111/167 note: usingtrusurround xt: - implementation of trusurround xt is done by setting the trusrnd_on bit to 1. - trusurround xt mode must be selected by trusrnd_ input_ mode[3:0] bits. - activation or non-activation of trusurround xt must be done by using the trusrnd_mode bit. trusrnd_input_gain trusurround input gain address: 0xb6 type: r/w reset: 0x00 trusrnd_hp_dcl trusurround hp dialog clarity address: 0xb7 type: r/w reset: 0x00 [1] 0: trusurround mode 1: bypass mode [0] 0: trusurround off 1: trusurround on 76543210 trusrnd_input_gain[7:0] r/w [7:0] input gain attenuation: 0000 0000: 0 db 0000 0001: -0.5 db ... 1111 1111: -127.5 db 76543210 00000 dialog_ clarity_on headphone_o n 0 r/w [7:3] reserved. [2] 0: dialog clarity off 1: dialog clarity on [1] activate hp mode in trusurround xt: 0: hp mode off 1: hp mode on [0] reserved.
register list stv8247, stv8257, stv8277, stv8287 112/167 doc id 10163 rev 3 trusrnd_dc_elevation trusur round dialog clarity level address: 0xb8 type: r/w reset: 0x0c trubass_ls_control srs trubass ls configuration address: 0xba type: r/w reset: 0x06 76543210 trusrnd_dc_elevation[7:0] r/w [7:0] dialog calrity elevation: 0000 0000: 0 db 0000 0001: -0.5 db ... 1111 1111: -127.5 db 76543210 0 0 0 0 trubass_ls_size[2:0] trubass_ ls_on r/w [7:4] reserved. [3:1] 000: lf response at 40 hz 001: lf response at 60 hz 010: lf response at 100 hz 011: lf response at 150 hz 100: lf response at 200 hz 101: lf response at 250 hz 110: lf response at 300 hz 111: lf response at 400 hz [0] 0: ls trubass off 1: ls trubass on
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 113/167 trubass_ls_level srs trubass ls level address: 0xbb type: r/w reset: 0x09 trubass_hp_control srs trubass hp configuration address: 0xbc type: r/w reset: 0x06 76543210 trubass_ls_level[7:0] r/w [7:0] define the amount of srs trubass effect for ls outputs: 0000 0000: 0 db 0000 0001: -0.5 db ... 1111 1111: -127.5 db 76543210 0 0 0 0 trubass_hp_size[2:0] trubass_hp_ on r/w [7:4] reserved. [3:1] 000: lf response at 40 hz 001: lf response at 60 hz 010: lf response at 100 hz 011: lf response at 150 hz 100: lf response at 200 hz 101: lf response at 250 hz 110: lf response at 300 hz 111: lf response at 400 hz [0] 0: hp trubass off 1: hp trubass on
register list stv8247, stv8257, stv8277, stv8287 114/167 doc id 10163 rev 3 trubass_hp_level srs trubass hp level address: 0xbd type: r/w reset: 0x09 svc_ls_control smart volume control for ls address: 0xbe type: r/w reset: 0x02 svc_ls_time_th smart volume control parameters for ls address: 0xbf type: r/w reset: 0x98 76543210 trubass_hp_level[7:0] r/w [7:0] defines the amount of srs trubass effect for hp outputs: 0000 0000: 0 db 0000 0001: -0.5 db ... 1111 1111: -127.5 db 76543210 0 0 0 0 svc_ls_input[1:0] svc_ls_amp svc_ls_on r/w [7:4] reserved. [3:2] select input for peak detection in multi-channel mode: 00: left/right 01: center 10: left/right/center [1] 0: 0 db amplification in auto-mode 1: +6 db amplific ation in auto-mode [0] 0: manual mode(simple prescaler) 1: automatic mode 76543210 svc_ls_time[2:0] svc_ls_threshold[4:0] (s) r/w
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 115/167 svc_hp_control smart volume control for hp address: 0xc0 type: r/w reset: 0x02 [7:5] time constant for the amplificatio n (6 db gain step) in automatic mode: 000: 30 ms 001: 200 ms 010: 500 ms 011: 1 s 100: 16 s 101: 32 s 110: 64 s 111: 128 s [4:0] see ta bl e 2 7 and ta bl e 2 8 . table 27. gain (threshold field) values in manual mode manual mode gain (db) manual mode gain (db) 00101 +15.5 11101 -8.5 00100 +12 11100 -12 00011 +9.5 11011 -14.5 00010 +6 11010 -18 00001 +3.5 11001 -20.5 00000 0 11000 -24 11111 -2.5 10111 -26.5 11110 -6 10110 -30 table 28. threshold values in automatic mode automatic mode threshold (db) automatic mode threshold (db) 11111 -2.5 11010 -18 11110 -6 11001 -20.5 11101 -8.5 11000 -24 11100 -12 10111 -26.5 11011 -14.5 10110 -30 76543210 000000 svc_ lhp_amp svc_hp_on r/w [7:2] reserved.
register list stv8247, stv8257, stv8277, stv8287 116/167 doc id 10163 rev 3 svc_hp_time_th smart volume control parameters for hp address: 0xc1 type: r/w reset: 0x98 svc_ls_gain make-up gain for svc ls address: 0xc2 type: r/w reset: 0x00 [1] 0: 0 db amplification in auto-mode 1: +6 db amplific ation in auto-mode [0] 0: manual mode (simple prescaler) 1: automatic mode 76543210 svc_hp_time[2:0] svc_hp_threshold[4:0] (s) r/w [7:5] time constant for the amplificatio n (6 db gain step) in automatic mode: 000: 30 ms 001: 200 ms 010: 500 ms 011: 1 s 100: 16 s 101: 32 s 110: 64 s 111: 128 s [4:0] see ta bl e 2 7 and ta bl e 2 8 . 76543210 0 svc_ls_gain[6:0] r/w [7] reserved. [6:0] set ?make-up? gain a pplied at svc ls output: 0000000: +0 db 0000001: +0.5 db ... 0101110: +23 db 0101111: +23.5 db 0110000: +24 db
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 117/167 svc_hp_gain make-up gain for svc hp address: 0xc3 type: r/w reset: 0x00 stsrnd_control st widesurround control address: 0xc4 type: r/w reset: 0x00 76543210 0 svc_hp_gain[6:0] r/w [7] reserved. [6:0] set ?make-up? gain a pplied at svc hp output: 0000000: +0 db 0000001: +0.5 db ... 0101110: +23 db 0101111: +23.5 db 0110000: +24 db 76543210 00000 stsrnd_ stereo stsrnd_ mode stsrnd_on r/w [7:3] reserved. [2] st widesurround mode 0: st widesurround sound in mono mode (default) 1: st widesurround sound in stereo mode [1] st widesurround sound stereo mode 0: movie mode 1: music mode [0] st widesurround sound enable 0: st widesurround sound is disabled 1: st widesurround sound is enabled
register list stv8247, stv8257, stv8277, stv8287 118/167 doc id 10163 rev 3 stsrnd_freq st widesurround sound frequency address: 0xc5 type: r/w reset: 0x15 stsrnd_level st widesurround gain address: 0xc6 type: r/w reset: 0x80 76543210 0 0 stsrnd_bass[1:0] stsrnd_medium[1:0] stsrnd_treble[1:0] r/w [7:6] reserved. [5:4] defines the bass frequency effect for st wi desurround sound. programmable values are listed in ta bl e 2 9 . [3:2] defines the medium frequency effect for st widesurround sound in movie or mono mode (no effect in music mode). programmable values are listed in ta b l e 2 9 . [1:0] defines the treble frequency effect for st widesurround sound in movie or mono mode (no effect in music mode). programmable values are listed in ta b l e 2 9 . table 29. phase shifter center frequencies phase shifter center frequency bass_freq[1:0] medium_freq[1:0] treble_freq[1:0] 00 40 hz 202 hz 2 khz 01 (default) 90 hz 416 hz 4 khz 10 120 hz 500 hz 5 khz 11 160 hz 588 hz 6 khz 76543210 stsrnd_gain[7:0] r/w [7:0] defines the st widesurround s ound component gain in linear scale. level (%) level (%) 1000 0000 (default) 100% 0000 0100 3.1% 0111 1111 99.2% 0000 0011 2.3% 0111 1110 98.4% 0000 0010 1.6% 0111 1101 97.6% 0000 0001 0.8% ........ 0000 0000 0%
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 119/167 omnisurround_control st omnisurround configuration address: 0xc7 type: r/w reset: 0x00 st_dynamic_bass st dynamic bass congiguration address: 0xc8 type: r/w reset: 0x00 76543210 lfe st_voice[1:0] front_ bypass omni_surnd_input_mode[3:0] omnisrnd_on r/w [7] 0: do not use lfe channel 1: generate lfe channel [6:5] 00: off 01: low 10: mid 11: high [4] forced to 0 [3:1] 000: mono 001: l/r stereo 010: l/r/s 110: l/r/c/ls/rs 011: l/r/ls/rs 100: l/r/c 101: l/r/c/s 111: lt/rt (passive matrix) [0] 0: omnisurround off 1: omnisurround on 76543210 bass_level[4:0] bass_freq[1:0] dyn_bass_ on r/w [7:3] set st dynamic bass effect level: 00000: +0 db 00001: +0.5 db ... 11101: +14.5 db 11110: +15 db 11111: +15.5 db
register list stv8247, stv8257, stv8277, stv8287 120/167 doc id 10163 rev 3 12.15 5-band equalizer/bass -treble for loudspeakers ls_eq_bt_ctrl loudspeakers equalizer control address: 0xc9 type: r/w reset: 0x01 eq_bandx_gain loudspeakers equalizer gain for band x address: 0xca to 0xce type: r/w reset: 0x00 [2:1] 00: 100 hz cut-off frequency 01: 150 hz cut-off frequency 10: 200 hz cut-off frequency 11: reserved [0] 0: st dynamic bass off 1: st dynamic bass on 76543210 000000 ls_eq_bt_ sw ls_eq_on r/w [7:2] reserved. [1] 5-band equalizer or bass-treble selection 0: 5-band equalizer is selected for loudspeakers. 1: bass-treble is selected for loudspeakers. [0] 5-band equalizer/bass-treble for loudspeakers enable 0: 5-band equalizer/bass-teble is disabled 1: 5-band equalizer/bass-teble is enabled (default) 76543210 eq_bandx r/w [7:0] bandx gain adjustment within a range fr om -12 db to +12 db in steps of 0.25 db. band1: 100 hz, band2: 330 hz, band3: 1 khz, band4: 3.3 khz, band5: 10 khz, see ta b l e 3 0 .
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 121/167 ls_bass_gain loudspeakers bass gain address: 0xcf type: r/w reset: 0x00 note: with positive bass/treble settings, internal clipping may occur even with an overall volume of less than 0 db. this will lead to a clipped output signal. therefore, it is not recommended to set bass/treble bands to a value that, in conjunction with volume, would result in an overall positive gain. ls_treble_gain loudspeakers treble gain address: 0xd0 type: r/w reset: 0x00 note: with positive bass/treble settings, internal clipping may occur even with an overall volume of less than 0 db. this will lead to a clipped output signal. therefore, it is not recommended to table 30. loudspeakers equalizer/bass-treble gain values (and headphone bass-treble gain values) value gain g (db) 00110000 +12 00101111 +11.75 00101110 +11.50 ................ ..... 00000000 (default) 0 ................ ..... 11010010 -11.50 11010001 -11.75 11010000 -12 76543210 ls_bass[7:0] r/w [7:0] bass gain adjustment within a range from -12 db to +12 db in steps of 0.25 db. 76543210 ls_treble r/w [7:0] treble gain adjustment within a range from -12 db to +12 db in steps of 0.25 db.
register list stv8247, stv8257, stv8277, stv8287 122/167 doc id 10163 rev 3 set bass/treble bands to a value that, in conjunction with volume, would result in an overall positive gain. 12.16 headphone bass-treble hp_bt_control headphone bass-treble control address: 0xd1 type: r/w reset: 0x01 hp_bass_gain headphone bass gain address: 0xd2 type: r/w reset: 0x00 note: with positive bass/treble settings, internal clipping may occur even with an overall volume of less than 0 db. this will lead to a clipped output signal. therefore, it is not recommended to set bass/treble bands to a value that, in conjunction with volume, would result in an overall positive gain. 76543210 0000000hp_bt_on r/w [7:1] reserved. [0] bass-treble for headphone enable 0: bass-teble is disabled 1: bass-teble is enabled (default) 76543210 hp_bass_gain[7:0] r/w [7] gain tuning of headphone bass frequency gain may be programmed within a range between +12 db and -12 db in steps of 0.25 db. programmable values are listed in ta b l e 3 0 .
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 123/167 hp_treble_gain headphone treble gain address: 0xd3 type: r/w reset: 0x00 note: with positive bass/treble settings, internal clipping may occur even with an overall volume of less than 0 db. this will lead to a clipped output signal. therefore, it is not recommended to set bass/treble bands to a value that, in conjunction with volume, would result in an overall positive gain. output_bass_mngt bass redirection address: 0xd4 type: r/w reset: 0x80 76543210 hp_treble_gain[4:0] r/w [7:0] gain tuning of headphone treble frequency gain may be programmed within a range between +12 db and -12 db in steps of 0.25 db. programmable values are listed in ta b l e 3 0 . 76543210 bass_ manage_on 0 sub_active gain_ switch 0 ocfg_num[2:0] r/w [7] 0: bassmanagement disables 1: bassmanagement enabled [6] reserved. [5] 0: subwoofer output is disabled (only in config 2,3,4) 1: subwoofer output is active [4] 0: level adjustment on 1: level adjustment off [3] reserved [2:0] select bass management configuration: 000: bass management configuration 0 (refer to figure 9 ) 001: bass management confi guration 1 (refer to figure 10 ) 010: bass management confi guration 2 (refer to figure 11 ) 011: bass management confi guration 3 (refer to figure 12 ) 100: bass management confi guration 4 (refer to figure 13 )
register list stv8247, stv8257, stv8277, stv8287 124/167 doc id 10163 rev 3 ls_loudness loudness configuration for ls address: 0xd5 type: r/w reset: 0x00 hp_loudness loudness configuration for hp address: 0xd6 type: r/w reset: 0x04 76543210 0 ls_loud_threshold[2:0] ls_loud_gain_hr[2:0] ls_ loud_on r/w [7] reserved. [6:4] define the volume threshold level since which loudness effect is applied : 000: 0 db 001: -6 db 010: -12 db 011: -18 db 100: -24 db 101: -32 db 110: -36 db 111: -42 db [3:1] define the amount of treble added by loudness effect: 000: 0 db 001: 3 db 010: 6 db 011: 9 db 100: 12 db 101: 15 db 110: 18 db 111: 21 db [0] 0: loudness is not active on ls output 1: loudness is active on ls output 76543210 0 hp_loud_threshold[2:0] hp_loud_gain_hr[2:0] hp_ loud_on r/w [7] reserved.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 125/167 12.17 volume volume_modes set the volume modes address: 0xd7 type: r/w reset: 0xc7 [6:4] define the volume threshold level since which loudness effect is applied : 000: 0 db 001: -6 db 010: -12 db 011: -18 db 100: -24 db 101: -32 db 110: -36 db 111: -42 db [3:1] define the amount of treble added by loudness effect: 000: 0 db 001: 3 db 010: 6 db 011: 9 db 100: 12 db 101: 15 db 110: 18 db 111: 21 db [0] 0: loudness is not active on hp output 1: loudness is active on hp output 76543210 anticlip_hp_v ol_clamp anticlip_ls_v ol_clamp 00 scart_ volume_ mode srnd_ volume_ mode hp_ volume_ mode ls_ volume_ mode r/w [7] the output level is clamped depending on the hp bass-treble value to avoid any possible signal clipping on hp output. 0: volume clamp on hp output is not active 1: volume clamp on hp output is active [6] the output level is clamped depending on the ls equalizer or ls bass-treble value to avoid any possible signal clipping on ls output. 0: volume clamp on ls output is not active 1: volume clamp on ls output is active [5:4] reserved [3] volume mode for scart output: 0:independent 1: differential
register list stv8247, stv8257, stv8277, stv8287 126/167 doc id 10163 rev 3 note: 1 for the use of volume and balance control refer to figure 15 and figure 16 . 2 in differential mode the left register is used for volume control and the right register is used for balance control. ls_l_volume_msb loudspeaker left volume msb address: 0xd8 type: r/w reset: 0x98 ls_l_volume_lsb loudspeaker left volume lsb address: 0xd9 type: r/w reset: 0x00 note: the volume value is defined by the following formula: vol (db) = decimal value of ls_l_volume_msb x 0.5 + decimal value of ls_l_volume_lsb x 0.125 - 116 db (each step is 0.125 db). [2] volume mode for headphone output: 0: independent 1: differential [1] volume mode for surround output: 0: independent 1: differential [0] volume mode for ls output: 0: independent 1: differential 76543210 ls_l_volume_msb r/w [7] ls 10 bits volume left channel 8 msb in independent mode or ls 10 bits volume left and right channels 8 msb in differential mode. see figure 15 for range values. 76543210 000000ls_l_volume_lsb[1:0] r/w [7:2] reserved. [1:0] ls 10 bits volume left channel 2 lsb in independent mode or ls 10 bits volume left and right channels 2 lsb in differential mode. see figure 15 or figure 16 .
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 127/167 ls_r_volume_msb loudspeaker right volume msb address: 0xda type: r/w reset: 0x00 ls_r_volume_lsb loudspeaker right volume lsb address: 0xdb type: r/w reset: 0x00 ls_c_volume_msb loudspeaker center volume msb address: 0xdc type: r/w reset: 0x98 76543210 ls_r_volume_msb[7:0] r/w [7] ls 10 bits volume right channel 8 msb in i ndependent mode or ls 10 bits left and right balance 8 msb in differential mode. see figure 15 or figure 16 . 76543210 000000ls_r_volume_lsb[1:0] r/w [7:2] reserved. [1:0] ls 10 bits volume right channel 2 lsb in i ndependent mode or ls 10 bits left and right balance 2 lsb in differential mode. see figure 15 or figure 16 . 76543210 ls_c_volume_msb[7:0] r/w [7:0] ls 10 bits volume center channel 8 msb see figure 15 for range values.
register list stv8247, stv8257, stv8277, stv8287 128/167 doc id 10163 rev 3 ls_c_volume_lsb loudspeaker center volume lsb address: 0xdd type: r/w reset: 0x00 note: the volume value is defined by the following formula: vol (db) = decimal value of ls_c_volume_msb x 0.5 + decimal value of ls_c_volume_lsb x 0.125 - 116 db (each step is 0.125 db). ls_sub_volume_msb loudspeaker subwoofer volume msb address: 0xde type: r/w reset: 0x98 ls_sub_volume_lsb loudspeaker subwoofer volume lsb address: 0xdf type: r/w reset: 0x00 76543210 000000ls_c_volume_lsb[1:0] r/w [7] reserved. [6] ls 10 bits volume center channel 2 lsb see figure 15 for range values. 76543210 ls_sub_volume_msb[7:0] r/w [7:0] ls 10 bits volume subwoofer channel 8 msb see figure 15 for range values. 76543210 0 0 0 0 0 0 ls_sub_volume_lsb[1:0] r/w [7:2] reserved. [1:0] ls 10 bits volume subwoofer channel 2 lsb see figure 15 for range values.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 129/167 note: the volume value is defined by the following formula: vol (db) = decimal value of ls_sub_volume_msb x 0.5 + decimal value of ls_sub_volume_lsb x 0.125 - 116 db (each step is 0.125 db). ls_sl_volume_msb loudspeaker left surround volume msb address: 0xe0 type: r/w reset: 0x98 ls_sl_volume_lsb loudspeaker left surround volume lsb address: 0xe1 type: r/w reset: 0x00 note: the volume value is defined by the following formula: vol (db) = decimal value of ls_sl_volume_msb x 0.5 + decimal value of ls_sl_volume_lsb x 0.125 - 116 db (each step is 0.125 db). ls_sr_volume_msb loudspeaker right surround volume msb address: 0xe2 type: r/w reset: 0x00 76543210 ls_sl_volume_msb[7:0] r/w [7:0] ls 10 bits volume left surround channel 8 msb in independent mode or ls 10 bits left and right surround volume 8 msb in differential mode. see figure 15 or figure 16 . 76543210 0 0 0 0 0 0 ls_ls_volume_lsb[1:0] r/w [7:2] reserved. [1:0] ls 10 bits volume left surround channel 2 lsb in independent mode or ls 10 bits left and right surround volume 2 lsb in differential mode. see figure 15 or figure 16 . 76543210 ls_sr_volume_msb[7:0] r/w
register list stv8247, stv8257, stv8277, stv8287 130/167 doc id 10163 rev 3 ls_sr_volume_lsb loudspeaker right surround volume lsb? address: 0xe3 type: r/w reset: 0x00 note: the volume value is defined by the following formula: vol (db) = decimal value of ls_sr_vo lume_msb x 0.5 + decimal value of ls_sr_volume_lsb x 0.125 - 116 db (each step is 0.125 db). l s_master_volume_msb loudspeaker master volume msb address: 0xe4 type: r/w reset: 0xe8 ls_master_volume_lsb loudspeak er master volume lsb address: 0xe5 type: r/w reset: 0x00 [7:0] ls 10 bits volume right channel 8 msb in independent mode or ls 10 bits surround left and right balance 8 msb in differential mode. see figure 15 or figure 16 . 76543210 0 0 0 0 0 0 ls_sr_volume_lsb[1:0] r/w [7] reserved. [6] ls 10 bits volume right channel 8 msb in independent mode or ls 10 bits surround left and right balance 2 lsb in differential mode. see figure 15 or figure 16 . 76543210 ls_master_volume_msb[7:0] r/w [7] ls 10 bits volume master channel 8 msb see figure 15 for range values. 76543210 000000 ls_master_volume _lsb[1:0] r/w
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 131/167 note: the volume value is defined by the following formula: vol (db) = decimal value of ls_master_volume_msb x 0.5 + decimal value of ls_master_volume_lsb x 0.125 - 116 db (each step is 0.125 db). hp_l_volume_msb headphone left volume msb address: 0xe6 type: r/w reset: 0x98 note: the volume value is defined by the following formula: vol (db) = decimal value of hp_l_volume_msb x 0.5 + decimal value of hp_l_volume_lsb x 0.125 - 116 db (each step is 0.125 db). hp_l_volume_lsb headphone left volume lsb address: 0xe7 type: r/w reset: 0x00 note: the volume value is defined by the following formula: vol (db) = decimal value of hp_l_volume_msb x 0.5 + decimal value of hp_l_volume_lsb x 0.125 - 116 db (each step is 0.125 db). [7] reserved. [6] ls 10 bits volume master channel 2 lsb see figure 15 for range values. 76543210 hp_l_volume_msb[7:0] r/w [7] hp 10 bits volume left channel 8 msb in indepe ndent mode or hp 10 bits left and right volume 8 msb in differential mode. see figure 15 or figure 16 . 76543210 hp_r_volume_msb[7:0] r/w [7:2] reserved [7:0] hp 10 bits volume left channel 2 lsb in inde pendent mode or hp 10 bits left and right volume 2 lsb in differential mode. see figure 15 or figure 16 .
register list stv8247, stv8257, stv8277, stv8287 132/167 doc id 10163 rev 3 hp_r_volume_lsb headphone right volume lsb address: 0xe9 type: r/w reset: 0x00 hp_r_volume_msb headphone right volume msb address: 0xe8 type: r/w reset: 0000 0000 scart_l_volume_msb hea dphone left volume msb address: 0xea type: r/w reset: 0xdd 76543210 000000hp_r_volume_lsb[1:0] r/w [7:2] reserved. [1:0] hp 10 bits volume right channel 2 lsb in independent mode or hp 10 bits left and right balance 2lsb in differential mode. see figure 15 or figure 16 . 7 6 5 4 32 1 0 hp_r_volume_msb[7:0] r/w [7:0] 8 msbs of the 10-bit right headphone volume 76543210 scart_l_volume_msb[7:0] r/w [7:0] scart 10 bits volume left channel 8 msb in independent mode or scart10 bits left and right volume 8 msb in differential mode. see figure 15 or figure 16 .
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 133/167 scart_l_volume_lsb theadphone left volume lsb address: 0xeb type: r/w reset: 0x00 note: the volume value is defined by the following formula: vol (db) = decimal value of scart_l_volume_msb x 0.5 + decimal value of scart_l_volume_lsb x 0.125 - 116 db (each step is 0.125 db). scart_r_volume_msb scart right volume msb address: 0xec type: r/w reset: 0xdd scart_r_volume_lsb scart right volume lsb address: 0xed type: r/w reset: 0x00 76543210 0 0 0 0 0 0 scart_l_volume_lsb[1:0] r/w [7:2] reserved. [1:0] scart 10 bits volume left channel 2 lsb in independent mode or scart10 bits left and right volume 2 lsb in differential mode. see figure 15 or figure 16 . 76543210 scart_r_volume_msb[7:0] r/w [7:0] scart 10 bits volume right channel 8 msb in independent mode or scart10 bits left and right balance 8 msb in differential mode. see figure 15 or figure 16 . 76543210 0 0 0 0 0 0 scart_r_volume_lsb[1:0] r/w [7:2] reserved.
register list stv8247, stv8257, stv8277, stv8287 134/167 doc id 10163 rev 3 12.18 beeper beeper_on beeper activation address: 0xee type: r/w reset: 0x00 beeper_mode beeper control address: 0xef type: r/w reset: 0x03 [1:0] scart 10 bits volume right channel 2 l sb in independent mode or scart10 bits left and right balance 2 lsb in differential mode. see figure 15 or figure 16 . 76543210 0 0 0 0 0 0 0 beeper_on r/w [7:1] reserved. [0] beeper enable: 0: beeper muted (default.) 1: beeper enabled. 76543210 0 0 0 beeper_duration beeper_ pulse beeper_path r/w [7:5] reserved. [4:3] define beeper duration when set to pulse mode. [2] set beeper pulse mode: 0: pulse mode selected. 1: continuous mode selected. [1:0] set the output channels when beeper is active: 00: no channels. 01: loudspeakers only. 10: headphone only. 11: loudspeakers and headphone selected.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 135/167 beeper_freq_vol beeper fre quency and volume settings address: 0xf0 type: r/w reset: 0x70 12.19 mute mute_digital digital mute configuration address: 0xf1 type: r/w reset: 0x9f 76543210 beep_freq[2:0] beep_vol[4:0] r/w [7:5] defines the frequency of the beeper tone from 62.5 hz to 8 khz in octaves: 000: 62.5 hz 001: 125 hz 010: 250 hz 011: 500 hz (default) 100: 1 khz 101: 2 khz 110: 4 khz 111: 8 khz [4:0] defines the beeper volume from 0 to -93 db in steps of 3 db: 11111: 0 db (1 v rms ) ... 11110: -3 db 00011: -84 db 11101: -6 db 00010: -87 db ... 00001: -90 db 10000: -48 db (default) 00000: -93 db 76543210 autostd_ mute_on 00 scart_ d_mute srnd_hp_d_m ute sub_ d_mute c_ d_mute ls_ d_mute r/w [7] 0: autostandard can not mute outputs 1: autostandard can mute output s when no signal is detected [6:5] reserved [4] scart left/right digital soft mute 0: signal un-muted 1: signal muted
register list stv8247, stv8257, stv8277, stv8287 136/167 doc id 10163 rev 3 12.20 s/pdif s/pdif_out_config s/pdif output configuration address: 0xf2 type: r/w reset: 0x04 [3] ls surround/hp left/right digital soft mute 0: signal un-muted 1: signal muted [2] ls subwoofer digital soft mute 0: signal un-muted 1: signal muted [1] ls center digital soft mute 0: signal un-muted 1: signal muted [0] ls left/right digital soft mute 0: signal un-muted 1: signal muted 76543210 00000 s/pdif_out_ mute s/pdif_out_select r/w [7:3] reserved. [2] s/pdif output mute: 0: s/pdif output unmuted. 1: s/pdif output muted. [1:0] s/pdif output channel selection: 00: output scart signal 01: output ls l-r signal 10: output c/sub signal 11: ouptut sur/hp signal
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 137/167 12.21 headphone configuration headphone_config headphone configuration registe address: 0xf3 type: r/w reset: 0x02 12.22 dac control dac_control dac control address: 0xf4 type: r/w reset: 0x1f 76543210 0000hp_force hp_ls_ mute hp_det_ active hp_ detected r/w [7:4] reserved. [3] 1: force output of the hp signal (bypass surround) [2] 0: when hp is detected and active, ls are not muted 1: when hp is detected and active, ls are muted [1] 0: hp detection is not active 1: hp detection is active, when hp detecte d, surround signal is bypassed and hp signal is output on hp [0] 1: when a signal is detected on hp_det pin (status) 76543210 0 0 s/pdif_mux dac_scart_m ute dac_shp_ mute dac_csub_ mute dac_lslr_ mute power_up r/w [7:6] reserved. [5] redirect external or internal s/pdif source to s/pdif output : 0: internal s/pdif 1: external s/pdif [4] scart left/right analog soft mute 0: signal un-muted 1: signal muted
register list stv8247, stv8257, stv8277, stv8287 138/167 doc id 10163 rev 3 dac_sw_channels dac switch channels address: 0xf5 type: r/w reset: 0x00 spdif_sw_channels spdif switch channels address: 0xf6 type: r/w reset: 0x00 [3] surround/hp left/right analog soft mute 0: signal un-muted 1: signal muted [2] center/subwoofer analog soft mute 0: signal un-muted 1: signal muted [1] ls left/right analog soft mute 0: signal un-muted 1: signal muted [0] 0: dacs power off 1: power on 76543210 sur_hp_sw c_sub_sw ls_l_r_sw scart_sw r/w [7:6] hp/surround dac: 00: left/right channels non inverted 11: left/right channels inverted [5:4] center/subdac: 00: left/right channels non inverted 11: left/right channels inverted [3:2] ls left-right dac: 00: left/right channels non inverted 11: left/right channels inverted [1:0] scart dac: 00: left/right channels non inverted 11: left/right channels inverted 76543210 000000 spdif_sw r/w [7:2] reserved.
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 139/167 spdif_channel_status status of spdif channel address: 0xf9 type: r/w reset: 0x00 12.23 autostandard coefficients settings autostd_coeff_ctrl autostandard coefficients control address: 0xfb type: r/w reset: 0x01 [1:0] spdif output: 00: left/right channels non inverted 11: left/right channels inverted 76543210 channel_status emphasis copyright non_audio pro_con r/w [7:6] channel status mode: 00: mode zero other values: reserved [5:3] emphasis: according to iec60958 specification [2] copyright: 0: asserted 1: not asserted [1] non-audio: 0: linear pcm 1: non-audio signal [0] select professional or consumer modes: 0: consumer 1: professional 76543210 000000 autostd_coeff_ ctrl[1:0] r/w [7:2] reserved.
register list stv8247, stv8257, stv8277, stv8287 140/167 doc id 10163 rev 3 autostd_coeff_index_msb autosta ndard coefficients index msb address: 0xfc type: r/w reset: 0x00 autostd_coeff_index_lsb autosta ndard coefficients index lsb address: 0xfd type: r/w reset: 0x00 autostd_coeff_value autostandard coefficient value address: 0xfe type: r/w reset: 0x00 [1:0] control the demod filt er coeff table settings 00: no action 01: init coeffecients to rom values 10: update coeffecients with i 2 c values (set to 0 by dsp to acknowledge) 76543210 0000000 autostd_ coeff_ index_msb r/w [7:1] reserved. [0] fir coefficients table index (msb) 76543210 autostd_coeff_index_lsb[7:0] r/w [7:0] fir coefficients table index (lsb) 76543210 autostd_coeff_value[7:0] r/w [7:0] fir coefficients table value to update
stv8247, stv8257, stv8277, stv8287 register list doc id 10163 rev 3 141/167 note: these four registers (autostd_c oeff_ctrl, autostd_coeff_index_msb, autostd_coeff_index_lsb and autostd_ coeff_value) can be used to change parameter settings for the following parts of channel 1 or channel 2: - channel carrier dco frequency (register carfqxx) - channel filter coefficients (registers firxcx) - pll baseband am/fm demodulators proportional and integral coefficients (registers acoeffx or bcoeffx) - demodulator mode selection (register demod_ctrl) - if agc control (agc_ctrl) - channel 2 symbol tracking loop parameters (register scoeff) - zweiton control (register zwt_ctrl) while keeping the autostandard function always active. new values for all parameters mentioned above are kept instead of the values automatically sent by the autostandard function. one application is for example to implement overmodulation recovery mode for any sound standard supported by the device (b/g, i, m/n, dk1, dk2, or dk3). see technical note for instructions on how to update the coefficient table settings. patch_version patch version address: 0xff type: r/w reset: 0x00 76543210 patch_version[7:0] r/w [7:0] indicate the patch version which has been loaded in the device (can be used to check if the patch has been correctly loaded)
pin descriptions stv8247, stv8257, stv8277, stv8287 142/167 doc id 10163 rev 3 13 pin descriptions ap = analog power dp = digital power i = input o = output od = open-drain b = bidirectional a = analog table 31. tqfp80 pin description pin no. stv82x7 pin name type (stv82x7) function for stv82x7 (function for stv82x6 in italics) stv82x6 pin name 1 sc1_out_l a scart1 audio output left ao1l 2 sc1_out_r a scart1 audio output right ao1r 3 vcc_h ap 8 v power for audio i/o & esd not connected 4 gnd_h ap high current ground for audio outputs cgground 5 sc3_out_l a scart3 audio output left not connected 6 sc3_out_r a scart3 audio output right not connected 7 vcc33_sc ap 3.3 v power for audio buffers & dac / adc vddc 8 gnd33_sc ap ground for audio buffers & dac / adc gndc 9 sc1_in_l a scart1 audio input left ai1l 10 sc1_in_r a scart1 audio input right ai1r 11 vrefa a audio bias voltage decoupling 1.55 v (switched v ref decoupling pin for audio converters (vmcp)) vmc1 12 gnd_sa ap ground for dacs connected to ground 13 vbg a bandgap voltage reference decoupling 1.2 v (v ref decoupling pin for audio converters (vmc)) vmc2 14 sc2_in_l a scart2 audio input left ai2l 15 sc2_in_r a scart2 audio input right ai2r 16 vcc33_ls ap 3.3 v power foraudio dacs (3.3 v power supply for audio buffers and scart) vdda 17 gnd33_ls ap ground for audio dacs (ground for audio buffers and scart) gndah 18 sc2_out_l a scart2 audio output left ao2l 19 sc2_out_r a scart2 audio output right ao2r 20 vcc_niso ap polarization of the niso (connected to a udio buffers) vddh 21 vss33_conv ap ground for dac 1.8 to 3.3 v converters connected to ground
stv8247, stv8257, stv8277, stv8287 pin descriptions doc id 10163 rev 3 143/167 22 vdd33_conv ap 3.3 v power for dac 1.8 to 3.3 v converters (voltage rference for audio buffers) vrefa 23 sc3_in_l a scart3 audio input left ai3l 24 sc3_in_r a scart3 audio input right ai3r 25 scl_flt a scart filtering left not connected 26 scr_flt a scart filtering right (bandgap voltage source decoupling) bgap 27 ls_c a center output not connected 28 ls_l a left loudspeaker output lsl 29 ls_r a right loudspeaker output lsr 30 ls_sub a subwoofer output sw 31 hp_lss_l a left headphone output or left surround output hpl 32 hp_lss_r a right headphone output or right surround output hpr 33 vss18_conv dp ground for digital part of the dac/adc (substrate analog/digital shield) gndsa 34 vdd18_conv dp 1.8 v power for digital part of the dac/adc not connected 35 hp_det i headphone detection hpd 36 adr_sel i hardware address selection for i2c bus adr 37 vss18 dp ground for ddigital part connected to ground 38 vdd18 dp 1.8 v power for digital part not connected 39 scl od i2c clock input scl 40 sda od i2c data i/o sda 41 vss18 dp ground for digital part connected to ground 42 vdd18 dp 1.8 v power for digital part (5 v power regulator control) reg 43 rst i main reset input reset 44 s/pdif_in i serial audio data input (system clock output) sysck 45 s/pdif_out o serial audio data output (i2s master clock output) mck 46 vdd33_io1 dp 3.3 v power for digital part vdd1 47 vss33_io1 dp ground for digital part gnd1 48 ck_tst_ctrl d to be grounded not connected 49 vss18 dp ground for digital part gndsp 50 vdd18 dp 1.8 v power for digital part not connected 51 clk_sel i clock input format selection not connected table 31. tqfp80 pin description (continued) pin no. stv82x7 pin name type (stv82x7) function for stv82x7 (function for stv82x6 in italics) stv82x6 pin name
pin descriptions stv8247, stv8257, stv8277, stv8287 144/167 doc id 10163 rev 3 52 xtalin_clkxtp i crystal oscillator input or differential input positive (crystal oscillator input) xti 53 xtalout_clkxt m o crystal oscillator output or differential input negative (crystal oscillator output) xto 54 vcc18_clk1 ap 1.8 v power for clock pll analog & crystal oscillator 1/2 (3.3 v power supply for analog pll clock) vddp 55 gnd18_clk1 ap ground for clock pll analog & crystal oscillator 1/2 gndp 56 gnd18_clk2 dp ground for cl ock pll digital 1/2 gnd2 57 vcc18_clk2 dp 1.8 v power for clock pll digital 1/2 (3.3 v power supply for digital core, dsps & io cells) vdd2 58 vss33_io2 dp ground for digital io pins 60 to 69 connected to ground 59 vdd33_io2 dp 3.3 v power for digital io pins 60 to 69 not connected 60 i2s_pcm_clk i/o i2s slave clock input/ output channel 1, 2 & 3 not connected 61 i2s_sclk i/o i2s clock input/output channel 1, 2 & 3 (i2s bus data output) sdo 62 i2s_lr_clk i/o i2s word select input/output channel 1,2 & 3 (stereo detection output / i2s bus data input) st/sdi 63 i2s_data0 i/o i2s data input/output stereo channel 1 (i2s bus word select output) ws 64 i2s_data1 i i2s data input stereo channel 2 (i2s bus clock output) sck 65 i2s_data2 i i2s data input stereo channel 3 (bus expander output 1) bus1 66 vdd18 dp 1.8 v power for digital core & i/o cells pin not connected 67 vss18 dp ground for digital core & i/o cells pin connected to ground 68 bus_exp o bus expander function (bus expander output 2) bus0 69 irq o interruptrrequest to microprocessor irq 70 gnd_psub ap ground substrate connection connected to ground 71 vdd18_adc dp vdd 1.8 v for adc (digital part) not connected 72 vss18_adc dp ground to complement 1.8 v vdd for adc connected to ground 73 sif_p a sound if input (positive) sif 74 sif_n a sound if input (negative) (adc v top decoupling pin) vtop 75 gndpw_if ap polarization for the if block (voltage reference for agc decoupling pin) vrefif table 31. tqfp80 pin description (continued) pin no. stv82x7 pin name type (stv82x7) function for stv82x7 (function for stv82x6 in italics) stv82x6 pin name
stv8247, stv8257, stv8277, stv8287 pin descriptions doc id 10163 rev 3 145/167 76 vcc18_if ap 1.8 v power for if agc & adc vddif 77 gnd18_if ap ground for if agc & adc gndif 78 mono_in a mono input (for am mono) monoin 79 sc4_in_l a scart4 audio input left not connected 80 sc4_in_r a scart4 audio input right not connected table 31. tqfp80 pin description (continued) pin no. stv82x7 pin name type (stv82x7) function for stv82x7 (function for stv82x6 in italics) stv82x6 pin name
application diagrams stv8247 , stv8257, stv8277, stv8287 146/167 doc id 10163 rev 3 14 application diagrams figure 29. stv82x7 application diagram
stv8247, stv8257, stv8277, st v8287 application diagrams doc id 10163 rev 3 147/167 figure 30. stv82x6/stv82x7 compatible application electrical diagram
application diagrams stv8247 , stv8257, stv8277, stv8287 148/167 doc id 10163 rev 3 figure 31. stv82x7/stv82x8 compatible ap plication electrical diagram (tqfp80)
stv8247, stv8257, stv8277, stv8287 system clock doc id 10163 rev 3 149/167 15 system clock the system clock integrates 2 independent frequency synthesizers. the first frequency synthesizer can be used in one of two modes: in mode 1, it is used by the demodulator, and the frequecy is 49.152 mhz. in mode 2, it is used by the i2s input and is synchronous with the input frequency (f s = 32, 44.1 or 48 khz) and the frequency is 49.152 mhz (for f s = 32 or 48 khz) or 45.1584 mhz (for f s = 44.1 khz). the second frequency synthesizer is used by the dsp core and can be adjusted between 100 and 150 mhz depending on the application (around 106 mhz at reset value). in i2s output mode, clocks are generated by synthesizer 1. the default values are designed for a standard 27 mhz reference frequency provided by a stable single crystal or an external differential clock signal (for example, from the stv35x0) depending on the clk_sel pin configuration (clk_sel = 1 means a single crystal, 0 means an external differential clock). the 27 mhz value is the recommended frequency for minimizing potential rf interference in the application. the sinusoidal clock frequency, and any harmonic products, remain outside the tv picture and sound ifs (pif/sif) and band-i rf. note: a change in the reference frequency is compatible with other default i2c programming values, including those of the built-in automatic standard recognition system.
input/output groups stv8247 , stv8257, stv8277, stv8287 150/167 doc id 10163 rev 3 16 input/output groups pin numbers apply to sdip package only figure 32. sif_p figure 33. sc_out vcc18_if 50k gnd_psub sif_p73 50k 50k vcc18_if vcc_h gnd_psub sc1_outl 1 2 5 6 18 19 sc1_outr sc2_outl sc2_outr sc3_outl sc3_outr figure 34. vcc33_ls figure 35. mono_in vcc33_ls gnd_psub ls_c ls_l ls_r scr_flt ls_sub 25 ls_l hp_lss_l hp_lss_r 26 27 28 29 30 31 32 150 vcc33_ls 78 mono_in 30k vrefa figure 36. vcc18_if figure 37. sc_in vcc18_if gndif 74 sif_n vcc18_if ref vcc_h gnd_psub 9 sc1_in_l 22k5 7k5 vrefa 10 14 15 23 24 79 80 sc1_in_r sc2_in_l sc2_in_r sc3_in_l sc3_in_r sc4_in_l sc4_in_r
stv8247, stv8257, stv8277, st v8287 input/output groups doc id 10163 rev 3 151/167 figure 38. vrefa figure 39. vbg vcc33_ls 5k4 gnd33_ls 16k8 11 vrefa vb g (1.2 v) vcc33_ls gnd33_ls 13 vb g 10k band-gap=1.2 v figure 40. vdd33_io1 figure 41. s/pdif_out vss 35 hp_det 36 43 adr_sel rst_n vdd33_i01 clk_tst_ctrl 48 vss 45 s/pdif_out vdd33_i01 vdd33_i01 figure 42. bus_exdirq figure 43. s/pdif_in vss bus_exd vdd33_i02 vdd33_i02 irq 68 69 vss 44 s/pdif_in vdd33_i01
input/output groups stv8247 , stv8257, stv8277, stv8287 152/167 doc id 10163 rev 3 figure 44. i 2 s figure 45. clk_sel vss 60 i2s_pcm_clk 61 62 i2s_lr_clk i2s_data0 vdd33_i02 i2s_data1 63 64 i2s_data2 vss 51 clk_sel vdd18 figure 46. scl figure 47. vc18_clk1 vss 35 scl 40 sda 53 xtalout_clkxtm 52 xtalin_clkxtp vcc18_clk1 500k gnd18_clk1 vcc18_clk1 gnd18_clk1
stv8247, stv8257, stv8277, st v8287 input/output groups doc id 10163 rev 3 153/167 figure 48. vss vdd33_i02 vcc18_clk1 vdd33_i01 gnd_psub gnd18_clk2 gnd18_clk1 vss 21 59 46 54 56 55 37 57 vcc18_clk2 vdd18 38 42 50 66 41 47 49 58 67 70
electrical characteristics stv 8247, stv8257, stv8277, stv8287 154/167 doc id 10163 rev 3 17 electrical characteristics test conditions: t oper = 25 c, v cc_h = 8 v, v xx_18 = 1.8 v, v xx_33 = 3.3 v, oscillator at 27 mhz, default register values for synthesizer, otherwise specified. 17.1 absolute maximum ratings table 32. absolute maximum ratings 17.2 thermal data table 33. thermal data 17.3 power supply data symbol parameter value units v xx_18 analog and digital 1.8 v supply voltage (v cc18_clk1 , v cc18_clk2 , v cc18_if , v dd18 , v dd18_conv , v dd18_adc ) 2.5 v v xx_33 analog and digital 3.3 v supply voltage (v cc33_sc , v cc33_ls , v dd33_io1 , v dd33_io2 , v dd33_conv , v cc_niso ) 4.0 v hv cc analog supply high voltage (v cc_h )8.8v v esd capacitor 100 pf discharged via 1.5 k serial resistor (human body model) 4kv t oper operating ambient temperature 0, +70 c t stg storage temperature -55 to +150 c symbol parameter value units r thja junction-to-ambient thermal resistance 42 c/w table 34. power supply data symbol parameter min. typ. max. units v xx_18 analog and digital 1.8 v supply voltage (v cc18_clk1 , v cc18_clk2 , v cc18_if , v dd18 , v dd18_conv , v dd18_adc ) 1.70 1.80 1.90 v v xx_33 analog and digital 3.3 v supply voltage (v cc33_sc , v cc33_ls , v dd33_io1 , v dd33_io2 , v dd33_conv , v cc_niso ) 3.13 3.30 3.47 v hv cc analog supply high voltage (v cc_h ) 7.6 8.0 8.4 v i vdd18 current consumption for digital 1.8 v supply (v cc18_clk2 , v dd18 , v dd18_conv , v dd18_adc ) 230 280 ma
stv8247, stv8257, stv8277, stv 8287 electrical characteristics doc id 10163 rev 3 155/167 17.4 crystal oscillator table 35. crystal oscillator 17.5 analog sound if signal i vdd33 current consumption for digital 3.3 v supply ( v dd33_io1 , v dd33_io2 ) 10 12 ma i vcc18 current consumption for analog 1.8 v supply (v cc18_clk1 , v cc18_if ) 50 60 ma i vcc33 current consumption for analog 3.3 v supply (v cc33_sc , v cc33_ls , v dd33_conv , v cc_niso ) 65 78 ma i vcc_h current consumption for analog s upply high voltage (8 v) 4 7 ma p dtot total power dissipation 780 965 mw symbol parameter min. typ. max. units f p crystal series resonance frequency (at c21 = c22 = 27 pf load capacitor) 27 mhz df/f p frequency tolerance at 25 c -30 +30 ppm df/f t frequency stability versus temperature within a range from 0 to 70 c -30 +30 ppm c1 motional capacitor 15 ff r s serial resistance 30 w c s shunt capacitance 7 pf table 34. power supply data (continued) symbol parameter min. typ. max. units table 36. analog sound if signal symbol parameter test conditions min. typ. max. band sif sif frequency flatness agc_err at 0, frequency range from 4 to 7 mhz 0.6 3 r insif sif input resistance 60 72 85 dc insif sif input dc level 0.9 c insif sifinput capacitance 3 fm carrier vsif fm sif input sensitivity snr 40db rms unweighted, 20 hz-15 khz, standard b/g 27 khz fm deviation,1 khz 350
electrical characteristics stv 8247, stv8257, stv8277, stv8287 156/167 doc id 10163 rev 3 dev fm fm maximum deviation fm50k (standard) signal lost, dk mode, fm prescale at 0 15 50 115 fm200k 200 320 fm350k 350 560 fm500k 500 700 dfsif fm sif carrier accuracy for fm standard (fm50k) 1 5 shifted standard (fm50k with dco compensation) 120 r fm/qpsk carrier ratio fm/qpsk for nicam system nicam mute, far_mode is active, standard bg, 100 mv pp level for fm carrier 40 am carrier vsif am sif input sensitivity unmodulated, -3 db at output amplitude agc_err at 21d standard l, 54% am depth, 1 khz 19 vmax_sif am sif maximuminput level unmodulated, thd at 1%, 54% am depth, agc_err at 0 1.3 dev am modulation depth for am thd at 1% 0 100 dfsif am sif carrier accuracy for am 1 5 r am/qpsk am/qpsk carrier ratio for nicam system nicam mute, 100 mv pp am carrier 36 agc agc step if agc step 1.4 1.5 1.6 agc dyn relative maximum gain to step 0 valid from step 21 to step 31 29 30 31 table 36. analog sound if signal (continued) symbol parameter test conditions min. typ. max.
stv8247, stv8257, stv8277, stv 8287 electrical characteristics doc id 10163 rev 3 157/167 17.6 sif to i2s output path characteristics test conditions: sif amplitude = 10 mvpp, otherwise specified, i2s output table 37. sif to i 2 s output path characteristics symbol parameter test conditions min. typ. max. units fm demodulation band fm frequency response 20 hz - 15 khz 0.7 db snr fm signal to noise rms unweighted, 20 hz-15k hz, standard b/g 27 khz fm deviation,1 khz 66 db thd fm total harmonic distortion 0.05 % sep fm stereo channel separation standard b/g stereo a2, 27 khz fm deviation, 1 khz 48 db nicam demodulation band nic frequency response 20 hz - 15 khz 0.2 db snr nic signal to noise 200 hz - 60 dbfs, trap filter 200 hz rms unweighted, 20 hz-15 khz, standard b/g mono nicam,1 khz 74 db thd nic total harmonic distortion 0.04 % am demodulation band am frequency response 20 hz - 15 khz 0.5 db snr am signal to noise rms unweighted 2 0 hz-15 khz, standard l, 54% am depth, 1 khz agc: 13d 60 db thd am total harmonic distortion 0.4 %
electrical characteristics stv 8247, stv8257, stv8277, stv8287 158/167 doc id 10163 rev 3 17.7 scart to scart analog path characteristics test conditions: rload max = 10 k , cload max = 330pf, mono_in voltage = 0.5 v rms table 38. scart to scart analog path characteristics symbol parameter test conditions min. typ. max. units analog-to-analog stereo and mono r inscart scart input resistance 29 34 39 k r outscart output resistance for scarts 40 75 w vdc inscart scart input dc level 1.45 1.57 1.65 v vdc outsca rt scart output dc level 3.4 3.64 3.8 v clip scart clipping scart clipping input level from scart input at 1 khz 1% thd 2.0 v rms clipping input level from mono_in input 0.5 v rms thd scart thd scart thd from scart input 1 v rms , at 1 khz 0.02 0.05 % thd from mono_in input 0.25 v rms , at 1 khz 0.02 0.05 % snr scart signal to noise ratio scart input 1 v rms, 20 hz to 20 khz bandwidth, rms unweighted 82 90 db mono_in input 0.25 v rms, 20 hz to 20 khz bandwidth, rms unweighted 82 90 db band scart frequency flatness scart input 20 hz to 20 khz -0.5 0 0.5 db mono_in input 20 hz to 20 khz 11.5 12 12.5 db xtalk l/r left/right crosstalk 1v rms @ 1 khz on ref signal, the other one grounded 80 90 db xtalk in audio crosstalk from input channel n to input channel m 1v rms @ 1 khz on ref signal, all other inputs grounded 80 90 db xtalk out audio crosstalk from output channel n to output channel m 1v rms @ 1 khz on reference output, signal on a single input, all other inputs grounded 80 90 db
stv8247, stv8257, stv8277, stv 8287 electrical characteristics doc id 10163 rev 3 159/167 17.8 scart and mono in to i2s path characteristics test conditions: sampling frequency = 32 khz, maximum mono_in voltage = 0.5 v rms . table 39. scart to mono in to i 2 s path characteristics 17.9 i 2 s to ls/hp/sub/c path characteristics test conditions: sampling frequency = 32 khz, l load = 100 h, c load = 33 nf, r load = 30 k table 40. i2s to ls/hp/sub/c path characteristics symbol parameter test conditions min. typ. max. units thd adc thd adc thd from scart input v in = 2 v rms at 1 khz 0.006 0.05 % thd from mono_in input v in = 0.5 v rms at 1 khz 0.006 0.05 % snr adc signal to noise ratio 20 to 15 khz bandwidth, rms unweighted v in = 200 mv rms scart input 62 db band adc frequency flatness 20 hz to 15 khz 0.5 db xtalk adc left right crosstalk at 1 khz, v in = 1 v rms 95 db symbol parameter test conditions min. typ. max. units r outdac output resistance for main outputs ls_l, ls_r, ls_sub, ls_c, hp_lss_r and hp_lss_l pins 90 140 w vdc outdac main output dc level 1.4 1.55 1.8 v thd dac total harmonic distortion 90% full-scale range at 1 khz 0.06 % snr dac signal to noise ratio 20 to 15 khz bandwidth, rms unweighted, at -20 db full range 75 db v outampdac main output amplitude 100% full-scale range at 1 khz 800 900 1050 mv rm s xtalk dac left right crosstalk at 1 khz, -20 dbfs 87 db
electrical characteristics stv 8247, stv8257, stv8277, stv8287 160/167 doc id 10163 rev 3 17.10 i2s to scart pa th characteristics test conditions: sampling frequency = 32 khz, c load = 33 nf on dac scart pins, dac scart prescale at -5.5 db table 41. . i 2 s to scart path characteristics 17.11 mute characteristics table 42. mute characteristics 17.12 digital i/os characteristics table 43. digital i/o characteristics symbol parameter test conditions min. typ. max. units thd dacscart total harmonic distortion 90% full-scale range at 1 khz 0.08 0.12 % snr dacscart signal to noise ratio 20 hz to 15 khz bandwidth unweighted, -20 db full range 73 db v odacscart main output amplitude 100% full- scale range at 1 khz 1.75 2 2.25 v rms xtalk dacsca rt left right crosstalk at 1 khz, -20 dbfs 80 db symbol parameter test conditions min. typ. max. units mute dac dac mute analog i2s to dac at 1 khz 90 db mute scart scart mute 2v rms @ 1 khz on ref signal, all other inputs grounded 81 db symbol parameter test conditions min. typ. max. units v il low level input voltage except sda, scl and clk_sel, 3.3 v power supply 0.5 v v ih high level input voltage except sda, scl and clk_sel, 3.3 v power supply 2.0 v i in input current 1 a vil clk_sel clk_sel low level input voltage 1.8 v power supply 0.3 v vih clk_sel clk_sel highlevel input voltage 1.8 v power supply 1.2 v v ol low level output voltage s/pdif_out, irq, bus_exp 0.3 v v oh high level output voltage s/pdif_out, irq, bus_exp 3.0 v
stv8247, stv8257, stv8277, stv 8287 electrical characteristics doc id 10163 rev 3 161/167 17.13 i2c bus characteristics table 44. i 2 c bus characteristics symbol parameter test conditions min. typ max. units scl v il low level input voltage -0.3 1.5 v v ih high level input voltage 2.3 5.5 v i il input leakage current v in = 0 to 5.0 v -10 10 a f scl clock frequency 400 khz t r input rise time 1 v to 2 v 300 ns t f input fall time 2 v to 1 v 300 ns c i input capacitance 10 pf sda v il low level input voltage -0.3 1.5 v v ih high level input voltage 2.3 5.5 v i il input leakage current v in = 0 to 5.0 v -10 10 a t r input rise time 1 v to 2 v 300 ns t f input fall time 2 v to 1 v 300 ns v ol low level output voltage i ol = 3 ma 0.4 v t f output fall time 2 v to 1 v 250 ns c l load capacitance 400 pf c i input capacitance 10 pf i2c timing t low clock low period 1.3 s t high clock high period 0.6 s t su,dat data set-up time 100 ns t hd,dat data hold time 0 900 ns t su,sto set-up time from clock high to stop 0.6 s t buf start set-up time following a sop 1.3 s t hd,sta start hold time 0.6 s t su,sta start set-up time following clock low to high transition 0.6 s
electrical characteristics stv 8247, stv8257, stv8277, stv8287 162/167 doc id 10163 rev 3 17.14 i 2 s bus interface characteristics see ta b l e 5 for i 2 s timing . table 45. i2s bus interface characteristics symbol parameter test conditions min. typ max. units i2s input v i2s_il input i 2 s low level voltage 0.8 v v i2s_ih input i 2 s high level voltage 2 v z i2s input i 2 s impedance 5 pf i i2s_leak i 2 s leakage current -1 1 a t i2s_su i 2 s input setup time before rising edge of clock see figure 49 30 ns t i2s_ho i 2 s input hold time after rising edge of clock see figure 49 100 ns f i2s_lr0 i 2 s left right strobe input frequency (i 2 s_data0 only) deviation = 250 ppm 8 48 khz f i2s_scl0 i 2 s serial clock input frequency (i 2 s_data0 only) 0.512 3.072 mhz f i2s_lr i 2 s left right strobe input frequency (i 2 s_data0,1 ,2) deviation = 250 ppm 32 48 khz f i2s_scl i 2 s serial clock input frequency (i 2 s_data0 ,1,2) 2.048 3.072 mhz r i2s_scl i 2 s serial clock input ratio 0.9 1.1 i 2 s output (i 2 s_data0 only) v i2sol output i 2 s low level voltage iol = 2 ma 0.4 v v i2soh output i 2 s high level voltage ioh = 2 ma 2.4 v f i2s_olr i 2 s left right strobe output frequency deviation = 250 ppm 8 48 khz f i2s_oscl i 2 s serial clock output frequency 0.512 3.072 mhz r i2s_scl i 2 s serial clock output ratio 0.9 1.1 t i2 s_de l i 2 s output delay after falling edge of clock see figure 49 , c load = 30 pf 30 ns
stv8247, stv8257, stv8277, stv 8287 electrical characteristics doc id 10163 rev 3 163/167 figure 49. i 2 s input bus timings i2s_sclk i2s_data t i2s_su t i2s_ho t i2s_su i2s_lr_clk
package mechanical data stv 8247, stv8257, stv8277, stv8287 164/167 doc id 10163 rev 3 18 package mechanical data figure 50. 80-pin thin plastic quad flat package table 46. package mechanical dimensions dim. mm inches min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.22 0.32 0.38 0.009 0.013 0.015 c 0.09 0.20 0.004 0.008 d 16.00 0.630 d1 14.00 0.551 e 16.00 0.630 e1 14.00 0.551 e 0.65 0.026 k 0 3.5 0.75 0 3.5 0.75 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.039 a a2 a1 b e h c l l1 e e1 d1 d
stv8247, stv8257, stv8277, stv8287 order information doc id 10163 rev 3 165/167 18.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 19 order information note: for example : stv8257dsx/t will be delivered in tape & reel conditioning table 47. order codes part number package conditioning stv82x7 tqfp80 tray stv82x7/t tqfp80 tape & reel
revision history stv8247, stv8257, stv8277, stv8287 166/167 doc id 10163 rev 3 20 revision history table 48. document revision history date revision changes 24-jan-2006 1 initial release 01-mar-2007 2 new template applied 08-sep-2009 3 new template applied specific part numbers added to cover page references to inactive products removed section 18.1: ecopack ? added
stv8247, stv8257, stv8277, stv8287 doc id 10163 rev 3 167/167 please read carefully: information in this document is provided so lely in connection with st products. stmi croelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifi cations or improvements, to this docum ent, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and serv ices described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by est oppel or otherwise, to any intellectual pr operty rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or consider ed as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and cond itions of sale st disclaims any express or implied warranty with respect to the use and /or sale of st products includi ng without limi tation implied warranties of merch antability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an author ized st representative, st products are not recommended, authorized or warranted for use in military, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are no t specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions di fferent from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service descr ibed herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or regist ered trademarks of st in various countries. information in this document supersedes and r eplaces all informati on previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - h ong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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