technical data triple 3-input nor gate high-speed silicon-gate cmos in74ac27 the in74ac27 is identical in pinout to the ls/als27, hc/hct27. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with ls/als outputs. ordering information in74ac27n plastic IN74AC27D soic t a = -40 to 85 c for all packages ? outputs directly interf ace to cmos, nmos, and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1.0 a; 0.1 a @ 25 c ? high noise immunity characteristic of cmos devices ? outputs source/sink 24 ma logic diagram pin 14 =v cc pin 7 = gnd pin assignment function table inputs output a b c y h x x l x h x l x x h l l l l h rev. 00
in74ac27 rev. 00 maximum ratings * symbol parameter value unit v cc dc supply voltage (referenced to gnd) -0.5 to +7.0 v v in dc input voltage (referenced to gnd) -0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) -0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc supply current, v cc and gnd pins 50 ma p d power dissipation in still air, plastic dip+ soic package+ 750 500 mw tstg storage temperature -65 to +150 c t l lead temperature, 1 mm from case for 10 seconds (plastic dip or soic package) 260 c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the reco mmended operating conditions. +derating - plastic dip: - 10 mw/ c from 65 to 125 c soic package: : - 7 mw/ c from 65 to 125 c recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 2.0 6.0 v v in , v out dc input voltage, output voltage (referenced to gnd) 0 v cc v t j junction temperature (pdip) 140 c t a operating temperature, all package types -40 +85 c i oh output current - high -24 ma i ol output current - low 24 ma t r , t f input rise and fall time * (except schmitt inputs) v cc =3.0 v v cc =4.5 v v cc =5.5 v 0 0 0 150 40 25 ns/v * v in from 30% to 70% v cc this device contains protection circuitry to guard agains t damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage highe r than maximum rated voltages to this high-impedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
in74ac27 rev. 00 dc electrical characteristics (voltages referenced to gnd) v cc guaranteed limits symbol parameter test conditions v 25 c -40 c to 85 c unit v ih minimum high- level input voltage v out =0.1 v 3.0 4.5 5.5 2.1 3.15 3.85 2.1 3.15 3.85 v v il maximum low - level input voltage v out =0.1 v or v cc -0.1 v 3.0 4.5 5.5 0.9 1.35 1.65 0.9 1.35 1.65 v v oh minimum high- level output voltage i out -50 a 3.0 4.5 5.5 2.9 4.4 5.4 2.9 4.4 5.4 v * v in = v il i oh =-12 ma i oh =-24 ma i oh =-24 ma 3.0 4.5 5.5 2.56 3.86 4.86 2.46 3.76 4.76 v ol maximum low- level output voltage i out 50 a 3.0 4.5 5.5 0.1 0.1 0.1 0.1 0.1 0.1 v * v in = v il or v ih i ol =12 ma i ol =24 ma i ol =24 ma 3.0 4.5 5.5 0.36 0.36 0.36 0.44 0.44 0.44 i in maximum input leakage current v in =v cc or gnd 5.5 0.1 1.0 a i old +minimum dynamic output current v old =1.65 v max 5.5 75 ma i ohd +minimum dynamic output current v ohd =3.85 v min 5.5 -75 ma i cc maximum quiescent supply current (per package) v in =v cc or gnd 5.5 4.0 40 a * all outputs loaded; thresholds on input associated with output under test. +maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc
in74ac27 ac electrical characteristics (c l =50pf,input t r =t f =3.0 ns) v cc * guaranteed limits symbol parameter v 25 c -40 c to 85 c unit min max min max t plh propagation delay, input a or b or c to output y (figure 1) 3.3 5.0 1.5 1.5 9.5 8.0 1.0 1.0 10.0 8.5 ns t phl propagation delay, input a or b or c to output y (figure 1) 3.3 5.0 1.5 1.5 9.5 8.0 1.0 1.0 10.0 8.5 ns c in maximum input capacitance 5.0 4.5 4.5 pf typical @25 c,v cc =5.0 v c pd power dissipation capacitance 25 pf * voltage range 3.3 v is 3.3 v 0.3 v voltage range 5.0 v is 5.0 v 0.5 v figure 1. switching waveforms rev. 00
in74ac27 n suffix plastic dip (ms - 001aa) symbol min max a 18.67 19.69 b 6.1 7.11 c 5.33 d 0.36 0.56 f 1.14 1.78 g h j 0 10 k 2.92 3.81 notes: l 7.62 8.26 1. dimensions ?a?, ?b? do not include mold flash or protrusions. m 0.2 0.36 maximum mold flas h or protrus ions 0.25 mm (0.010) per s ide. n 0.38 d suffix soic (ms - 012ab) symbol min max a 8.55 8.75 b 3.8 4 c 1.35 1.75 d 0.33 0.51 f 0.4 1.27 g h j 0 8 notes: k 0.1 0.25 1. dimensions a and b do not include mold flash or protrusion. m 0.19 0.25 2. maximum mold flas h or protrus ion 0.15 mm (0.006) per s ide p 5.8 6.2 for a; for b ? 0.25 mm (0.010) per s ide. r 0.25 0.5 dimens ion, mm 1.27 5.27 2.54 7.62 dimens ion, mm a b h c k c m j f m p g d r x 45 seating plane 0.25 (0.010) m t -t- 1 14 7 8 a b f g d l h seating plane n k 0.25 (0.010) m t m j -t- c 1 14 7 8 rev. 00
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