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1996 microchip technology inc. advanced information ds40141a-page 1 devices included in this data sheet: pic16fr54 PIC16FR55 pic16fr56 pic16fr57 high-performance risc cpu features: only 33 single word instructions to learn all instructions are single cycle (200 ns) except for program branches which are two-cycle operating speed: dc - 20 mhz clock input dc - 200 ns instruction cycle 12-bit wide instructions 8-bit wide data path seven or eight special function hardware registers two-level deep hardware stack direct, indirect and relative addressing modes for data and instructions peripheral features: 8-bit real time clock/counter (timer0) with 8-bit programmable prescaler power-on reset (por) device reset timer (drt) watchdog timer (wdt) with its own on-chip rc oscillator for reliable operation programmable code-protection power saving sleep mode selectable oscillator options: - rc: low-cost rc oscillator - xt: standard crystal/resonator - hs: high-speed crystal/resonator - lp: power saving, low frequency crystal device pins i/o flexrom ram pic16fr54 18 12 512 25 PIC16FR55 28 20 512 24 pic16fr56 18 12 1k 25 pic16fr57 28 20 2k 72 cmos technology: low-power, high-speed cmos flexrom technology fully static design wide-operating voltage range: - flexrom commercial/industrial 2.5v to 6.25v low-power consumption - < 2 ma typical @ 5.0v, 4 mhz - 15 m a typical @ 3.0v, 32 khz - < 3 m a typical standby current (with wdt disabled) @ 3.0v, 0 c to 70 c flexrom ? -based 8-bit cmos microcontroller series pic16fr5x pin con?urations pdip, soic 18 17 16 15 14 13 12 11 10 ? 2 3 4 5 6 7 8 9 ra2 ra3 t0cki mclr v ss rb0 rb1 rb2 rb3 ra1 ra0 osc1/clkin osc2/clkout v dd rb7 rb6 rb5 rb4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 ? 2 3 4 5 6 7 8 9 10 11 12 13 14 mclr osc1/clkin osc2/clkout rc7 rc6 rc5 rc4 rc3 rc2 rc1 rc0 rb7 rb6 rb5 pdip, soic t0cki v dd n/c v ss n/c ra0 ra1 ra2 ra3 rb0 rb1 rb2 rb3 rb4 pic16fr57 pic16fr54 pic16fr56 PIC16FR55 this document was created with framemake r404
pic16fr5x ds40141a-page 2 advanced information 1996 microchip technology inc. pin diagrams (con?) ra1 ra0 osc1/clkin osc2/clkout v dd v dd rb7 rb6 rb5 rb4 ra2 ra3 t0cki mclr v ss v ss rb0 rb1 rb2 rb3 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 pic16fr54 pic16fr56 ssop mclr osc1/clkin osc2/clkout rc7 rc6 rc5 rc4 rc3 rc2 rc1 rc0 rb7 rb6 rb5 t0cki v dd v ss ra0 ra1 ra2 ra3 rb0 rb1 rb2 rb3 rb4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 pic16fr57 ssop PIC16FR55 v dd v ss 1996 microchip technology inc. advanced information ds40141a-page 3 pic16fr5x 1.0 general description the pic16fr5x from microchip technology is a family of low-cost, high performance, 8-bit, fully static, flexrom -based cmos microcontrollers. this family is pin and software compatible with the enhanced pic16fr5x family of devices. it employs a risc architecture with only 33 single word/single cycle instructions. all instructions are single cycle (200 ns) except for program branches which take two cycles. the pic16fr5x delivers performance an order of magnitude higher than its competitors in the same price category. the 12-bit wide instructions are highly symmetrical resulting in 2:1 code compression over other 8-bit microcontrollers in its class. the easy to use and easy to remember instruction set reduces development time signi?antly. the pic16fr5x products are equipped with special features that reduce system cost and power requirements. the power-on reset (por) and device reset timer (drt) eliminate the need for external reset circuitry. there are four oscillator con?urations to choose from, including the power-saving lp (low power) oscillator and cost-saving rc oscillator. power saving sleep mode, watchdog timer and code protection features improve system cost, power and reliability. the pic16fr5x products are supported by a full-featured macro assembler, a software simulator, an in-circuit emulator, a ? compiler, fuzzy logic support tools, a low-cost development programmer, and a full featured programmer. all the tools are supported on ibm pc-at and compatible machines. 1.1 applications the pic16fr5x series ?s perfectly in applications ranging from high-speed automotive and appliance motor control to low-power remote transmitters/ receivers, pointing devices and telecom processors. the flexrom technology makes customizing application programs (transmitter codes, motor speeds, receiver frequencies, etc.) extremely fast and convenient. the small footprint packages, for through- hole or surface mounting, make this microcontroller series perfect for applications with space limitations. low-cost, low-power, high performance, ease of use and i/o ?xibility make the pic16fr5x series very versatile even in areas where no microcontroller use has been considered before (e.g., timer functions, replacement of ?lue?logic in larger systems, coprocessor applications). this document was created with framemake r404 pic16fr5x ds40141a-page 4 advanced information 1996 microchip technology inc. table 1-1: pic16fr5x family of devices pic16fr54 20 512 25 tmr0 12 2.5-6.25 33 18-pin dip, soic; 20-pin ssop pic16fr54a 20 512 25 tmr0 12 2.5-6.25 33 18-pin dip, soic; 20-pin ssop PIC16FR55 20 512 24 tmr0 20 2.5-6.25 33 28-pin dip, soic, ssop pic16fr56 20 1k 25 tmr0 12 2.5-6.25 33 18-pin dip, soic; 20-pin ssop pic16fr57 20 2k 72 tmr0 20 2.5-6.25 33 28-pin dip, soic, ssop pic16fr58a 20 2k 73 tmr0 12 2.5-6.25 33 18-pin dip, soic; 20-pin ssop all pic16/17 family devices have power-on reset, selectable watchdog timer, selectable code protect and high i/o current capability. maximum frequency of operation (mhz) flexrom program memory (words) ram data memory (bytes) timer module(s) i/o pins voltage range (volts) number of instructions packages clock memory peripherals features 1996 microchip technology inc. advanced information ds40141a-page 5 pic16fr5x 2.0 architectural overview this section provides information on the architecture of the pic16fr5x. for information on operation of the peripherals, electrical speci?ations, etc., please refer to the pic16c5x data sheet. figure 2-1: pic16fr5x series block diagram wdt time out 8 stack 1 stack 2 flexrom 512 x 12 to 2048 x 12 instruction register instruction decoder watchdog timer configuration word oscillator/ timing & control general purpose register file (sram) 24, 25 or 72 bytes wdt/tmr0 prescaler option reg. ?ption ?leep ?ode protect ?sc select direct address tmr0 from w from w ?ris 5 ?ris 6 ?ris 7 fsr trisa porta trisb portc trisc portb from w t0cki pin 9-11 9-11 12 12 8 w 4 4 4 data bus 8 8 8 8 8 8 8 alu status from w clkout 8 9 6 5 5-7 osc1 osc2 mclr literals pc ?isable 2 ra3:ra0 rb7:rb0 rc7:rc0 (28 pin devices only) direct ram address this document was created with framemake r404 pic16fr5x ds40141a-page 6 advanced information 1996 microchip technology inc. table 2-1: pic16fr54/fr56 pinout description name dip, soic no. ssop no. i/o/p type input levels description ra0 ra1 ra2 ra3 17 18 1 2 19 20 1 2 i/o i/o i/o i/o ttl ttl ttl ttl bi-directional i/o port rb0 rb1 rb2 rb3 rb4 rb5 rb6 rb7 6 7 8 9 10 11 12 13 7 8 9 10 11 12 13 14 i/o i/o i/o i/o i/o i/o i/o i/o ttl ttl ttl ttl ttl ttl ttl ttl bi-directional i/o port t0cki 3 3 i st clock input to timer0. must be tied to v ss or v dd, if not in use, to reduce current consumption. mclr 4 4 i st master clear (reset) input. this pin is an active low reset to the device. osc1/clkin 16 18 i st oscillator crystal input/external clock source input. osc2/clkout 15 17 o oscillator crystal output. connects to crystal or resonator in crystal oscillator mode. in rc mode, osc2 pin outputs clkout which has 1/4 the frequency of osc1, and denotes the instruction cycle rate. v dd 14 15,16 p positive supply for logic and i/o pins. v ss 5 5,6 p ground reference for logic and i/o pins. legend: i = input, o = output, i/o = input/output, p = power, ?= not used, ttl = ttl input, st = schmitt trigger input 1996 microchip technology inc. advanced information ds40141a-page 7 pic16fr5x table 2-2: PIC16FR55/fr57 pinout description name dip, soic no. ssop no. i/o/p type input levels description ra0 ra1 ra2 ra3 6 7 8 9 5 6 7 8 i/o i/o i/o i/o ttl ttl ttl ttl bi-directional i/o port rb0 rb1 rb2 rb3 rb4 rb5 rb6 rb7 10 11 12 13 14 15 16 17 9 10 11 12 13 15 16 17 i/o i/o i/o i/o i/o i/o i/o i/o ttl ttl ttl ttl ttl ttl ttl ttl bi-directional i/o port rc0 rc1 rc2 rc3 rc4 rc5 rc6 rc7 18 19 20 21 22 23 24 25 18 19 20 21 22 23 24 25 i/o i/o i/o i/o i/o i/o i/o i/o ttl ttl ttl ttl ttl ttl ttl ttl bi-directional i/o port t0cki 1 2 i st clock input to timer0. must be tied to v ss or v dd, if not in use, to reduce current consumption. mclr 28 28 i st master clear (reset) input. this pin is an active low reset to the device. osc1/clkin 27 27 i st oscillator crystal input/external clock source input. osc2/clkout 26 26 o oscillator crystal output. connects to crystal or resonator in crystal oscillator mode. in rc mode, osc2 pin outputs clkout which has 1/4 the frequency of osc1, and denotes the instruction cycle rate. v dd 2 3,4 p positive supply for logic and i/o pins. v ss 4 1,14 p ground reference for logic and i/o pins. n/c 3,5 unused, do not connect legend: i = input, o = output, i/o = input/output, p = power, ?= not used, ttl = ttl input, st = schmitt trigger input pic16fr5x ds40141a-page 8 advanced information 1996 microchip technology inc. 3.0 memory organization figure 3-1: pic16fr54/fr55 program memory map and stack figure 3-2: pic16fr56 program memory map and stack pc<8:0> stack level 1 stack level 2 user memory space call, retlw 9 000h 1ffh reset vector 0ffh 100h on-chip program memory pc<9:0> stack level 1 stack level 2 user memory space 10 000h 1ffh reset vector 0ffh 100h on-chip program memory (page 0) on-chip program memory (page 1) 200h 3ffh 2ffh 300h call, retlw figure 3-3: pic16fr57 program memory map and stack pc<10:0> stack level 1 stack level 2 user memory space 11 000h 1ffh reset vector 0ffh 100h on-chip program memory (page 0) on-chip program memory (page 1) on-chip program memory (page 2) on-chip program memory (page 3) 200h 3ffh 2ffh 300h 400h 5ffh 4ffh 500h 600h 7ffh 6ffh 700h call, retlw this document was created with framemake r404 1996 microchip technology inc. advanced information ds40141a-page 9 pic16fr5x figure 3-4: pic16fr54/fr56 register file map file address 00h 01h 02h 03h 04h 05h 06h 07h 1fh indf (1) tmr0 pcl status fsr porta portb general purpose registers note 1: not a physical register. 0fh 10h figure 3-5: PIC16FR55 register file map file address 00h 01h 02h 03h 04h 05h 06h 07h 1fh indf (1) tmr0 pcl status fsr porta portb general purpose registers 0fh 10h portc 08h note 1: not a physical register. figure 3-6: pic16fr57 register file map file address 00h 01h 02h 03h 04h 05h 06h 07h 1fh indf (1) tmr0 pcl status fsr porta portb 0fh 10h bank 0 bank 1 bank 2 bank 3 3fh 30h 20h 2fh 5fh 50h 40h 4fh 7fh 70h 60h 6fh general purpose register general purpose registers general purpose registers general purpose registers general purpose registers portc 08h addresses map back to addresses in bank 0. note 1: not a physical register. fsr<6:5> 00 01 10 11 pic16fr5x ds40141a-page 10 advanced information 1996 microchip technology inc. table 3-1: special function register summary address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 value on power-on reset value on mclr and wdt reset n/a tris i/o control registers (trisa, trisb, trisc) 1111 1111 1111 1111 n/a option contains control bits to con?ure timer0 and timer0/wdt prescaler --11 1111 --11 1111 00h indf uses contents of fsr to address data memory (not a physical register) xxxx xxxx uuuu uuuu 01h tmr0 8-bit real-time clock/counter xxxx xxxx uuuu uuuu 02h (1) pcl low order 8 bits of pc 1111 1111 1111 1111 03h status pa2 pa1 pa0 t o pd zdcc 0001 1xxx 000q quuu 04h fsr indirect data memory address pointer 1xxx xxxx 1uuu uuuu 05h porta ra3 ra2 ra1 ra0 ---- xxxx ---- uuuu 06h portb rb7 rb6 rb5 rb4 rb3 rb2 rb1 rb0 xxxx xxxx uuuu uuuu 07h (2) portc rc7 rc6 rc5 rc4 rc3 rc2 rc1 rc0 xxxx xxxx uuuu uuuu legend: shaded boxes = unimplemented or unused, ?= unimplemented, read as '0' (if applicable) x = unknown, u = unchanged, q = value depends on condition. note 1: the upper byte of the program counter is not directly accessible. see section 4.5 of the pic16c5x data sheet (ds30015m) for an explanation of how to access these bits. 2: file address 07h is a general purpose register on the pic16fr54/fr56. 1996 microchip technology inc. advanced information ds40141a-page 11 pic16fr5x connecting to microchip bbs connect worldwide to the microchip bbs using the compuserve ? communications network. in most cases a local call is your only expense. the microchip bbs connection does not use compuserve member ship services, therefore, you do not need compuserve membership to join microchip's bbs . there is no charge for connecting to the bbs, except toll charge to compuserve access number, where applicable. you do not need to be a compuserve member to take advantage of this connection (you never actually log in to compuserve). the procedure to connect will vary slightly from country to country. please check with your local compuserve agent for details if you have a problem. compuserve service allows multiple users at baud rates up to 14,400 bps. the following connect procedure applies in most locations: 1. set your modem to 8-bit, no parity, and one stop (8n1). this is not the normal compuserve setting which is 7e1. 2. dial your local compuserve access number. 3. depress |