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AMC7114 PN4093 VUO52 7323S 00144 5ETTT C5103B MC14578
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  87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 1 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary g eneral d escription the ics87949 is a low skew, 1, 2 clock gen- erator and a member of the hiperclocks? family of high performance clock solutions from ics. the ics87949 has selectable single ended clock or lvpecl clock inputs. the single ended clock input accepts lvcmos or lvttl input levels. the pclk, npclk pair can accept lvpecl, cml, or sstl input levels. the low impedance lvcmos outputs are designed to drive 50 ? series or parallel terminated transmission lines. the ef- fective fanout can be increased from 15 to 30 by utilizing the ability of the outputs to drive two series terminated lines. the divide select inputs, div_selx, control the output fre- quency of each bank. the outputs can be utilized in the 1, 2 or a combination of 1 and 2 modes. the master reset input, mr/noe, resets the internal frequency dividers and also controls the active and high impedance states of all outputs. the ics87949 is characterized at 3.3v core/3.3v output. guar- anteed output and part-to-part skew characteristics make the ics87949 ideal for those clock distribution applications demand- ing well defined performance and repeatability. f eatures  15 single ended lvcmos outputs, 7 ? typical output impedance  selectable lvcmos or lvpecl clock inputs  clk0 and clk1 can accept the following input levels: lvcmos and lvttl  pclk, npclk supports the following input types: lvpecl, cml, sstl  maximum input frequency: 250mhz  output skew: 350ps (maximum)  part-to-part skew: 2.75ns (maximum)  3.3v supply voltage  0c to 70c ambient operating temperature  industrial temperature information available upon request  pin compatible to the mpc949 b lock d iagram p in a ssignment 52-lead lqfp 10mm x 10mm x 1.4mm package body y package top view hiperclocks?  nc v ddd qd4 gnd qd3 v ddd qd2 gnd qd1 v ddd qd0 gnd nc mr/noe clk_sel v dd clk0 clk1 pclk npclk pclk_sel div_sela div_selb div_selc div_seld gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26  38 37 36 35 34 33 32 31 30 29 28 27 52 51 50 49 48 47 46 45 44 43 42 41 40 nc gnd qc0 v ddc qc1 gnd qc2 v ddc qc3 gnd gnd qd5 nc nc v ddb qb2 gnd qb1 v ddb qb0 gnd gnd qa1 v dda qa0 gnd ics87949 div_sela div_selb div_selc div_seld mr/noe qa0 - qa1 qb0 - qb2 qc0 - qc3 qd0 - qd5 clk_sel clk0 clk1 pclk npclk pclk_sel 0 1 1 2 0 1 0 1 0 1 0 1 r 0 1 the preliminary information presented herein represents a product in prototyping or pre-production. the noted characteristics a re based on initial product characterization. integrated circuit systems, incorporated (ics) reserves the right to change any circuitry or specific ations without notice.
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 2 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary t able 1. p in d escriptions r e b m u ne m a ne p y tn o i t p i r c s e d 1e o n / r mt u p n in w o d l l u p . e t a t s i r t o t s t u p t u o s t e s e r . e l b a n e t u p t u o d n a t e s e r r e t s a m . s l e v e l e c a f r e t n i s o m c v l . s t u p t u o l l a s e l b a s i d d n a s e l b a n e 2l e s _ k l ct u p n in w o d l l u p , w o l n e h w . 1 k l c s t c e l e s , h g i h n e h w . t u p n i t c e l e s k c o l c . s l e v e l e c a f r e t n i l t t v l / s o m c v l . 0 k l c s t c e l e s 3v d d r e w o p. v 3 . 3 o t t c e n n o c . n i p y l p p u s e v i t i s o p 5 , 41 k l c , 0 k l ct u p n ip u l l u p. s t u p n i k c o l c l t t v l / s o m c v l 6k l c pt u p n in w o d l l u p. t u p n i k c o l c l c e p v l l a i t n e r e f f i d g n i t r e v n i - n o n 7k l c p nt u p n ip u l l u p. t u p n i k c o l c l c e p v l l a i t n e r e f f i d g n i t r e v n i 8l e s _ k l c pt u p n in w o d l l u p. t u p n i t c e l e s k l c p 9a l e s _ v i dt u p n in w o d l l u p . s t u p t u o a k n a b r o f n o i s i v i d y c n e u q e r f s l o r t n o c . s l e v e l e c a f r e t n i s o m c v l 0 1b l e s _ v i dt u p n in w o d l l u p . s t u p t u o b k n a b r o f n o i s i v i d y c n e u q e r f s l o r t n o c . s l e v e l e c a f r e t n i s o m c v l 1 1c l e s _ v i dt u p n in w o d l l u p . s t u p t u o c k n a b r o f n o i s i v i d y c n e u q e r f s l o r t n o c . s l e v e l e c a f r e t n i s o m c v l 2 1d l e s _ v i dt u p n in w o d l l u p . s t u p t u o d k n a b r o f n o i s i v i d y c n e u q e r f s l o r t n o c . s l e v e l e c a f r e t n i s o m c v l , 9 1 , 5 1 , 3 1 , 0 3 , 9 2 , 3 2 , 3 4 , 8 3 , 4 3 2 5 , 8 4 , 7 4 d n gr e w o p. d n u o r g o t t c e n n o c . d n u o r g y l p p u s r e w o p , 7 2 , 6 2 , 4 1 0 4 , 9 3 c nd e s u n u. t c e n n o c o n , 8 1 , 6 1 , 2 2 , 0 2 8 2 , 4 2 , 1 d q , 0 d q , 3 d q , 2 d q 5 d q , 4 d q t u p t u o . s l e v e l e c a f r e t n i s o m c v l . s t u p t u o d k n a b 7 ? . e c n a d e p m i t u p t u o l a c i p y t 5 2 , 1 2 , 7 1v d d d r e w o p . v 3 . 3 o t t c e n n o c . s t u p t u o d k n a b r o f s n i p y l p p u s e v i t i s o p , 3 3 , 1 3 7 3 , 5 3 , 2 c q , 3 c q 0 c q , 1 c q t u p t u o . s l e v e l e c a f r e t n i s o m c v l . s t u p t u o c k n a b 7 ? . e c n a d e p m i t u p t u o l a c i p y t 6 3 , 2 3v c d d r e w o p . v 3 . 3 o t t c e n n o c . s t u p t u o c k n a b r o f s n i p y l p p u s e v i t i s o p 5 4 , 1 4v b d d r e w o p . v 3 . 3 o t t c e n n o c . s t u p t u o b k n a b r o f s n i p y l p p u s e v i t i s o p , 4 4 , 2 4 6 4 , 1 b q , 2 b q 0 b q t u p t u o . s l e v e l e c a f r e t n i s o m c v l . s t u p t u o b k n a b 7 ? . e c n a d e p m i t u p t u o l a c i p y t 1 5 , 9 40 a q , 1 a qt u p t u o . s l e v e l e c a f r e t n i s o m c v l . s t u p t u o a k n a b 7 ? . e c n a d e p m i t u p t u o l a c i p y t 0 5v a d d r e w o p . v 3 . 3 o t t c e n n o c . s t u p t u o a k n a b r o f s n i p y l p p u s e v i t i s o p : e t o n p u l l u p d n a n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 3 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary t able 2. p in c haracteristics t able 3. f unction t able l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k ? r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k ? c d p ) t u p t u o r e p ( e c n a t i c a p a c n o i t a p i s s i d r e w o pv d d , * v x d d v 6 . 3 =d b tf p r t u o e c n a d e p m i t u p t u o 7 ? * : e t o nv x d d v s e t o n e d a d d ,v b d d ,v c d d ,v d d d . s t u p n is t u p t u o e o n / r ma l e s _ v i db l e s _ v i dc l e s _ v i dd l e s _ v i d1 a q - 0 a q2 b q - 0 b q3 c q - 0 c q5 d q - 0 d q 1x x x x z i hz i hz i hz i h 00 x x x 1 / n i fe v i t c ae v i t c ae v i t c a 01 x xx 2 / n i fe v i t c ae v i t c ae v i t c a 0x 0 x x e v i t c a1 / n i fe v i t c ae v i t c a 0x 1 x x e v i t c a2 / n i fe v i t c ae v i t c a 0x x 0 x e v i t c ae v i t c a1 / n i fe v i t c a 0x x 1 x e v i t c ae v i t c a2 / n i fe v i t c a 0x x x 0 e v i t c ae v i t c ae v i t c a1 / n i f 0x x x 1 e v i t c ae v i t c ae v i t c a2 / n i f
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 4 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary a bsolute m aximum r atings supply voltage, v ddx 4.6v inputs, v i -0.5v to v dd + 0.5v outputs, v o -0.5v to v dd + 0.5v package thermal impedance, ja 42.3 c/w (0 lfpm) storage temperature, t stg -65 c to 150 c stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions beyond those listed in the dc characteristics or ac characteristics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. t able 4a. p ower s upply dc c haracteristics , v dd = v dd x = 3.3v0.3v, t a = 0 c to 70 c t able 4b. lvcmos dc c haracteristics , v dd = v dd x = 3.3v0.3v, t a = 0 c to 70 c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e v i t i s o p 0 . 33 . 36 . 3v * v x d d e g a t l o v y l p p u s t u p t u o 0 . 33 . 36 . 3v i d d t n e r r u c y l p p u s e r o c 0 5a m * * i x d d t n e r r u c y l p p u s t u p t u o 2 1a m * v x d d v s e t o n e d a d d ,v b d d ,v c d d ,v d d d . * * i x d d i s e t o n e d a d d ,i b d d ,i c d d ,i d d d . l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i t u p n i e g a t l o v h g i h , b l e s _ v i d , a l e s _ v i d , d l e s _ v i d , c l e s _ v i d , l e s _ k l c p , l e s _ k l c e o n / r m 2v d d 3 . 0 +v 1 k l c , 0 k l c2v d d 3 . 0 +v v l i t u p n i e g a t l o v w o l , b l e s _ v i d , a l e s _ v i d , d l e s _ v i d , c l e s _ v i d , l e s _ k l c p , l e s _ k l c e o n / r m 3 . 0 -8 . 0v 1 k l c , 0 k l c3 . 0 -3 . 1v i h i t u p n i t n e r r u c h g i h , b l e s _ v i d , a l e s _ v i d , d l e s _ v i d , c l e s _ v i d , l e s _ k l c p , l e s _ k l c e o n / r m * v x d d =v n i v 6 . 3 = 0 5 1a 1 k l c , 0 k l c * v x d d =v n i v 6 . 3 = 5a i l i t u p n i t n e r r u c w o l , b l e s _ v i d , a l e s _ v i d , d l e s _ v i d , c l e s _ v i d , l e s _ k l c p , l e s _ k l c e o n / r m * v x d d , v 6 . 3 =v n i v 0 = 5 -a 1 k l c , 0 k l c * v x d d , v 6 . 3 =v n i v 0 = 0 5 1 -a v h o e g a t l o v h g i h t u p t u oi h o a m 0 2 - =5 . 2v v l o e g a t l o v w o l t u p t u oi l o a m 0 2 =4 . 0v i l z o w o l t n e r r u c e t a t s i r t t u p t u o d b tv i h z o h g i h t n e r r u c e t a t s i r t t u p t u o d b tv * : e t o nv x d d v s e t o n e d d d v , a d d v , b d d v , c d d v , d d d .
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 5 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary t able 5. ac c haracteristics , v dd = v dd x = 3.3v0.3v, t a = 0 c to 70 c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p n i 0 5 2z h m p t h l , y a l e d n o i t a g a p o r p 1 e t o n ; h g i h o t w o l 5 . 3s n p t l h , y a l e d n o i t a g a p o r p 1 e t o n ; w o l o t h g i h 5 . 3s n t ) o ( k s5 , 2 e t o n ; w e k s t u p t u ot a e g d e g n i s i r n o d e r u s a e mv x d d 2 /0 5 3s p t ) p p ( k s5 , 3 e t o n ; w e k s t r a p - o t - t r a pt a e g d e g n i s i r n o d e r u s a e mv x d d 2 /5 7 . 2s n t r 4 e t o n ; e m i t e s i r t u p t u ov 0 . 2 o t 8 . 01 .0 . 1s n t f 4 e t o n ; e m i t l l a f t u p t u ov 0 . 2 o t 8 . 01 .0 . 1s n t n e ; e m i t e l b a n e t u p t u o4 e t o n 1 1s n t s i d ; e m i t e l b a s i d t u p t u o4 e t o n 1 1s n v e h t m o r f d e r u s a e m : 1 e t o n d d /v o t t u p n i e h t f o 2 x d d . t u p t u o e h t f o 2 / . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o f o s k n a b s s o r c a w e k s s a d e n i f e d : 2 e t o n v t a d e r u s a e m x d d . 2 / d n a s e g a t l o v y l p p u s e m a s e h t t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 3 e t o n a d e r u s a e m e r a s t u p t u o e h t , e c i v e d h c a e n o s t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w v t x d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 4 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 5 e t o n t able 4c. lvpecl dc c haracteristics , v dd = v dd x = 3.3v0.3v, t a = 0 c to 70 c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u i h i t n e r r u c h g i h t u p n i k l c p * v x d d v = n i v 6 . 3 = 0 5 1a k l c p n * v x d d v = n i v 6 . 3 = 5a i l i t n e r r u c w o l t u p n i k l c p * v x d d v , v 6 . 3 = n i v 0 = 5 -a k l c p n * v x d d v , v 6 . 3 = n i v 0 = 0 5 1 -a v p p e g a t l o v t u p n i k a e p - o t - k a e p 3 . 01v v r m c 2 , 1 e t o n ; e g a t l o v t u p n i e d o m n o m m o c 5 . 1 + d n gv d d v v s a d e n i f e d s i e g a t l o v e d o m n o m m o c : 1 e t o n h i . s n o i t a c i l p p a d e d n e e l g n i s r o f : 2 e t o n , v s i k l c p n d n a k l c p r o f e g a t l o v t u p n i m u m i x a m e h t d d . v 3 . 0 + : e t o n * v x d d v s e t o n e d d d v , a d d v , b d d v , c d d v , d d d .
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 6 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary p arameter m easurement i nformation  f igure 1 - 3.3v o utput l oad t est c ircuit scope qx lvcmos 1.65v0.15v v dd v ddx -1.65v0.15v gnd f igure 2 - d ifferential i nput l evel v cmr cross points v pp npclk pclk gnd v dd
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 7 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary f igure 3 - o utput s kew t sk(o) v dd 2 v dd 2 qx qy x x f igure 4 - p art - to -p art s kew qx qy part 1 part 2 t sk(pp) v dd 2 v dd 2 x x f igure 5 - i nput and o utput r ise and f all t ime clock inputs and outputs 20% 80% 80% 20% t r t f v swing 2v 0.8v 2v 0.8v
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 8 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary f igure 6 - p ropagation d elay t pd v dd 2 ? ? v dd 2 clk0, clk1 qax, qbx, qcx, qdx x  f igure 7 - odc & t p eriod pulse width t period t pw t period odc = v dd 2 qax, qbx, qcx, qdx x npclk pclk
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 9 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary r eliability i nformation t ransistor c ount the transistor count for ics87949 is: 1545 t able 6.  vs . a ir f low t able  ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 58.0 c/w 47.1 c/w 42.0 c/w multi-layer pcb, jedec standard test boards 42.3 c/w 36.4 c/w 34.0 c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs.
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 10 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary p ackage o utline - y s uffix t able 7. p ackage d imensions reference document: jedec publication 95, ms-026 n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y s c c b m u m i n i ml a n i m o nm u m i x a m n 2 5 a - -- -0 6 . 1 1 a 5 0 . 0- -5 1 . 0 2 a 5 3 . 10 4 . 15 4 . 1 b 2 2 . 02 3 . 08 3 . 0 1 b 2 2 . 00 3 . 03 3 . 0 d c i s a b 0 0 . 2 1 1 d c i s a b 0 0 . 0 1 e c i s a b 0 0 . 2 1 1 e c i s a b 0 0 . 0 1 e c i s a b 5 6 . 0 c c c 5 4 . 0- -0 1 . 0 d d d - -- -3 1 . 0
87949ay www.icst.com/products/hiperclocks.html rev. a january 2, 2002 11 

   ics87949 l ow s kew 1, 2 c lock g enerator preliminary t able 8. o rdering i nformation r e b m u n r e d r o / t r a pg n i k r a me g a k c a pt n u o ce r u t a r e p m e t y a 9 4 9 7 8 s c iy a 9 4 9 7 8 s c ip f q l d a e l 2 5y a r t r e p 0 6 1c 0 7 o t c 0 t y a 9 4 9 7 8 s c iy a 9 4 9 7 8 s c il e e r d n a e p a t n o p f q l d a e l 2 50 0 5c 0 7 o t c 0 while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments.


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