cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 1/ 8 MTP1013S3 cystek product specification -20v p-channel enhancement mode mosfet MTP1013S3 bv dss -20v i d -540ma r dson @v gs =-4.5v, i d =-430ma 0.64(typ) r dson @v gs =-4v, i d =-300ma 0.68(typ) r dson @v gs =-2.5v, i d =-300ma 1.1 (typ) r dson @v gs =-1.8v, i d =-150ma 1.9 (typ) features ? very low level gate drive requirements allo wing direct operation in 3v circuits. v gs(th) <1.2v. ? compact industrial standard sot-323 surface mount package. ? pb-free package. equivalent circuit outline ordering information device package shipping MTP1013S3-0-t1-g sot-23 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel MTP1013S3 sot-323 d g gate s g s source d drain
cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 2/ 8 MTP1013S3 cystek product specification absolute maximum ratings (tj=25 c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds -20 gate-source voltage v gs 10 v continuous drain current @ t a =25 c, v gs =-4.5v i d -0.54 pulsed drain current (note 1) i dm -1.5 a maximum power dissipation @ t a =25 (note 2) p d 350 mw thermal resistance, junction-to-ambient r th,ja 357 c/w operating junction and storage temperature tj, tstg -55~+150 c note : 1. pulse width 10 s, duty cycle 2%. 2. surface mounted on 1 in2 copper pad of fr-4 board, t 5s. electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -20 - - v v gs =0v, i d =-250 a v gs(th) -0.5 -0.8 -1.2 v v ds =v gs , i d =-250 a g fs - 0.5 - s v ds =-10v, i d =-200ma i gss - - 10 v gs = 10v, v ds =0 - - -1 v ds =-20v, v gs =0 i dss - - -10 a v ds =-20v, v gs =0, tj=55 c - 0.64 0.9 v gs =-4.5v, i d =-430ma - 0.68 0.9 v gs =-4v, i d =-300ma - 1.1 1.4 v gs =-2.5v, i d =-300ma *r ds(on) - 1.9 2.7 v gs =-1.8v, i d =-150ma dynamic ciss - 59 - coss - 21 - crss - 15 - pf v ds =-10v, v gs =0, f=1mhz *t d(on) - 5 - *t r - 6 - *t d(off) - 42 - *t f - 14 - ns v ds =-6v, i d =-500ma, v gs =-4.5v, r g =50 *qg - 1.2 - *qgs - 0.38 - *qgd - 0.23 - nc v ds =-5v, i d =-250ma, v gs =-4.5v source-drain diode *i s - - -0.54 *i sm - - -1.5 a *v sd - -0.77 -1.2 v v gs =0v, i s =-100ma *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 3/ 8 MTP1013S3 cystek product specification typical characteristics typical output characteristics 0 0.4 0.8 1.2 1.6 2 012345678910 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =1.8v -v gs =2v -v gs =1.5v -v gs =2.5v -v gs =3v -v gs =3.5v -v gs =5v, 4.5v,4v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 0 2 4 6 8 10 12 0.001 0.01 0.1 1 -i d , drain current(a) r ds(on) , static drain-source on-state resistance() -v gs =2.5v -v gs =1.5v -v gs =1.2v -v gs =1.8v -v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 0.3 0.6 0.9 1.2 1.5 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-4.5v, i d =-500ma v gs =-2.5v, i d =-300ma -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance() i d =-500ma i d =-300ma i d =-10ma
cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 4/ 8 MTP1013S3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 1 10 100 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) , normalized threshold voltage i d =-250 a single pulse power rating, junction to ambient 0 4 8 12 16 20 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c r ja =357c/w gate charge characteristics 0 1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-250ma v ds =-15v v ds =-10v v ds =-5v maximum safe operating area 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100m 1ms 100 s t a =25c, tj=150c, v gs =-4.5v, r ja =357c/w single pulse maximum drain current vs junctiontemperature 0 0.1 0.2 0.3 0.4 0.5 0.6 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-4.5v, r ja =357c/w
cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 5/ 8 MTP1013S3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 200 400 600 800 1000 1200 0 0.5 1 1.5 2 2.5 3 -v gs , gate-source voltage(v) -i d , drain current (ma) -v ds =5v 150c t j = -40c, 0c, 25c power derating curve 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *z ja (t) 4.r ja =357 c/w
cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 6/ 8 MTP1013S3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 7/ 8 MTP1013S3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c698s3 issued date : 2012.07.13 revised date : 2013.09.09 page no. : 8/ 8 MTP1013S3 cystek product specification sot-323 dimension millimeters date code marking: te tw 3-lead sot-323 plastic surface mounted package cystek package code: s3 style: pin 1.gate 2.source 3.drain inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.900 1.100 0.035 0.043 e1 2.150 2.450 0.085 0.096 a1 0.000 0.100 0.000 0.004 e 0.650 typ 0.026 typ a2 0.900 1.000 0.035 0.039 e1 1.200 1.400 0.047 0.055 b 0.200 0.400 0.008 0.016 l 0.525 ref 0.021 ref c 0.080 0.150 0.003 0.006 l1 0. 260 0.460 0.010 0.018 d 2.000 2.200 0.079 0.087 0 8 0 8 e 1.150 1.350 0.045 0.053 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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