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hdlx-3416 series four character 6.9 mm (0.27 inch) smart 5 x 7 alphanumeric displays data sheet esd warning: standard cmos handling precautions should be observed to avoid static discharge. features ?? smart alphanumeric display built-in ram, ascii decoder, and led drive circuitry ?? software controlled dimming and blanking ?? 128 ascii character set ?? end-stackable ?? categorized for luminous intensity C yellow and green categories for color C use of like categories yields a uniform display ?? wide operating tempera ture range -40c to +85c ?? wave solderable ?? wide viewing angle (50 typical) description these are 5 x 7 dot matrix displays with four 0.27 tall char- acters, driven by an on-board cmos ic. the ic stores and decodes 7 bit ascii data and displays it with an easy to read 5 x 7 font. multi-plexing circuitry and drivers are included in the ic to allow the display to interface simply with bus-based micro processor systems. the address and data inputs of the display can be directly con nected to the microprocessor address and data buses. these displays are related to the hdlx-2416 family, and thus share the same enhancements over the hpdl-2416 segmented displays. these features include support for the full 128 character us ascii character set, 8 level dimming control, external hardware dimming capability, and digit blanking. an extended function disable exists for those designers who desire compatibility with competitive displays. this function disables the dimming and digit blanking controls. devices: high effi ciency red orange yellow green hdlo-3416 HDLA-3416 hdly-3416 hdlg-3416
2 absolute maximum ratings supply voltage, v dd to ground [1] -0.5 v to 7.0 v input voltage, any pin to ground -0.5 v to v dd + 0.5 v free air operating temperature range, t a -40c to +85c storage temperature, t s -40c to +85c cmos ic junction temperature, t j (ic) +150c relative humidity (non-condensing) at 65c 85% soldering temperature [1.59 mm (0.063 in.) below body] solder dipping 260c for 5 secs wave soldering 250c for 3 secs esd protection, r = 1.5 k ? , c = 100 pf v z = 1 kv (each pin) note: 1. maximum voltage is with no leds illuminated. package dimensions notes: 1. unless otherwise specifi ed, the tolerance on all dimensions is 0.254 mm (0.010). 2. all dimensions are in millimeters (inches). 32.77 (1.290) 8.26 (0.325) 10.03 (0.395) 20.07 (0.790) 6.86 (0.270) 4.45 (0.175) 0.51 (0.020) typ. 8.64 (0.340) 2.54 (0.100) typ. 4.06 (0.160) 10.16 (0.400) 2.41 (0.095) typ. 0.38 (0.015) 15.24 (0.600) 0.25 (0.010) typ. pin 1 identifier pin no. function pin no. function 1 2 3 4 5 6 7 8 9 10 11 no connect no connect ce1 ce2 clr v dd a0 a1 wr cu cue 12 13 14 15 16 17 18 19 20 21 22 ground no connect bl no connect d0 d1 d2 d3 d4 d5 d6
3 character set ascii code d0 d1 d2 d3 hex 0 0 0 0 0 d6 d5 d4 1 0 0 0 1 0 1 0 0 2 1 1 0 0 3 0 0 1 0 4 1 0 1 0 5 0 1 1 0 6 1 1 1 0 7 0 0 0 1 8 1 0 0 1 9 0 1 0 1 a 1 1 0 1 b 0 0 1 1 c 1 0 1 1 d 0 1 1 1 e 1 1 1 1 f 000 0 001 1 010 2 011 3 100 4 101 5 110 6 111 7 notes: 1 = high level 0 = low level
4 electrical/optical characteristics over operating temperature range 4.5 < v dd < 5.5 v (unless otherwise specifi ed) all devices ?25c [1] parameter symbol min. typ. max. max. units test conditions i dd blank i dd (blnk) 1.0 4.0 ma all digits blanked input current i i -40 10 ? a v in = 0 v to v dd v dd = 5.0 v input voltage high v ih 2.0 v dd v input voltage low v il gnd 0.8 v i dd 4 digits 20 dots/ i dd (#) 110 130 160 ma # on in all four character [2,3] locations i dd cursor all dots i dd (cu) 92 110 135 ma cursor on in all on @ 50% four locations notes: 1. v dd = 5.0 v 2. average i dd measured at full brightness. peak i dd = 28/15 x average i dd (#). 3. i dd (#) max. = 130 ma, 150c ic junction temperature and v dd = 5.5 v. recommended operating conditions parameter symbol min. typ. max. units supply voltage v dd 4.5 5.0 5.5 v
5 optical characteristics at 25c [1] v dd = 5.0 v at full brightness high effi ciency red hdlo-3416 parameter symbol min. typ. units test conditions average luminous intensity i v 1.2 3.5 mcd * illuminated in all four digits. per digit, character average 19 dots on per digit. peak wavelength ? peak 635 nm dominant wavelength [2] ? d 626 nm orange HDLA-3416 parameter symbol min. typ. units test conditions average luminous intensity i v 1.2 3.5 mcd * illuminated in all four digits per digit, character average 19 dots on per digit. peak wavelength ? peak 600 nm dominant wavelength [2] ? d 602 nm yellow hdly-3416 parameter symbol min. typ. units test conditions average luminous intensity i v 1.2 3.7 mcd * illuminated in all four digits per digit, character average 19 dots on per digit. peak wavelength ? peak 583 nm dominant wavelength [2] ? d 585 nm green hdlg-3416 parameter symbol min. typ. units test conditions average luminous intensity i v 1.2 5.6 mcd * illuminated in all four digits per digit, character average 19 dots on per digit. peak wavelength ? peak 568 nm dominant wavelength [2] ? d 574 nm notes: 1. refers to the initial case temperature of the device immediately prior to the light measurement. 2. dominant wavelength, ? d , is derived from the cie chromaticity diagram, and represents the single wavelength which defi nes the color of the device.
6 ac timing characteristics over operating temperature range at v dd = 4.5 v parameter symbol min units address setup t as 10 ns address hold t ah 40 ns data setup t ds 50 ns data hold t dh 40 ns chip enable setup t ces 0 ns chip enable hold t ceh 0 ns write time t w 75 ns clear t clr 10 ? s clear disable t clrd 1 ? s timing diagram enlarged character font notes: 1. unless otherwise specifi ed, the tolerance on all dimensions is 0.254 mm (0.010"). 2. dimensions are in millimeters (inches). ce 1 t ces t as t w t ah t ceh 2.0 v 0.8 v 2.0 v 0.8 v 2.0 v 0.8 v 2.0 v 0.8 v t ds t dh t clrd t clr 2.0 v 0.8 v ce 2 a 0 ? a 1 , cu wr d 0 ? d 6 clr 1.05 (0.041) typ. 6.9 (0.27) typ. 1.09 (0.043) typ. 0.25 (0.010) typ. 4.4 (0.175) typ.
7 display internal block diagram figure 1 shows the hdlx-3416 display internal block diagram. the cmos ic consists of a 4 x 7 character ram, a 2 x 4 attribute ram, a 5 bit control register, a 128 character ascii decoder and the refresh circuitry necessary to syn- chronize the decoding and driving of four 5 x 7 dot matrix displays. four 7 bit ascii words are stored in the character ram. the ic reads the ascii data and decodes it via the 128 character ascii decoder. the ascii decoder includes the 64 character set of the hpdl-2416, 32 lower case ascii symbols, and 32 foreign language symbols. a 5 bit word is stored in the control register. three fi elds within the control register provide an 8 level brightness control, master blank, and extended functions disable. for each display digit location, two bits are stored in the attribute ram. one bit is used to enable a cursor character at each digit location. a second bit is used to individually disable the blanking features at each digit location. the display is blanked and dimmed through an internal blanking input on the row drivers. logic within the ic allows the user to dim the display either through the bl input or through the brightness control in the control register. similarly the display can be blanked through the bl input, the master blank in the control register, or the digit blank disable in the attribute ram. electrical description pin function description chip enable (ce 1 and ce 1 and ce 2 must be a logic 0 to write to the display. ce 2 , pins 3 and 4) clear (clr, pin 5) when clr is a logic 0 the ascii ram is reset to 20hex (space) and the control register/attribute ram is reset to 00hex. cursor enable cue determines whether the ic displays the ascii or (cue pin 11) the cursor memory. (1 = cursor, 0 = ascii.) cursor select cu determines whether data is stored in the ascii (cu, pin 10) ram or the attribute ram/control register. (1 = ascii, 0 = attribute ram/ control register.) write (wr, pin 9) wr must be a logic 0 to store data in the display. address inputs a 0 -a 1 selects a specifi c location in the display (a 1 and a 0 , pins memory. address 00 accesses the far right display 7 and 8) location. address 11 accesses the far left location. data inputs (d 0 -d 6 , d 0 -d 6 are used to specify the input data for pins 16 C 22) the display. v dd (pin 6) v dd is the positive power supply input. gnd (pin 12) gnd is the display ground. blanking input bl is used to fl ash the display, blank the (bl, pin 14) display or to dim the display.
8 figure 1. internal block diagram. character ram ascii decoder character/cursor multiplexer write address a 0 ? a 1 2 d 0 ? d 6 7 data in data out 7 character select column data 5 0 3 row select osc + 32 + 7 digital duty control row drivers display column drivers row select blank clr attribute ram digit cursor d 0 d 1 digit blank disable clr control register master blank d 2 d 3 ? d 5 3 brightness levels clr d 6 extended functions display write clr clr clr write 2 read address 5 1 cursor character character/ cursor multiplexer select cue dc n (4 x 7) ce 1 ce 2 wr cu ce 1 ce 2 wr cu write write address a 0 ? a 1 read address 2 (2 x 4) 1 x 5 3 4 (lsbs) 2 (msbs) 3 efd efd efd dbd n mb bl
9 0 = logic 0; 1 = logic 1; x = do not care figure 2. display truth table. display clear data stored in the character ram, control register, and attribute ram will be cleared if the clear (clr) is held low for a minimum of 10 s. note that the display will be cleared regardless of the state of the chip enables (ce 1 , ce 2 ). after the display is cleared, the ascii code for a space (20hex) is loaded into all character ram locations and 00hex is loaded into all attribute ram/control register memory locations. data entry figure 2 shows a truth table for the hdlx-3416 display. setting the chip enables (ce 1 , ce 2 ) to logic 0 and the cursor select (cu) to logic 1 will enable ascii data loading. when cursor select (cu) is set to logic 0, data will be loaded into the control register and attribute ram. address inputs a 0 -a 1 are used to select the digit location in the display. data inputs d 0 -d 6 are used to load information into the display. data will be latched into the display on the rising edge of the wr signal. d 0 -d 6 , a 0 -a 1 , ce 1 , ce 2 , and cu must be held stable during the write cycle to ensure that correct data is stored into the display. data can be loaded into the display in any order. note that when a 0 and a 1 are logic 0, data is stored in the right most display location. cursor when cursor enable (cue) is a logic 1, a cursor will be displayed in all digit locations where a logic 1 has been stored in the digit cursor memory in the attribute ram. the cursor consists of all 35 dots on at half brightness. a fl ashing cursor can be displayed by pulsing cue. when cue is a logic 0, the ascii data stored in the character ram will be dis played regardless of the digit cursor bits. blanking blanking of the display is con trolled through the bl input, the control register, and attribute ram. the user can achieve a variety of functions by using these controls in diff erent combinations, such as full hardware display blank, software blank, blanking of individual characters, and syn chronized fl ashing of individual characters or entire display (by strobing the blank input). all of these blanking modes aff ect only the output drivers, maintain- ing the contents and write capability of the internal rams and control register, so that normal loading of rams and control register can take place even with the display blanked. cue bl clr ce 1 ce 2 wr cu a 1 a 0 d 6 d 5 d 4 d 3 d 2 d 1 d 0 function 0 1 1 display ascii 1 1 1 display stored cursor x x 0 x x x x x x x x x x x x x reset rams x 0 1 blank display but do not reset rams and control register extended intensity master digit digit write to attribute ram 0 0 0 functions control blank blank cursor and control register disable disable 0 0 0 = 000 = 100% 0 = digit digit dbdn = 0, allows digit n to be 0 0 1 enable 001 = 60% display blank cursor blanked d 1 -d 5 010 = 40% on disable 1 1 011 = 27% dbdn = 1 prevents digit n from x x 1 0 0 0 1 = 100 = 17% 1 = digit digit being blanked. 0 1 0 disable 101 = 10% display blank cursor d 1 -d 5 110 = 7% blanked disable 2 2 dcn = 0 removes cursor from 111 = 3% digit n d 0 digit digit 0 1 1 always blank cursor dcn = 1 stores cursor at enabled disable 3 3 digit n 1 0 0 digit 0 ascii data (right most character) x x 1 0 0 0 1 0 1 digit 1 ascii data write to character ram 1 1 0 digit 2 ascii data 1 1 1 digit 3 ascii data (left most character) 1 x x x x 1 x 1 x x x x x x x x x x x no change x x 1
10 table 1. current requirements at diff erent brightness levels symbol d 5 d 4 d 3 brightness 25c typ. 25c max. max. over temp. units i dd (#) 0 0 0 100% 110 130 160 ma 0 0 1 60% 66 79 98 ma 0 1 0 40% 45 53 66 ma 0 1 1 27% 30 37 46 ma 1 0 0 17% 20 24 31 ma 1 0 1 10% 12 15 20 ma 1 1 0 7% 9 11 15 ma 1 1 1 3% 4 6 9 ma figure 3. display blanking truth table. figure 3 shows how the extended function disable (bit d 6 of the control register), master blank (bit d 2 of the control register), digit blank disable (bit d 1 of the attribute ram), and bl input can be used to blank the display. when the extended function disable is a logic 1, the display can be blanked only with the bl input. when the extended function disable is a logic 0, the display can be blanked through the bl input, the master blank, and the digit blank disable. the entire display will be blanked if either the bl input is logic 0 or the master blank is logic 1, pro vid ing all digit blank disable bits are logic 0. those digits with digit blank disable bits a logic 1 will ignore both blank signals and remain on. the digit blank disable bits allow individ- ual characters to be blanked or fl ashed in synchronization with the bl input. dimming dimming of the display is con trolled through either the bl input or the control register. a pulse width modulated signal can be applied to the bl input to dim the display. a three bit word in the control register generates an internal pulse width modulated signal to dim the display. the internal dimming feature is enabled only if the extended function disable is a logic 0. bits 3C5 in the control register provide internal brightness control. these bits are inter-preted as a three bit binary code, with code (000) corresponding to the maximum brightness and code (111) to the minimum brightness. in addition to varying the display brightness, bits 3C5 also vary the average value of i dd . i dd can be specifi ed at any brightness level as shown in table 1. C display blanked by bl C display on C display blanked by bl. individual characters on based on 1 being stored in dbdn C display blanked by mb C display blanked by mb. individual characters on based on 1 being stored in dbdn C display blanked by bl C display on efd mb dbdn bl 0 0 0 0 0 0 x 1 0 x 1 0 0 1 0 x 0 1 1 1 1 x x 0 1 x x 1
11 the inputs to the cmos ic are protected against static discharge and input current latchup. how ever, for best results standard cmos handling precautions should be used. prior to use, the hdlx-3416 should be stored in anti-static tubes or conductive material. during assembly a grounded conductive work area should be used, and assembly personnel should wear conductive wrist straps. lab coats made of synthetic material should be avoided since they are prone to static charge build-up. input current latchup is caused when the cmos inputs are sub jected either to a voltage below ground (vin < ground) or to a voltage higher than v dd (vin > v dd ) and when a high current is forced into the input. to prevent input current latchup and esd damage, unused inputs should be connected either to ground or to v dd . voltages should not be applied to the inputs until v dd has been applied to the display.transient input voltages should be eliminated. soldering and post solder cleaning instructions for the hdlx-3416 the hdlx-3416 may be hand soldered or wave soldered with sn63 solder. when hand solder ing it is recommend- ed that an electronically temperature con trolled and securely grounded soldering iron be used. for best results, the iron tip temperature should be set at 315c (600f). for wave soldering, a rosin-based rma fl ux can be used. the solder wave temperature should be set at 245c 5c (473f??9f), and dwell in the wave should be set between 1? to 3 seconds for optimum soldering. the preheat tem- perature should not exceed 110c (230f) as measured on the solder side of the pc board. for further information on solder ing and post solder cleaning, see application note 1027, soldering led components. contrast enhancement the objective of contrast enhance ment is to provide good read abil ity in the end users ambient lighting conditions. the concept is to employ both luminance and chromi- nance contrast techniques. these enhance readability by having the off-dots blend into the display background and the on-dots vividly stand out against the same back- ground. for addi tional information on contrast enhance- ment, see application note 1015. figure 4. intensity modulation control using an astable multivibrator (reprinted with permission from electronics magazine, sept. 19, 1974, v nu business pub. inc.). figure 4 shows a circuit designed to dim the display from 98% to 2% by pulse width modulating the bl input. a log- arithmic or a linear potentiometer may be used to adjust the display intensity. however, a logarithmic potentio- meter matches the response of the human eye and therefore provides better resolution at low intensities. the circuit frequency should be designed to operate at 10 khz or higher. lower fre quencies may cause the display to fl icker. extended function disable extended function disable (bit d 6 of the control register) disables the extended blanking and dimming functions in the hdlx-3416. if the extended function disable is a logic 1, the internal brightness control, master blank, and digit blank disable bits are ignored. however, the bl input and cursor control are still active. mechanical and electrical considerations the hdlx-3416 is a 22 pin dip package that can be stacked horizontally and vertically to create arrays of any size. the display is designed to operate continuously from -40c to +85c for all possible input conditions. the hdlx-3416 is assembled by die attaching and wire bonding 140 leds and a cmos ic to a high temperature printed circuit board. a polycarbonate lens is placed over the pc board creating an air gap environment for the led wire bonds. backfi ll epoxy environmentally seals the display package. this package construc tion makes the display highly tolerant to temperature cycling and allows wave soldering. + v dd 555 bl (pin 18) 10 khz output 1 k 250 k log 400 pf 6 21 1 k 1n914 7 8 4 3
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2012 avago technologies. all rights reserved. obsoletes 5989-3189en av02-3642en - june 20, 2012 intensity bin limits intensity range (mcd) bin min. max. a 1.20 1.77 b 1.45 2.47 c 2.02 3.46 d 2.83 4.85 e 3.97 6.79 f 5.55 9.50 g 7.78 13.30 note: test conditions as specifi ed in optical characteristic table. color bin limits color range (nm) color bin min. max. green 1 576.0 580.0 2 573.0 577.0 3 570.0 574.0 4 567.0 571.5 yellow 3 581.5 585.0 4 584.0 587.5 5 586.5 590.0 6 589.0 592.5 note: test conditions as specifi ed in optical characteristic table.

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